From e923090ddd9fef1d4e06dc6c5295e29baced19f3 Mon Sep 17 00:00:00 2001 From: Albert Lee Date: Mon, 20 Aug 2007 16:56:29 +0800 Subject: [PATCH] libata: pata_pdc2027x PLL detection minor cleanup Minor cleanup to remove the unneeded rmb()s per Jeff's advice. Also removed the pll_clock < 0 check since pll_clock now guaranteed to be >= 0 after Mikael's patch. Signed-off-by: Albert Lee Signed-off-by: Jeff Garzik --- drivers/ata/pata_pdc2027x.c | 5 ----- 1 file changed, 5 deletions(-) diff --git a/drivers/ata/pata_pdc2027x.c b/drivers/ata/pata_pdc2027x.c index 40b070ea85..2141a99e4d 100644 --- a/drivers/ata/pata_pdc2027x.c +++ b/drivers/ata/pata_pdc2027x.c @@ -561,12 +561,10 @@ static long pdc_read_counter(struct ata_host *host) retry: bccrl = readl(mmio_base + PDC_BYTE_COUNT) & 0x7fff; bccrh = readl(mmio_base + PDC_BYTE_COUNT + 0x100) & 0x7fff; - rmb(); /* Read the counter values again for verification */ bccrlv = readl(mmio_base + PDC_BYTE_COUNT) & 0x7fff; bccrhv = readl(mmio_base + PDC_BYTE_COUNT + 0x100) & 0x7fff; - rmb(); counter = (bccrh << 15) | bccrl; @@ -741,9 +739,6 @@ static int pdc_hardware_init(struct ata_host *host, unsigned int board_idx) */ pll_clock = pdc_detect_pll_input_clock(host); - if (pll_clock < 0) /* counter overflow? Try again. */ - pll_clock = pdc_detect_pll_input_clock(host); - dev_printk(KERN_INFO, host->dev, "PLL input clock %ld kHz\n", pll_clock/1000); /* Adjust PLL control register */ -- 2.39.5