From cd8ddf1a2800026dd58433333cce7a65cbc6c6d2 Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Wed, 30 Jan 2008 13:34:08 +0100 Subject: [PATCH] x86: clflush_page_range needs mfence clflush is an unordered operation with respect to other memory traffic, including other CLFLUSH instructions. This needs proper fencing with mfence. Signed-off-by: Thomas Gleixner Signed-off-by: Ingo Molnar --- arch/x86/mm/pageattr.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c index cdd2ea2a22..90b658ac39 100644 --- a/arch/x86/mm/pageattr.c +++ b/arch/x86/mm/pageattr.c @@ -25,12 +25,24 @@ within(unsigned long addr, unsigned long start, unsigned long end) /* * Flushing functions */ + + +/** + * clflush_cache_range - flush a cache range with clflush + * @addr: virtual start address + * @size: number of bytes to flush + * + * clflush is an unordered instruction which needs fencing with mfence + * to avoid ordering issues. + */ void clflush_cache_range(void *addr, int size) { int i; + mb(); for (i = 0; i < size; i += boot_cpu_data.x86_clflush_size) clflush(addr+i); + mb(); } static void __cpa_flush_all(void *arg) -- 2.39.5