From cce9d7e36f92f2d48de8c701b65ad27e76fedd02 Mon Sep 17 00:00:00 2001 From: Eugene Surovegin Date: Sat, 3 Sep 2005 15:55:44 -0700 Subject: [PATCH] [PATCH] ppc32: fix EMAC Tx channel assignments for NPe405H Fix PowerPC NPe405H EMAC Tx channel assignments. EMAC unit in this chip uses common for 4xx "two Tx / one Rx" configuration. Signed-off-by: Eugene Surovegin Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- arch/ppc/platforms/4xx/ibmnp405h.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/ppc/platforms/4xx/ibmnp405h.c b/arch/ppc/platforms/4xx/ibmnp405h.c index ecdc5be6ae..4937cfb4b5 100644 --- a/arch/ppc/platforms/4xx/ibmnp405h.c +++ b/arch/ppc/platforms/4xx/ibmnp405h.c @@ -34,7 +34,7 @@ static struct ocp_func_emac_data ibmnp405h_emac1_def = { .zmii_mux = 1, /* ZMII input of this EMAC */ .mal_idx = 0, /* MAL device index */ .mal_rx_chan = 1, /* MAL rx channel number */ - .mal_tx_chan = 1, /* MAL tx channel number */ + .mal_tx_chan = 2, /* MAL tx channel number */ .wol_irq = 41, /* WOL interrupt number */ .mdio_idx = -1, /* No shared MDIO */ .tah_idx = -1, /* No TAH */ @@ -46,7 +46,7 @@ static struct ocp_func_emac_data ibmnp405h_emac2_def = { .zmii_mux = 2, /* ZMII input of this EMAC */ .mal_idx = 0, /* MAL device index */ .mal_rx_chan = 2, /* MAL rx channel number */ - .mal_tx_chan = 2, /* MAL tx channel number */ + .mal_tx_chan = 4, /* MAL tx channel number */ .wol_irq = 41, /* WOL interrupt number */ .mdio_idx = -1, /* No shared MDIO */ .tah_idx = -1, /* No TAH */ @@ -58,7 +58,7 @@ static struct ocp_func_emac_data ibmnp405h_emac3_def = { .zmii_mux = 3, /* ZMII input of this EMAC */ .mal_idx = 0, /* MAL device index */ .mal_rx_chan = 3, /* MAL rx channel number */ - .mal_tx_chan = 3, /* MAL tx channel number */ + .mal_tx_chan = 6, /* MAL tx channel number */ .wol_irq = 41, /* WOL interrupt number */ .mdio_idx = -1, /* No shared MDIO */ .tah_idx = -1, /* No TAH */ -- 2.39.5