From c0f7c6cb5dbb6d90e0334e62376dbc6ac3d1d315 Mon Sep 17 00:00:00 2001 From: Paul Mackerras Date: Fri, 3 Aug 2007 14:08:24 +1000 Subject: [PATCH] [POWERPC] Expand RPN field to 34 bits when using 64k pages The real page number field in our PTEs when configured for 64kB pages is currently 32 bits, which turns out to be not quite enough for the resources that the eHCA driver wants to map. This expands the RPN field to include 2 adjacent, previously-unused bits. Signed-off-by: Paul Mackerras Acked-by: Benjamin Herrenschmidt --- include/asm-powerpc/pgtable-64k.h | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/include/asm-powerpc/pgtable-64k.h b/include/asm-powerpc/pgtable-64k.h index 31cbd3d7fc..33ae9018fe 100644 --- a/include/asm-powerpc/pgtable-64k.h +++ b/include/asm-powerpc/pgtable-64k.h @@ -49,12 +49,10 @@ /* Shift to put page number into pte. * - * That gives us a max RPN of 32 bits, which means a max of 48 bits - * of addressable physical space. - * We could get 3 more bits here by setting PTE_RPN_SHIFT to 29 but - * 32 makes PTEs more readable for debugging for now :) + * That gives us a max RPN of 34 bits, which means a max of 50 bits + * of addressable physical space, or 46 bits for the special 4k PFNs. */ -#define PTE_RPN_SHIFT (32) +#define PTE_RPN_SHIFT (30) #define PTE_RPN_MAX (1UL << (64 - PTE_RPN_SHIFT)) #define PTE_RPN_MASK (~((1UL<