From abaf48a05a8f097654e746af2a5afb2ab95861a1 Mon Sep 17 00:00:00 2001 From: Catalin Marinas Date: Thu, 30 Jun 2005 17:04:14 +0100 Subject: [PATCH] [PATCH] ARM: 2779/1: Fix the V bit setting for the ARM1020x CPUs Patch from Catalin Marinas This patch fixes the V bit setting for the ARM1020x processors. At reset, this bit is automatically set to the value of the HIVECSINIT input signal which just happened to be 1 but it is not mandatory. Signed-off-by: Catalin Marinas Signed-off-by: Russell King --- arch/arm/mm/proc-arm1020.S | 4 ++-- arch/arm/mm/proc-arm1020e.S | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/mm/proc-arm1020.S b/arch/arm/mm/proc-arm1020.S index e69f1940ab..5c0ae5260d 100644 --- a/arch/arm/mm/proc-arm1020.S +++ b/arch/arm/mm/proc-arm1020.S @@ -445,14 +445,14 @@ __arm1020_setup: /* * R * .RVI ZFRS BLDP WCAM - * .0.1 1001 ..11 0101 FIXME: why no V bit? + * .011 1001 ..11 0101 */ .type arm1020_cr1_clear, #object .type arm1020_cr1_set, #object arm1020_cr1_clear: .word 0x593f arm1020_cr1_set: - .word 0x1935 + .word 0x3935 __INITDATA diff --git a/arch/arm/mm/proc-arm1020e.S b/arch/arm/mm/proc-arm1020e.S index 142a2c2d6f..d69389c4d4 100644 --- a/arch/arm/mm/proc-arm1020e.S +++ b/arch/arm/mm/proc-arm1020e.S @@ -427,14 +427,14 @@ __arm1020e_setup: /* * R * .RVI ZFRS BLDP WCAM - * .0.1 1001 ..11 0101 /* FIXME: why no V bit? */ + * .011 1001 ..11 0101 */ .type arm1020e_cr1_clear, #object .type arm1020e_cr1_set, #object arm1020e_cr1_clear: .word 0x5f3f arm1020e_cr1_set: - .word 0x1935 + .word 0x3935 __INITDATA -- 2.39.5