From 9fde9bdd3023854f7b03cc425ff4a0ed51bd1eb3 Mon Sep 17 00:00:00 2001 From: Grant Likely Date: Wed, 9 Jul 2008 10:56:11 -0600 Subject: [PATCH] powerpc/440: Convert Virtex ML507 device tree to dts-v1 Signed-off-by: Grant Likely --- arch/powerpc/boot/dts/virtex440-ml507.dts | 256 +++++++++++++--------- 1 file changed, 157 insertions(+), 99 deletions(-) diff --git a/arch/powerpc/boot/dts/virtex440-ml507.dts b/arch/powerpc/boot/dts/virtex440-ml507.dts index f1b334454f..dc8e78e2dc 100644 --- a/arch/powerpc/boot/dts/virtex440-ml507.dts +++ b/arch/powerpc/boot/dts/virtex440-ml507.dts @@ -9,36 +9,42 @@ * kind, whether express or implied. */ +/dts-v1/; + / { #address-cells = <1>; #size-cells = <1>; compatible = "xlnx,virtex440"; - dcr-parent = <&ppc440_virtex5_0>; + dcr-parent = <&ppc440_0>; model = "testing"; + DDR2_SDRAM: memory@0 { + device_type = "memory"; + reg = < 0 0x10000000 >; + } ; chosen { bootargs = "console=ttyS0 ip=on root=/dev/ram"; - linux,stdout-path = "/plb@0/serial@d0000000"; + linux,stdout-path = "/plb@0/serial@83e00000"; } ; cpus { #address-cells = <1>; #cpus = <1>; #size-cells = <0>; - ppc440_virtex5_0: cpu@0 { - clock-frequency = <17d78400>; + ppc440_0: cpu@0 { + clock-frequency = <400000000>; compatible = "PowerPC,440", "ibm,ppc440"; - d-cache-line-size = <20>; - d-cache-size = <8000>; + d-cache-line-size = <0x20>; + d-cache-size = <0x8000>; dcr-access-method = "native"; dcr-controller ; device_type = "cpu"; - i-cache-line-size = <20>; - i-cache-size = <8000>; + i-cache-line-size = <0x20>; + i-cache-size = <0x8000>; model = "PowerPC,440"; reg = <0>; - timebase-frequency = <17d78400>; + timebase-frequency = <400000000>; xlnx,apu-control = <1>; - xlnx,apu-udi-0 = ; - xlnx,apu-udi-1 = ; + xlnx,apu-udi-0 = <0>; + xlnx,apu-udi-1 = <0>; xlnx,apu-udi-10 = <0>; xlnx,apu-udi-11 = <0>; xlnx,apu-udi-12 = <0>; @@ -63,41 +69,41 @@ xlnx,dcu-wr-urgent-plb-prio = <0>; xlnx,dma0-control = <0>; xlnx,dma0-plb-prio = <0>; - xlnx,dma0-rxchannelctrl = <1010000>; - xlnx,dma0-rxirqtimer = <3ff>; - xlnx,dma0-txchannelctrl = <1010000>; - xlnx,dma0-txirqtimer = <3ff>; + xlnx,dma0-rxchannelctrl = <0x1010000>; + xlnx,dma0-rxirqtimer = <0x3ff>; + xlnx,dma0-txchannelctrl = <0x1010000>; + xlnx,dma0-txirqtimer = <0x3ff>; xlnx,dma1-control = <0>; xlnx,dma1-plb-prio = <0>; - xlnx,dma1-rxchannelctrl = <1010000>; - xlnx,dma1-rxirqtimer = <3ff>; - xlnx,dma1-txchannelctrl = <1010000>; - xlnx,dma1-txirqtimer = <3ff>; + xlnx,dma1-rxchannelctrl = <0x1010000>; + xlnx,dma1-rxirqtimer = <0x3ff>; + xlnx,dma1-txchannelctrl = <0x1010000>; + xlnx,dma1-txirqtimer = <0x3ff>; xlnx,dma2-control = <0>; xlnx,dma2-plb-prio = <0>; - xlnx,dma2-rxchannelctrl = <1010000>; - xlnx,dma2-rxirqtimer = <3ff>; - xlnx,dma2-txchannelctrl = <1010000>; - xlnx,dma2-txirqtimer = <3ff>; + xlnx,dma2-rxchannelctrl = <0x1010000>; + xlnx,dma2-rxirqtimer = <0x3ff>; + xlnx,dma2-txchannelctrl = <0x1010000>; + xlnx,dma2-txirqtimer = <0x3ff>; xlnx,dma3-control = <0>; xlnx,dma3-plb-prio = <0>; - xlnx,dma3-rxchannelctrl = <1010000>; - xlnx,dma3-rxirqtimer = <3ff>; - xlnx,dma3-txchannelctrl = <1010000>; - xlnx,dma3-txirqtimer = <3ff>; + xlnx,dma3-rxchannelctrl = <0x1010000>; + xlnx,dma3-rxirqtimer = <0x3ff>; + xlnx,dma3-txchannelctrl = <0x1010000>; + xlnx,dma3-txirqtimer = <0x3ff>; xlnx,endian-reset = <0>; xlnx,generate-plb-timespecs = <1>; xlnx,icu-rd-fetch-plb-prio = <0>; xlnx,icu-rd-spec-plb-prio = <0>; xlnx,icu-rd-touch-plb-prio = <0>; - xlnx,interconnect-imask = ; + xlnx,interconnect-imask = <0xffffffff>; xlnx,mplb-allow-lock-xfer = <1>; xlnx,mplb-arb-mode = <0>; - xlnx,mplb-awidth = <20>; - xlnx,mplb-counter = <500>; - xlnx,mplb-dwidth = <80>; + xlnx,mplb-awidth = <0x20>; + xlnx,mplb-counter = <0x500>; + xlnx,mplb-dwidth = <0x80>; xlnx,mplb-max-burst = <8>; - xlnx,mplb-native-dwidth = <80>; + xlnx,mplb-native-dwidth = <0x80>; xlnx,mplb-p2p = <0>; xlnx,mplb-prio-dcur = <2>; xlnx,mplb-prio-dcuw = <3>; @@ -110,54 +116,41 @@ xlnx,mplb-write-pipe-enable = <1>; xlnx,mplb-write-post-enable = <1>; xlnx,num-dma = <1>; - xlnx,pir = ; + xlnx,pir = <0xf>; xlnx,ppc440mc-addr-base = <0>; - xlnx,ppc440mc-addr-high = <1fffffff>; + xlnx,ppc440mc-addr-high = <0xfffffff>; xlnx,ppc440mc-arb-mode = <0>; - xlnx,ppc440mc-bank-conflict-mask = ; - xlnx,ppc440mc-control = ; + xlnx,ppc440mc-bank-conflict-mask = <0xc00000>; + xlnx,ppc440mc-control = <0xf810008f>; xlnx,ppc440mc-max-burst = <8>; xlnx,ppc440mc-prio-dcur = <2>; xlnx,ppc440mc-prio-dcuw = <3>; xlnx,ppc440mc-prio-icu = <4>; xlnx,ppc440mc-prio-splb0 = <1>; xlnx,ppc440mc-prio-splb1 = <0>; - xlnx,ppc440mc-row-conflict-mask = <3ffe00>; + xlnx,ppc440mc-row-conflict-mask = <0x3ffe00>; xlnx,ppcdm-asyncmode = <0>; xlnx,ppcds-asyncmode = <0>; xlnx,user-reset = <0>; DMA0: sdma@80 { compatible = "xlnx,ll-dma-1.00.a"; - dcr-reg = < 80 11 >; - interrupt-parent = <&opb_intc_0>; - interrupts = < 5 2 6 2 >; + dcr-reg = < 0x80 0x11 >; + interrupt-parent = <&xps_intc_0>; + interrupts = < 9 2 0xa 2 >; } ; } ; } ; - plb_v46_cfb_0: plb@0 { + plb_v46_0: plb@0 { #address-cells = <1>; #size-cells = <1>; - compatible = "xlnx,plb-v46-1.02.a"; + compatible = "xlnx,plb-v46-1.02.a", "simple-bus"; ranges ; - iic_bus: i2c@d0020000 { - compatible = "xlnx,xps-iic-2.00.a"; - interrupt-parent = <&opb_intc_0>; - interrupts = < 7 2 >; - reg = < d0020000 200 >; - xlnx,clk-freq = <5f5e100>; - xlnx,family = "virtex5"; - xlnx,gpo-width = <1>; - xlnx,iic-freq = <186a0>; - xlnx,scl-inertial-delay = <0>; - xlnx,sda-inertial-delay = <0>; - xlnx,ten-bit-adr = <0>; - } ; - leds_8bit: gpio@d0010200 { + DIP_Switches_8Bit: gpio@81460000 { compatible = "xlnx,xps-gpio-1.00.a"; - interrupt-parent = <&opb_intc_0>; - interrupts = < 1 2 >; - reg = < d0010200 200 >; - xlnx,all-inputs = <0>; + interrupt-parent = <&xps_intc_0>; + interrupts = < 6 2 >; + reg = < 0x81460000 0x10000 >; + xlnx,all-inputs = <1>; xlnx,all-inputs-2 = <0>; xlnx,dout-default = <0>; xlnx,dout-default-2 = <0>; @@ -167,72 +160,137 @@ xlnx,is-bidir = <1>; xlnx,is-bidir-2 = <1>; xlnx,is-dual = <0>; - xlnx,tri-default = ; - xlnx,tri-default-2 = ; + xlnx,tri-default = <0xffffffff>; + xlnx,tri-default-2 = <0xffffffff>; } ; - ll_temac_0: xps-ll-temac@91200000 { + Hard_Ethernet_MAC: xps-ll-temac@81c00000 { #address-cells = <1>; #size-cells = <1>; compatible = "xlnx,compound"; - ethernet@91200000 { - compatible = "xlnx,xps-ll-temac-1.01.a"; + ethernet@81c00000 { + compatible = "xlnx,xps-ll-temac-1.01.b"; device_type = "network"; - interrupt-parent = <&opb_intc_0>; - interrupts = < 4 2 >; + interrupt-parent = <&xps_intc_0>; + interrupts = < 5 2 >; llink-connected = <&DMA0>; local-mac-address = [ 02 00 00 00 00 00 ]; - reg = < 91200000 40 >; + reg = < 0x81c00000 0x40 >; xlnx,bus2core-clk-ratio = <1>; xlnx,phy-type = <1>; xlnx,phyaddr = <1>; - xlnx,rxcsum = <0>; - xlnx,rxfifo = <4000>; + xlnx,rxcsum = <1>; + xlnx,rxfifo = <0x1000>; xlnx,temac-type = <0>; - xlnx,txcsum = <0>; - xlnx,txfifo = <4000>; + xlnx,txcsum = <1>; + xlnx,txfifo = <0x1000>; } ; } ; - opb_intc_0: interrupt-controller@d0020200 { - #interrupt-cells = <2>; - compatible = "xlnx,xps-intc-1.00.a"; - interrupt-controller ; - reg = < d0020200 20 >; - xlnx,num-intr-inputs = <8>; + LEDs_8Bit: gpio@81400000 { + compatible = "xlnx,xps-gpio-1.00.a"; + reg = < 0x81400000 0x10000 >; + xlnx,all-inputs = <0>; + xlnx,all-inputs-2 = <0>; + xlnx,dout-default = <0>; + xlnx,dout-default-2 = <0>; + xlnx,family = "virtex5"; + xlnx,gpio-width = <8>; + xlnx,interrupt-present = <0>; + xlnx,is-bidir = <1>; + xlnx,is-bidir-2 = <1>; + xlnx,is-dual = <0>; + xlnx,tri-default = <0xffffffff>; + xlnx,tri-default-2 = <0xffffffff>; } ; - plb_bram_if_cntlr_0: xps-bram-if-cntlr@ffff0000 { - compatible = "xlnx,xps-bram-if-cntlr-1.00.a"; - reg = < ffff0000 10000 >; + LEDs_Positions: gpio@81420000 { + compatible = "xlnx,xps-gpio-1.00.a"; + reg = < 0x81420000 0x10000 >; + xlnx,all-inputs = <0>; + xlnx,all-inputs-2 = <0>; + xlnx,dout-default = <0>; + xlnx,dout-default-2 = <0>; xlnx,family = "virtex5"; + xlnx,gpio-width = <5>; + xlnx,interrupt-present = <0>; + xlnx,is-bidir = <1>; + xlnx,is-bidir-2 = <1>; + xlnx,is-dual = <0>; + xlnx,tri-default = <0xffffffff>; + xlnx,tri-default-2 = <0xffffffff>; } ; - plb_bram_if_cntlr_1: xps-bram-if-cntlr@eee00000 { - compatible = "xlnx,xps-bram-if-cntlr-1.00.a"; - reg = < eee00000 2000 >; + Push_Buttons_5Bit: gpio@81440000 { + compatible = "xlnx,xps-gpio-1.00.a"; + interrupt-parent = <&xps_intc_0>; + interrupts = < 7 2 >; + reg = < 0x81440000 0x10000 >; + xlnx,all-inputs = <1>; + xlnx,all-inputs-2 = <0>; + xlnx,dout-default = <0>; + xlnx,dout-default-2 = <0>; xlnx,family = "virtex5"; + xlnx,gpio-width = <5>; + xlnx,interrupt-present = <1>; + xlnx,is-bidir = <1>; + xlnx,is-bidir-2 = <1>; + xlnx,is-dual = <0>; + xlnx,tri-default = <0xffffffff>; + xlnx,tri-default-2 = <0xffffffff>; } ; - rs232_uart_0: serial@d0000000 { - clock-frequency = <1312d00>; + RS232_Uart_1: serial@83e00000 { + clock-frequency = <100000000>; compatible = "xlnx,xps-uart16550-2.00.a", "ns16550"; - current-speed = <2580>; + current-speed = <0x2580>; device_type = "serial"; - interrupt-parent = <&opb_intc_0>; - interrupts = < 0 2 >; - reg = < d0000000 2000 >; - reg-offset = <1003>; + interrupt-parent = <&xps_intc_0>; + interrupts = < 8 2 >; + reg = < 0x83e00000 0x10000 >; + reg-offset = <3>; reg-shift = <2>; xlnx,family = "virtex5"; xlnx,has-external-rclk = <0>; - xlnx,has-external-xin = <1>; + xlnx,has-external-xin = <0>; xlnx,is-a-16550 = <1>; } ; - sysace_compactflash: sysace@d0030100 { + SysACE_CompactFlash: sysace@83600000 { compatible = "xlnx,xps-sysace-1.00.a"; - reg = < d0030100 80 >; + interrupt-parent = <&xps_intc_0>; + interrupts = < 4 2 >; + reg = < 0x83600000 0x10000 >; xlnx,family = "virtex5"; - xlnx,mem-width = <10>; + xlnx,mem-width = <0x10>; + } ; + xps_bram_if_cntlr_1: xps-bram-if-cntlr@ffff0000 { + compatible = "xlnx,xps-bram-if-cntlr-1.00.a"; + reg = < 0xffff0000 0x10000 >; + xlnx,family = "virtex5"; + } ; + xps_intc_0: interrupt-controller@81800000 { + #interrupt-cells = <2>; + compatible = "xlnx,xps-intc-1.00.a"; + interrupt-controller ; + reg = < 0x81800000 0x10000 >; + xlnx,num-intr-inputs = <0xb>; + } ; + xps_timebase_wdt_1: xps-timebase-wdt@83a00000 { + compatible = "xlnx,xps-timebase-wdt-1.00.b"; + interrupt-parent = <&xps_intc_0>; + interrupts = < 2 0 1 2 >; + reg = < 0x83a00000 0x10000 >; + xlnx,family = "virtex5"; + xlnx,wdt-enable-once = <0>; + xlnx,wdt-interval = <0x1e>; + } ; + xps_timer_1: timer@83c00000 { + compatible = "xlnx,xps-timer-1.00.a"; + interrupt-parent = <&xps_intc_0>; + interrupts = < 3 2 >; + reg = < 0x83c00000 0x10000 >; + xlnx,count-width = <0x20>; + xlnx,family = "virtex5"; + xlnx,gen0-assert = <1>; + xlnx,gen1-assert = <1>; + xlnx,one-timer-only = <1>; + xlnx,trig0-assert = <1>; + xlnx,trig1-assert = <1>; } ; - } ; - ppc440mc_ddr2_0: memory@0 { - device_type = "memory"; - reg = < 0 20000000 >; } ; } ; -- 2.39.5