From 8736595bb2b0ce6188ca31308c40921f3f02f35b Mon Sep 17 00:00:00 2001 From: Thomas Bogendoerfer Date: Wed, 2 Jul 2008 21:06:03 +0200 Subject: [PATCH] [MIPS] Enable FAST-20 for onboard scsi Both onboard controller of the O2 support FAST-20 transfer speeds, but the bit, which signals that to the aic driver, isn't set. Instead of adding detection code to the scsi driver, we just fake the missing bit in the PCI config space of the scsi chips. Signed-off-by: Thomas Bogendoerfer Signed-off-by: Ralf Baechle --- arch/mips/pci/ops-mace.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/mips/pci/ops-mace.c b/arch/mips/pci/ops-mace.c index e95881897e..1cfb558869 100644 --- a/arch/mips/pci/ops-mace.c +++ b/arch/mips/pci/ops-mace.c @@ -61,6 +61,13 @@ mace_pci_read_config(struct pci_bus *bus, unsigned int devfn, /* ack possible master abort */ mace->pci.error &= ~MACEPCI_ERROR_MASTER_ABORT; mace->pci.control = control; + /* + * someone forgot to set the ultra bit for the onboard + * scsi chips; we fake it here + */ + if (bus->number == 0 && reg == 0x40 && size == 4 && + (devfn == (1 << 3) || devfn == (2 << 3))) + *val |= 0x1000; DPRINTK("read%d: reg=%08x,val=%02x\n", size * 8, reg, *val); -- 2.39.5