From 658b32cad9ae087bd34f35a925fd75b76d663d4e Mon Sep 17 00:00:00 2001 From: Colin Ngam Date: Mon, 25 Apr 2005 13:07:00 -0700 Subject: [PATCH] [IA64-SGI] support variable length nasids in shub2 This patch enables our TIO IO chipset to support variable length nasids in Shub2 chipset. Signed-off-by: Colin Ngam Signed-off-by: Tony Luck --- include/asm-ia64/sn/addrs.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/include/asm-ia64/sn/addrs.h b/include/asm-ia64/sn/addrs.h index c916bd2276..ae0bc99d57 100644 --- a/include/asm-ia64/sn/addrs.h +++ b/include/asm-ia64/sn/addrs.h @@ -154,8 +154,9 @@ * the chiplet id is zero. If we implement TIO-TIO dma, we might need * to insert a chiplet id into this macro. However, it is our belief * right now that this chiplet id will be ICE, which is also zero. + * Nasid starts on bit 40. */ -#define PHYS_TO_TIODMA(x) ( (((u64)(x) & NASID_MASK) << 2) | NODE_OFFSET(x)) +#define PHYS_TO_TIODMA(x) ( (((u64)(NASID_GET(x))) << 40) | NODE_OFFSET(x)) #define PHYS_TO_DMA(x) ( (((u64)(x) & NASID_MASK) >> 2) | NODE_OFFSET(x)) -- 2.39.5