From 0e184c6b4feba9640c85811a7929d18f4491ddb0 Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Wed, 23 Apr 2008 08:23:51 +0800 Subject: [PATCH] [Blackfin] arch: relocate MAX_SWITCH_{D,I}_CPLBS from the header to the file where it actually gets used. relocate MAX_SWITCH_{D,I}_CPLBS from the header to the file where it actually gets used. this way when we change CONFIG_MEM_SIZE in our kconfig, we only rebuild one or two files rather than a whole bunch that implicitly include cplb.h. this will also remove the ability to clear the swapcount on the fly, but i really dont think that functionality is important. ultimate goal is for CONFIG_MEM_SIZE to go away and calculate this value on the fly based on what u-boot programmed for us. Signed-off-by: Mike Frysinger Signed-off-by: Bryan Wu --- arch/blackfin/kernel/cplb-nompu/cplbinfo.c | 11 --------- arch/blackfin/kernel/cplb-nompu/cplbinit.c | 23 +++++++++++++++++++ include/asm-blackfin/cplb.h | 26 ---------------------- 3 files changed, 23 insertions(+), 37 deletions(-) diff --git a/arch/blackfin/kernel/cplb-nompu/cplbinfo.c b/arch/blackfin/kernel/cplb-nompu/cplbinfo.c index a4f0b428a3..f7f2eb0b7f 100644 --- a/arch/blackfin/kernel/cplb-nompu/cplbinfo.c +++ b/arch/blackfin/kernel/cplb-nompu/cplbinfo.c @@ -174,16 +174,6 @@ static int cplbinfo_read_proc(char *page, char **start, off_t off, return len; } -static int cplbinfo_write_proc(struct file *file, const char __user *buffer, - unsigned long count, void *data) -{ - printk(KERN_INFO "Reset the CPLB swap in/out counts.\n"); - memset(ipdt_swapcount_table, 0, MAX_SWITCH_I_CPLBS * sizeof(unsigned long)); - memset(dpdt_swapcount_table, 0, MAX_SWITCH_D_CPLBS * sizeof(unsigned long)); - - return count; -} - static int __init cplbinfo_init(void) { struct proc_dir_entry *entry; @@ -193,7 +183,6 @@ static int __init cplbinfo_init(void) return -ENOMEM; entry->read_proc = cplbinfo_read_proc; - entry->write_proc = cplbinfo_write_proc; entry->data = NULL; return 0; diff --git a/arch/blackfin/kernel/cplb-nompu/cplbinit.c b/arch/blackfin/kernel/cplb-nompu/cplbinit.c index 6320bc45fb..dd46b666fd 100644 --- a/arch/blackfin/kernel/cplb-nompu/cplbinit.c +++ b/arch/blackfin/kernel/cplb-nompu/cplbinit.c @@ -26,6 +26,29 @@ #include #include +/* +* Number of required data CPLB switchtable entries +* MEMSIZE / 4 (we mostly install 4M page size CPLBs +* approx 16 for smaller 1MB page size CPLBs for allignment purposes +* 1 for L1 Data Memory +* possibly 1 for L2 Data Memory +* 1 for CONFIG_DEBUG_HUNT_FOR_ZERO +* 1 for ASYNC Memory +*/ +#define MAX_SWITCH_D_CPLBS (((CONFIG_MEM_SIZE / 4) + 16 + 1 + 1 + 1 \ + + ASYNC_MEMORY_CPLB_COVERAGE) * 2) + +/* +* Number of required instruction CPLB switchtable entries +* MEMSIZE / 4 (we mostly install 4M page size CPLBs +* approx 12 for smaller 1MB page size CPLBs for allignment purposes +* 1 for L1 Instruction Memory +* possibly 1 for L2 Instruction Memory +* 1 for CONFIG_DEBUG_HUNT_FOR_ZERO +*/ +#define MAX_SWITCH_I_CPLBS (((CONFIG_MEM_SIZE / 4) + 12 + 1 + 1 + 1) * 2) + + u_long icplb_table[MAX_CPLBS + 1]; u_long dcplb_table[MAX_CPLBS + 1]; diff --git a/include/asm-blackfin/cplb.h b/include/asm-blackfin/cplb.h index 654375c2b7..5b0da9a69b 100644 --- a/include/asm-blackfin/cplb.h +++ b/include/asm-blackfin/cplb.h @@ -74,32 +74,6 @@ #define ASYNC_MEMORY_CPLB_COVERAGE ((ASYNC_BANK0_SIZE + ASYNC_BANK1_SIZE + \ ASYNC_BANK2_SIZE + ASYNC_BANK3_SIZE) / SIZE_4M) -/* -* Number of required data CPLB switchtable entries -* MEMSIZE / 4 (we mostly install 4M page size CPLBs -* approx 16 for smaller 1MB page size CPLBs for allignment purposes -* 1 for L1 Data Memory -* possibly 1 for L2 Data Memory -* 1 for CONFIG_DEBUG_HUNT_FOR_ZERO -* 1 for ASYNC Memory -*/ - - -#define MAX_SWITCH_D_CPLBS (((CONFIG_MEM_SIZE / 4) + 16 + 1 + 1 + 1 \ - + ASYNC_MEMORY_CPLB_COVERAGE) * 2) - -/* -* Number of required instruction CPLB switchtable entries -* MEMSIZE / 4 (we mostly install 4M page size CPLBs -* approx 12 for smaller 1MB page size CPLBs for allignment purposes -* 1 for L1 Instruction Memory -* possibly 1 for L2 Instruction Memory -* 1 for CONFIG_DEBUG_HUNT_FOR_ZERO -*/ - -#define MAX_SWITCH_I_CPLBS (((CONFIG_MEM_SIZE / 4) + 12 + 1 + 1 + 1) * 2) - - #define CPLB_ENABLE_ICACHE_P 0 #define CPLB_ENABLE_DCACHE_P 1 #define CPLB_ENABLE_DCACHE2_P 2 -- 2.39.5