From 074f98df0547b7d15f78db9a17e985da0c22af28 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Tue, 8 May 2007 15:45:33 +0900 Subject: [PATCH] sh: Add 32-bit opcode feature CPU flag. Add a CPU flag for the CPUs that support 32-bit opcodes, which gets passed down to userspace. Signed-off-by: Paul Mundt --- arch/sh/kernel/cpu/sh2a/probe.c | 1 + arch/sh/kernel/setup.c | 2 +- include/asm-sh/cpu-features.h | 1 + 3 files changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/sh/kernel/cpu/sh2a/probe.c b/arch/sh/kernel/cpu/sh2a/probe.c index 426f6db01f..f455c35097 100644 --- a/arch/sh/kernel/cpu/sh2a/probe.c +++ b/arch/sh/kernel/cpu/sh2a/probe.c @@ -18,6 +18,7 @@ int __init detect_cpu_and_cache_system(void) { /* Just SH7206 for now .. */ current_cpu_data.type = CPU_SH7206; + current_cpu_data.flags |= CPU_HAS_OP32; current_cpu_data.dcache.ways = 4; current_cpu_data.dcache.way_incr = (1 << 11); diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c index 477d2a854f..c277291359 100644 --- a/arch/sh/kernel/setup.c +++ b/arch/sh/kernel/setup.c @@ -431,7 +431,7 @@ const char *get_cpu_subtype(struct sh_cpuinfo *c) /* Symbolic CPU flags, keep in sync with asm/cpu-features.h */ static const char *cpu_flags[] = { "none", "fpu", "p2flush", "mmuassoc", "dsp", "perfctr", - "ptea", "llsc", "l2", NULL + "ptea", "llsc", "l2", "op32", NULL }; static void show_cpuflags(struct seq_file *m, struct sh_cpuinfo *c) diff --git a/include/asm-sh/cpu-features.h b/include/asm-sh/cpu-features.h index 4bccd7c032..86308aa397 100644 --- a/include/asm-sh/cpu-features.h +++ b/include/asm-sh/cpu-features.h @@ -20,5 +20,6 @@ #define CPU_HAS_PTEA 0x0020 /* PTEA register */ #define CPU_HAS_LLSC 0x0040 /* movli.l/movco.l */ #define CPU_HAS_L2_CACHE 0x0080 /* Secondary cache / URAM */ +#define CPU_HAS_OP32 0x0100 /* 32-bit instruction support */ #endif /* __ASM_SH_CPU_FEATURES_H */ -- 2.39.5