]> err.no Git - linux-2.6/log
linux-2.6
16 years ago[ARM] Feroceon: 88fr571-vd support
Lennert Buytenhek [Sun, 22 Jun 2008 20:45:08 +0000 (22:45 +0200)]
[ARM] Feroceon: 88fr571-vd support

Add support for the Feroceon 88fr571-vd CPU core as found in e.g.
the Marvell Discovery Duo family of ARM SoCs.

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
16 years ago[ARM] Kirkwood: add defconfig
Saeed Bishara [Sun, 22 Jun 2008 20:45:07 +0000 (22:45 +0200)]
[ARM] Kirkwood: add defconfig

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
16 years ago[ARM] add Marvell Kirkwood (88F6000) SoC support
Saeed Bishara [Sun, 22 Jun 2008 20:45:06 +0000 (22:45 +0200)]
[ARM] add Marvell Kirkwood (88F6000) SoC support

The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.

This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.

Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
16 years ago[ARM] Feroceon: 88fr131 support
Lennert Buytenhek [Sun, 22 Jun 2008 20:45:05 +0000 (22:45 +0200)]
[ARM] Feroceon: 88fr131 support

Add support for the Shiva 88fr131 CPU core as found in e.g. the
Marvell Kirkwood family of ARM SoCs.

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
16 years ago[ARM] Feroceon: L2 cache support
Lennert Buytenhek [Sun, 22 Jun 2008 20:45:04 +0000 (22:45 +0200)]
[ARM] Feroceon: L2 cache support

This patch adds support for the unified Feroceon L2 cache controller
as found in e.g. the Marvell Kirkwood and Marvell Discovery Duo
families of ARM SoCs.

Note that:

- Page table walks are outer uncacheable on Kirkwood and Discovery
  Duo, since the ARMv5 spec provides no way to indicate outer
  cacheability of page table walks (specifying it in TTBR[4:3] is
  an ARMv6+ feature).

  This requires adding L2 cache clean instructions to
  proc-feroceon.S (dcache_clean_area(), set_pte()) as well as to
  tlbflush.h ({flush,clean}_pmd_entry()).  The latter case is handled
  by defining a new TLB type (TLB_FEROCEON) which is almost identical
  to the v4wbi one but provides a TLB_L2CLEAN_FR flag.

- The Feroceon L2 cache controller supports L2 range (i.e. 'clean L2
  range by MVA' and 'invalidate L2 range by MVA') operations, and this
  patch uses those range operations for all Linux outer cache
  operations, as they are faster than the regular per-line operations.

  L2 range operations are not interruptible on this hardware, which
  avoids potential livelock issues, but can be bad for interrupt
  latency, so there is a compile-time tunable (MAX_RANGE_SIZE) which
  allows you to select the maximum range size to operate on at once.
  (Valid range is between one cache line and one 4KiB page, and must
  be a multiple of the line size.)

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
16 years ago[ARM] Feroceon: L1 cache range operation support
Stanislav Samsonov [Tue, 3 Jun 2008 08:24:40 +0000 (11:24 +0300)]
[ARM] Feroceon: L1 cache range operation support

This patch adds support for the L1 D cache range operations that
are supported by the Marvell Discovery Duo and Marvell Kirkwood
ARM SoCs.

Signed-off-by: Stanislav Samsonov <samsonov@marvell.com>
Acked-by: Saeed Bishara <saeed@marvell.com>
Reviewed-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
16 years ago[ARM] Loki: add defconfig
Lennert Buytenhek [Sun, 22 Jun 2008 20:45:02 +0000 (22:45 +0200)]
[ARM] Loki: add defconfig

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
16 years ago[ARM] add Marvell Loki (88RC8480) SoC support
Lennert Buytenhek [Sun, 22 Jun 2008 20:45:02 +0000 (22:45 +0200)]
[ARM] add Marvell Loki (88RC8480) SoC support

The Marvell Loki (88RC8480) is an ARM SoC based on a Feroceon CPU
core running at between 400 MHz and 1.0 GHz, and features a 64 bit
DDR controller, 512K of internal SRAM, two x4 PCI-Express ports,
two Gigabit Ethernet ports, two 4x SAS/SATA controllers, two UARTs,
two TWSI controllers, and IDMA/XOR engines.

This patch adds support for the Marvell LB88RC8480 Development
Board, enabling the use of the PCIe interfaces, the ethernet
interfaces, the TWSI interfaces and the UARTs.

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
16 years ago[ARM] Orion: add a separate BRIDGE_INT_TIMER1_CLR define
Ke Wei [Fri, 23 May 2008 08:23:22 +0000 (10:23 +0200)]
[ARM] Orion: add a separate BRIDGE_INT_TIMER1_CLR define

Some Feroceon-based SoCs have an MBUS bridge interrupt controller
that requires writing a one instead of a zero to clear edge
interrupt sources such as timer expiry.

This patch adds a new BRIDGE_INT_TIMER1_CLR define, which platform
code can set to either ~BRIDGE_INT_TIMER1 (write-zero-to-clear) or
BRIDGE_INT_TIMER1 (write-one-to-clear) depending on the platform.

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
16 years ago[ARM] Feroceon: allow more old Feroceon IDs
Ke Wei [Sun, 22 Jun 2008 20:45:00 +0000 (22:45 +0200)]
[ARM] Feroceon: allow more old Feroceon IDs

There are a couple more Feroceon-based SoCs out in the field that use
different Variant and Architecture fields in their Main ID registers
-- this patch tweaks the processor match/mask in proc-feroceon.S to
catch those SoCs as well.

Signed-off-by: Ke Wei <kewei@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
16 years ago[ARM] Feroceon: catch other Feroceon CPU IDs in head.S
Nicolas Pitre [Tue, 3 Jun 2008 21:06:21 +0000 (23:06 +0200)]
[ARM] Feroceon: catch other Feroceon CPU IDs in head.S

Tweak the Feroceon match/mask in arch/arm/boot/compressed/head.S to
match a couple of newer Feroceon cores (such as the 88fr571vd with
CPU ID 0x56155710, and the 88fr131 with CPU ID 0x56251310) as well.

Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
16 years ago[ARM] Feroceon: speed up flushing of the entire cache
Nicolas Pitre [Thu, 24 Apr 2008 00:04:54 +0000 (02:04 +0200)]
[ARM] Feroceon: speed up flushing of the entire cache

Flushing the L1 D cache with a test/clean/invalidate loop is very
easy in software, but it is not the quickest way of doing it, as
there is a lot of overhead involved in re-scanning the cache from
the beginning every time we hit a dirty line.

This patch makes proc-feroceon.S use "clean+invalidate by set/way"
loops according to possible cache configuration of Feroceon CPUs
(either direct-mapped or 4-way set associative).

Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
16 years ago[ARM] Orion: nuke orion5x_{read,write}
Lennert Buytenhek [Wed, 28 May 2008 14:43:48 +0000 (16:43 +0200)]
[ARM] Orion: nuke orion5x_{read,write}

Nuke the Orion-specific orion5x_{read,write} wrappers.

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
16 years ago[ARM] Orion: use linux/serial_reg.h for Orion uncompress.h
Lennert Buytenhek [Wed, 4 Jun 2008 01:16:21 +0000 (03:16 +0200)]
[ARM] Orion: use linux/serial_reg.h for Orion uncompress.h

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
16 years ago[ARM] Orion: add Maxtor Shared Storage II support
Sylver Bruneau [Mon, 9 Jun 2008 23:00:38 +0000 (01:00 +0200)]
[ARM] Orion: add Maxtor Shared Storage II support

This patch adds support for the Maxtor Shared Storage II hardware.

Signed-off-by: Sylver Bruneau <sylver.bruneau@googlemail.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
16 years ago[ARM] Orion: add Technologic Systems TS-78xx support
Alexander Clouter [Sat, 31 May 2008 21:32:37 +0000 (22:32 +0100)]
[ARM] Orion: add Technologic Systems TS-78xx support

Signed-off-by: Alexander Clouter <alex@digriz.org.uk>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
16 years ago[ARM] Orion: remove code duplication in TS209 and TS409 setup files
Sylver Bruneau [Sat, 31 May 2008 16:21:49 +0000 (18:21 +0200)]
[ARM] Orion: remove code duplication in TS209 and TS409 setup files

Signed-off-by: Sylver Bruneau <sylver.bruneau@googlemail.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
16 years ago[ARM] Orion: add HP Media Vault mv2120 support
Martin Michlmayr [Sun, 6 Apr 2008 12:08:17 +0000 (14:08 +0200)]
[ARM] Orion: add HP Media Vault mv2120 support

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
16 years ago[ARM] Orion: add Linksys WRT350N v2 support
Lennert Buytenhek [Sat, 31 May 2008 06:19:20 +0000 (08:19 +0200)]
[ARM] Orion: add Linksys WRT350N v2 support

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Tested-by: Dirk Teurlings <dirk@upexia.nl>
Tested-by: Peter van Valderen <p.v.valderen@gmail.com>
16 years ago[ARM] Orion: add 88F5181L (Orion-VoIP) support
Lennert Buytenhek [Sat, 31 May 2008 06:30:40 +0000 (08:30 +0200)]
[ARM] Orion: add 88F5181L (Orion-VoIP) support

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Russell King <linux@arm.linux.org.uk>
16 years ago[ARM] Orion: add QNAP TS-409 support
Sylver Bruneau [Sat, 26 Apr 2008 00:35:29 +0000 (02:35 +0200)]
[ARM] Orion: add QNAP TS-409 support

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
16 years ago[ARM] Orion: implement power-off method for Kurobox Pro
Sylver Bruneau [Wed, 30 Apr 2008 06:14:58 +0000 (08:14 +0200)]
[ARM] Orion: implement power-off method for Kurobox Pro

This patch implements the communication with the microcontroller on the
Kurobox Pro and Linkstation Pro/Live boards.  This is allowing to send
the commands needed to power-off the board correctly.

Signed-off-by: Sylver Bruneau <sylver.bruneau@googlemail.com>
Acked-by: Russell King <linux@arm.linux.org.uk>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
16 years ago[ARM] Orion: avoid setting ->force_phy_addr
Lennert Buytenhek [Wed, 28 May 2008 14:17:39 +0000 (16:17 +0200)]
[ARM] Orion: avoid setting ->force_phy_addr

The mv643xx_eth platform data field ->force_phy_addr only needs
to be set if the passed-in ->phy_addr field is zero (to distinguish
the case of not having specified a phy address
(force_phy_addr = 0) from the case where a phy address of zero needs
to be used (force_phy_addr = 1.))

Also, the ->force_phy_addr field will hopefully disappear in a
future mv643xx_eth reorganisation.

Therefore, this patch deletes the ->force_phy_addr field initialiser
from all Orion board code.

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
16 years ago[ARM] Orion: remove error printks in ->map_irq() implementations
Lennert Buytenhek [Fri, 6 Jun 2008 10:32:59 +0000 (12:32 +0200)]
[ARM] Orion: remove error printks in ->map_irq() implementations

If all PCI devices are working as expected, the error printks in the
various implementations of ->map_irq() doesn't really provide any
useful info.  And if something is not working as expected, turning
on pci=debug gives you more useful information than the printk calls
in ->map_irq(), since the former also tells you which devices _did_
get IRQs successfully assigned.  Therefore, delete these printks
entirely.

Spotted by Russell King.

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Russell King <linux@arm.linux.org.uk>
16 years ago[ARM] Orion: rework MPP handling
Lennert Buytenhek [Sat, 10 May 2008 21:25:46 +0000 (23:25 +0200)]
[ARM] Orion: rework MPP handling

Instead of having board code poke directly into the MPP configuration
registers, and separately calling orion5x_gpio_set_valid_pins() to
indicate which MPP pins can be used as GPIO pins, introduce a helper
function for configuring the roles of each of the MPP pins, and have
that helper function handle gpio validity internally.

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Sylver Bruneau <sylver.bruneau@googlemail.com>
Acked-by: Russell King <linux@arm.linux.org.uk>
16 years ago[ARM] Orion: move setting up PCIe WA window into PCIe setup path
Lennert Buytenhek [Sat, 10 May 2008 15:01:18 +0000 (17:01 +0200)]
[ARM] Orion: move setting up PCIe WA window into PCIe setup path

It makes no sense to do PCIe WA window setup in the individual
board support files while the decision whether or not to use the
PCIe WA access method is made in a different place, in the PCIe
support code.

This patch moves the configuration of a PCIe WA window from the
individual Orion board support files to the central Orion PCIe
support code.

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Russell King <linux@arm.linux.org.uk>
16 years ago[ARM] Orion: move EHCI/I2C/UART peripheral init into board code
Lennert Buytenhek [Tue, 22 Apr 2008 03:37:12 +0000 (05:37 +0200)]
[ARM] Orion: move EHCI/I2C/UART peripheral init into board code

This patch moves initialisation of EHCI/I2C/UART platform devices
from the common orion5x_init() into the board support code.

The rationale behind this is that only the board support code knows
whether certain peripherals have been brought out on the board, and
not initialising peripherals that haven't been brought out is
desirable for example:
- to reduce user confusion (e.g. seeing both 'eth0' and 'eth1'
  appear while there is only one ethernet port on the board); and
- to allow for future power savings (peripherals that have not
  been brought out can be clock gated off entirely).

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Russell King <linux@arm.linux.org.uk>
16 years ago[ARM] Orion: delete unused IO_SPACE_REMAP define
Lennert Buytenhek [Wed, 28 May 2008 14:20:56 +0000 (16:20 +0200)]
[ARM] Orion: delete unused IO_SPACE_REMAP define

This define isn't used anywhere in the kernel tree -- nuke it.

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Russell King <linux@arm.linux.org.uk>
16 years ago[ARM] Orion: top-level IRQs are level-triggered
Lennert Buytenhek [Sun, 18 May 2008 17:46:59 +0000 (19:46 +0200)]
[ARM] Orion: top-level IRQs are level-triggered

Make it clear that Orion top-level IRQs are level-triggered.  This
means that we don't need an ->ack() handler, or at least, we don't
need the ->ack() handler (or the acking part of the ->mask_ack()
handler) to actually do anything.

Given that, we might as well point our ->mask_ack() handler at the
->mask() handler instead of providing a dummy ->ack() handler, since
providing a ->mask_ack() handler on level IRQ sources will prevent
->ack() from ever being called.

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Russell King <linux@arm.linux.org.uk>
16 years ago[ARM] Feroceon: annotate 88fr531-vd CPU entries
Lennert Buytenhek [Fri, 11 Apr 2008 21:08:26 +0000 (23:08 +0200)]
[ARM] Feroceon: annotate 88fr531-vd CPU entries

Annotate the entries for the 88fr531-vd CPU core in
arch/arm/boot/compressed/head.S and arch/arm/mm/proc-feroceon.S
with the full name of the core.

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Russell King <linux@arm.linux.org.uk>
16 years ago[ARM] Orion: DRAM mapping granularity is 64KiB, not 16MiB
Lennert Buytenhek [Fri, 23 May 2008 06:34:42 +0000 (08:34 +0200)]
[ARM] Orion: DRAM mapping granularity is 64KiB, not 16MiB

The DRAM base address and size fields in the CPU's MBUS bridge have
64KiB granularity, instead of the currently used 16MiB.  Since all
of the currently supported MBUS peripherals support 64KiB granularity
as well, this patch changes the Orion address map code to stop
rounding base addresses down and sizes up to multiples of 16MiB.

Found by Ke Wei <kewei@marvell.com>.

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Russell King <linux@arm.linux.org.uk>
16 years ago[ARM] Orion: make window setup a little more safe
Lennert Buytenhek [Sat, 10 May 2008 21:20:50 +0000 (23:20 +0200)]
[ARM] Orion: make window setup a little more safe

Currently, Orion window setup uses hardcoded window indexes for each
of the boot/cs0/cs1/cs2/PCIe WA windows.  The static window allocation
used can clash if board support code will ever attempt to configure
both a dev2 and a PCIe WA window, as both of those use CPU mbus window
#7 at present.

This patch keeps track of the last used window, and opens subsequently
requested windows sequentially, starting from 4.  (Windows 0-3 are used
as MEM/IO windows for the PCI/PCIe buses.)

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
16 years ago[ARM] Orion: fix various whitespace and coding style issues
Lennert Buytenhek [Sat, 10 May 2008 14:30:01 +0000 (16:30 +0200)]
[ARM] Orion: fix various whitespace and coding style issues

More cosmetic cleanup:
- Replace 8-space indents by proper tab indents.
- In structure initialisers, use a trailing comma for every member.
- Collapse "},\n{" in structure initialiers to "}, {".

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Russell King <linux@arm.linux.org.uk>
16 years ago[ARM] cache align memset and memzero
Nicolas Pitre [Sat, 12 Apr 2008 01:04:28 +0000 (21:04 -0400)]
[ARM] cache align memset and memzero

This is a natural extension following the previous patch.
Non Feroceon based targets are unchanged.

Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
16 years ago[ARM] cache align destination pointer when copying memory for some processors
Nicolas Pitre [Mon, 31 Mar 2008 16:38:31 +0000 (12:38 -0400)]
[ARM] cache align destination pointer when copying memory for some processors

The implementation for memory copy functions on ARM had a (disabled)
provision for aligning the source pointer before loading registers with
data.  Turns out that aligning the _destination_ pointer is much more
useful, as the read side is already sufficiently helped with the use of
preload.

So this changes the definition of the CALGN() macro to target the
destination pointer instead, and turns it on for Feroceon processors
where the gain is very noticeable.

Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
16 years ago[ARM] fix cache alignment code in memset.S
Nicolas Pitre [Wed, 11 Jun 2008 16:40:13 +0000 (12:40 -0400)]
[ARM] fix cache alignment code in memset.S

This code is currently disabled, which explains why no one was affected.

Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
16 years ago[ARM] latencytop support
Nicolas Pitre [Thu, 24 Apr 2008 05:31:46 +0000 (01:31 -0400)]
[ARM] latencytop support

Available for !SMP only at the moment.

From Russell:

|Basically, if a thread is running on a CPU, thread_saved_fp() is invalid.
|So, the question is: what guarantees do we have here that 'tsk' is not
|running on another CPU?

Signed-off-by: Nicolas Pitre <nico@marvell.com>
Tested-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
16 years ago[ARM] Orion: update defconfig to 2.6.26-rc4
Nicolas Pitre [Mon, 5 May 2008 19:21:28 +0000 (15:21 -0400)]
[ARM] Orion: update defconfig to 2.6.26-rc4

Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
16 years agoLinux 2.6.26-rc7 v2.6.26-rc7
Linus Torvalds [Fri, 20 Jun 2008 23:19:44 +0000 (16:19 -0700)]
Linux 2.6.26-rc7

16 years agoMerge git://git.kernel.org/pub/scm/linux/kernel/git/bart/ide-2.6
Linus Torvalds [Fri, 20 Jun 2008 19:46:47 +0000 (12:46 -0700)]
Merge git://git.kernel.org/pub/scm/linux/kernel/git/bart/ide-2.6

* git://git.kernel.org/pub/scm/linux/kernel/git/bart/ide-2.6:
  BAST: Remove old IDE driver
  pcmcia ide kingston compactflash's have a new manufacturer id
  pcmcia: add another pata/ide ID
  pcmcia: add an pata/ide ID
  ide: increase timeout in wait_drive_not_busy()
  palm_bk3710: fix resource management

16 years agoMerge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/ieee1394...
Linus Torvalds [Fri, 20 Jun 2008 19:41:10 +0000 (12:41 -0700)]
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/ieee1394/linux1394-2.6

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/ieee1394/linux1394-2.6:
  ieee1394: Kconfig menu touch-up
  firewire: Kconfig menu touch-up
  firewire: deadline for PHY config transmission
  firewire: fw-ohci: unify printk prefixes
  firewire: fill_bus_reset_event needs lock protection
  firewire: fw-ohci: write selfIDBufferPtr before LinkControl.rcvSelfID
  firewire: fw-ohci: disable PHY packet reception into AR context
  firewire: fw-ohci: use of uninitialized data in AR handler
  firewire: don't panic on invalid AR request buffer

16 years agoMerge branch 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux...
Linus Torvalds [Fri, 20 Jun 2008 19:39:12 +0000 (12:39 -0700)]
Merge branch 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux-acpi-2.6

* 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux-acpi-2.6:
  ACPI: no AC status notification
  ACPI Exception (video-1721): UNKNOWN_STATUS_CODE, Cant attach device

16 years agoMerge branch 'drm-patches' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied...
Linus Torvalds [Fri, 20 Jun 2008 19:38:18 +0000 (12:38 -0700)]
Merge branch 'drm-patches' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6

* 'drm-patches' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6: (21 commits)
  drm: only trust core drm ioctls - driver ioctls are a mess.
  drm/i915: add support for Intel series 4 chipsets.
  drm/radeon: add hier-z registers for r300 and r500 chipsets
  drm/radeon: use DSTCACHE_CTLSTAT rather than RB2D_DSTCACHE_CTLSTAT
  drm/radeon: switch IGP gart to use radeon_write_agp_base()
  drm/radeon: Restore sw interrupt on resume
  drm/r500: add support for AGP based cards.
  drm/radeon: fix texture uploads with large 3d textures (bug 13980)
  drm/radeon: add initial r500 support.
  drm/radeon: init pipe setup in kernel code.
  drm/radeon: fixup radeon_do_engine_reset
  drm/radeon: fix pixcache and purge/cache flushing registers
  drm/radeon: write AGP_BASE_2 on chips that support it.
  drm/radeon: merge IGP chip setup and fixup RS400 vs RS480 support
  drm/radeon: IGP clean up register and magic numbers.
  drm/rs690: set base 2 to 0.
  drm/rs690: set all of gart base address.
  radeon: add production microcode from AMD
  drm: pcigart use proper pci map interfaces.
  drm: the sg alloc ioctl should write back the handle to userspace
  ...

16 years agoMerge branch 'agp-patches' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied...
Linus Torvalds [Fri, 20 Jun 2008 19:37:55 +0000 (12:37 -0700)]
Merge branch 'agp-patches' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/agp-2.6

* 'agp-patches' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/agp-2.6:
  [agp]: fixup chipset flush for new Intel G4x.
  agp: brown paper bag patch - put back the two lines it took out.

16 years agoMerge branch 'core-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
Linus Torvalds [Fri, 20 Jun 2008 19:37:13 +0000 (12:37 -0700)]
Merge branch 'core-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip

* 'core-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
  softlockup: fix NMI hangs due to lock race - 2.6.26-rc regression
  rcupreempt: remove export of rcu_batches_completed_bh
  cpuset: limit the input of cpuset.sched_relax_domain_level

16 years agoMerge branch 'sched-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
Linus Torvalds [Fri, 20 Jun 2008 19:36:55 +0000 (12:36 -0700)]
Merge branch 'sched-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip

* 'sched-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
  sched, delay accounting: fix incorrect delay time when constantly waiting on runqueue
  sched: CPU hotplug events must not destroy scheduler domains created by the cpusets
  sched: rt-group: fix RR buglet
  sched: rt-group: heirarchy aware throttle
  sched: rt-group: fix hierarchy
  sched: NULL pointer dereference while setting sched_rt_period_us
  sched: fix defined-but-unused warning

16 years agoMerge branch 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...
Linus Torvalds [Fri, 20 Jun 2008 19:36:38 +0000 (12:36 -0700)]
Merge branch 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip

* 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
  x86, geode: add a VSA2 ID for General Software
  x86: use BOOTMEM_EXCLUSIVE on 32-bit
  x86, 32-bit: fix boot failure on TSC-less processors
  x86: fix NULL pointer deref in __switch_to
  x86: set PAE PHYSICAL_MASK_SHIFT to 44 bits.

16 years agoMerge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cooloney...
Linus Torvalds [Fri, 20 Jun 2008 19:34:43 +0000 (12:34 -0700)]
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cooloney/blackfin-2.6

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cooloney/blackfin-2.6:
  Blackfin Serial Driver: Use timer to poll CTS PIN instead of workqueue.
  Blackfin arch: fix typo error in bf548 serial header file

16 years agoMerge branch 'upstream-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jgarzi...
Linus Torvalds [Fri, 20 Jun 2008 19:31:03 +0000 (12:31 -0700)]
Merge branch 'upstream-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jgarzik/libata-dev

* 'upstream-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jgarzik/libata-dev:
  ahci: sis can't do PMP
  ata_piix: add TECRA M4 to broken suspend list
  LIBATA: Add HAVE_PATA_PLATFORM to select PATA_PLATFORM driver
  sata_mv: warn on PIO with multiple DRQs
  sata_mv: enable async_notify for 60x1 Rev.C0 and higher
  libata: don't check whether to use DMA or not for no data commands
  ahci: jmb361 has only one port

16 years ago[watchdog] hpwdt: fix use of inline assembly
Linus Torvalds [Fri, 20 Jun 2008 19:19:28 +0000 (12:19 -0700)]
[watchdog] hpwdt: fix use of inline assembly

The inline assembly in drivers/watchdog/hpwdt.c was incredibly broken,
and included all the function prologue and epilogue stuff, even though
it was itself then inside a C function where the compiler would add its
own prologue and epilogue on top of it all.

This then just _happened_ to work if you had exactly the right compiler
version and exactly the right compiler flags, so that gcc just happened
to not create any prologue at all (the gcc-generated epilogue wouldn't
matter, since it would never be reached).

But the more proper way to fix it is to simply not do this.  Move the
inline asm to the top level, with no surrounding function at all (the
better alternative would be to remove the prologue and make it actually
use proper description of the arguments to the inline asm, but that's a
bigger change than the one I'm willing to make right now).

Tested-by: S.Çağlar Onur <caglar@pardus.org.tr>
Acked-by: Thomas Mingarelli <Thomas.Mingarelli@hp.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
16 years agoBAST: Remove old IDE driver
Ben Dooks [Fri, 20 Jun 2008 18:53:35 +0000 (20:53 +0200)]
BAST: Remove old IDE driver

Remove the old BAST IDE driver, as we are now using the platform-pata
support.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Cc: Jeff Garzik <jgarzik@pobox.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
16 years agopcmcia ide kingston compactflash's have a new manufacturer id
Christophe Niclaes [Fri, 20 Jun 2008 18:53:34 +0000 (20:53 +0200)]
pcmcia ide kingston compactflash's have a new manufacturer id

Up to now, Kingston compactflash cards (ab)used the Toshiba Manufacturer's ID,
In their new CF cards, they use a new one.  Let's the ide subsystem
recognize CF cards with the new id.

Signed-off-by: Christophe Niclaes <cniclaes@develtech.com>
Acked-by: Philippe De Muyter <phdm@macqel.be>
Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>
Cc: Dominik Brodowski <linux@dominikbrodowski.net>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
16 years agopcmcia: add another pata/ide ID
Kristoffer Ericson [Fri, 20 Jun 2008 18:53:34 +0000 (20:53 +0200)]
pcmcia: add another pata/ide ID

Addition of Transcend 1GB 45x id so that it is properly detected.

[bart: fix typo in ide-cs's ID spotted by Alan Cox]

Signed-off-by: William Peters <w1ll14@gmail.com>
Signed-off-by: Kristoffer Ericson <Kristoffer_e1@hotmail.com>
CC: Alan Cox <alan@lxorguk.ukuu.org.uk>
CC: linux-ide@vger.kernel.org
Signed-off-by: Dominik Brodowski <linux@dominikbrodowski.net>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
16 years agopcmcia: add an pata/ide ID
Matt Reimer [Fri, 20 Jun 2008 18:53:34 +0000 (20:53 +0200)]
pcmcia: add an pata/ide ID

Add an id for:

product info: "M-Systems", "CF300", ""
manfid: 0x000a, 0x0000
function: 4 (fixed disk)

Signed-off-by: Matt Reimer <mreimer@vpop.net>
CC: Alan Cox <alan@lxorguk.ukuu.org.uk>
CC: linux-ide@vger.kernel.org
Signed-off-by: Dominik Brodowski <linux@dominikbrodowski.net>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
16 years agoide: increase timeout in wait_drive_not_busy()
Bartlomiej Zolnierkiewicz [Fri, 20 Jun 2008 18:53:33 +0000 (20:53 +0200)]
ide: increase timeout in wait_drive_not_busy()

Some ATAPI devices take longer than the current max timeout value to
become ready (i.e. TEAC DV-W28ECW takes 6 ms) so increase the timeout
value to 10 ms.

This fixes kernel.org bugzilla bug #10887:
http://bugzilla.kernel.org/show_bug.cgi?id=10887

Reported-by: Masanari Iida <standby24x7@gmail.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
16 years agopalm_bk3710: fix resource management
Sergei Shtylyov [Fri, 20 Jun 2008 18:53:32 +0000 (20:53 +0200)]
palm_bk3710: fix resource management

The driver expected a *virtual* address in the IDE platform device's memory
resource and didn't request the memory region for the register block. Fix this
taking into account the fact that DaVinci SoC devices are fixed-mapped to the
virtual memory early and we can get their virtual addresses using IO_ADDRESS()
macro, not having to call ioremap()...

While at it, also do some cosmetic changes...

Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
16 years agoReinstate ZERO_PAGE optimization in 'get_user_pages()' and fix XIP
Linus Torvalds [Fri, 20 Jun 2008 18:18:25 +0000 (11:18 -0700)]
Reinstate ZERO_PAGE optimization in 'get_user_pages()' and fix XIP

KAMEZAWA Hiroyuki and Oleg Nesterov point out that since the commit
557ed1fa2620dc119adb86b34c614e152a629a80 ("remove ZERO_PAGE") removed
the ZERO_PAGE from the VM mappings, any users of get_user_pages() will
generally now populate the VM with real empty pages needlessly.

We used to get the ZERO_PAGE when we did the "handle_mm_fault()", but
since fault handling no longer uses ZERO_PAGE for new anonymous pages,
we now need to handle that special case in follow_page() instead.

In particular, the removal of ZERO_PAGE effectively removed the core
file writing optimization where we would skip writing pages that had not
been populated at all, and increased memory pressure a lot by allocating
all those useless newly zeroed pages.

This reinstates the optimization by making the unmapped PTE case the
same as for a non-existent page table, which already did this correctly.

While at it, this also fixes the XIP case for follow_page(), where the
caller could not differentiate between the case of a page that simply
could not be used (because it had no "struct page" associated with it)
and a page that just wasn't mapped.

We do that by simply returning an error pointer for pages that could not
be turned into a "struct page *".  The error is arbitrarily picked to be
EFAULT, since that was what get_user_pages() already used for the
equivalent IO-mapped page case.

[ Also removed an impossible test for pte_offset_map_lock() failing:
  that's not how that function works ]

Acked-by: Oleg Nesterov <oleg@tv-sign.ru>
Acked-by: Nick Piggin <npiggin@suse.de>
Cc: KAMEZAWA Hiroyuki <kamezawa.hiroyu@jp.fujitsu.com>
Cc: Hugh Dickins <hugh@veritas.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Roland McGrath <roland@redhat.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
16 years agoMerge branch 'bugzilla-9761' into release
Len Brown [Fri, 20 Jun 2008 06:47:16 +0000 (02:47 -0400)]
Merge branch 'bugzilla-9761' into release

16 years agoMerge branch 'bugzilla-10695' into release
Len Brown [Fri, 20 Jun 2008 06:45:05 +0000 (02:45 -0400)]
Merge branch 'bugzilla-10695' into release

16 years agodrm: only trust core drm ioctls - driver ioctls are a mess.
Dave Airlie [Fri, 20 Jun 2008 05:42:38 +0000 (15:42 +1000)]
drm: only trust core drm ioctls - driver ioctls are a mess.

So driver ioctls need a full auditing before we can make this change.

Signed-off-by: Dave Airlie <airlied@redhat.com>
16 years agodrm/i915: add support for Intel series 4 chipsets.
Zhenyu Wang [Fri, 20 Jun 2008 02:12:56 +0000 (12:12 +1000)]
drm/i915: add support for Intel series 4 chipsets.

Signed-off-by: Zhenyu Wang <zhenyu.z.wang@intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
16 years ago[agp]: fixup chipset flush for new Intel G4x.
Zhenyu Wang [Fri, 20 Jun 2008 01:48:06 +0000 (11:48 +1000)]
[agp]: fixup chipset flush for new Intel G4x.

Signed-off-by: Zhenyu Wang <zhenyu.z.wang@intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
16 years agox86, geode: add a VSA2 ID for General Software
Jordan Crouse [Wed, 18 Jun 2008 17:34:38 +0000 (11:34 -0600)]
x86, geode: add a VSA2 ID for General Software

General Software writes their own VSA2 module for their version
of the Geode BIOS, which returns a different ID then the standard
VSA2.  This was causing the framebuffer driver to break for most
GSW boards.

Signed-off-by: Jordan Crouse <jordan.crouse@amd.com>
Cc: tglx@linutronix.de
Cc: linux-geode@lists.infradead.org
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agosched, delay accounting: fix incorrect delay time when constantly waiting on runqueue
Bharath Ravi [Mon, 16 Jun 2008 09:41:01 +0000 (15:11 +0530)]
sched, delay accounting: fix incorrect delay time when constantly waiting on runqueue

This patch corrects the incorrect value of per process run-queue wait
time reported by delay statistics. The anomaly was due to the following
reason. When a process leaves the CPU and immediately starts waiting for
CPU on the runqueue (which means it remains in the TASK_RUNNABLE state),
the time of re-entry into the run-queue is never recorded. Due to this,
the waiting time on the runqueue from this point of re-entry upto the
next time it hits the CPU is not accounted for. This is solved by
recording the time of re-entry of a process leaving the CPU in the
sched_info_depart() function IF the process will go back to waiting on
the run-queue. This IF condition is verified by checking whether the
process is still in the TASK_RUNNABLE state.

The patch was tested on 2.6.26-rc6 using two simple CPU hog programs.
The values noted prior to the fix did not account for the time spent on
the runqueue waiting. After the fix, the correct values were reported
back to user space.

Signed-off-by: Bharath Ravi <bharathravi1@gmail.com>
Signed-off-by: Madhava K R <madhavakr@gmail.com>
Cc: dhaval@linux.vnet.ibm.com
Cc: vatsa@in.ibm.com
Cc: balbir@in.ibm.com
Acked-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agoBlackfin Serial Driver: Use timer to poll CTS PIN instead of workqueue.
Sonic Zhang [Thu, 19 Jun 2008 09:46:39 +0000 (17:46 +0800)]
Blackfin Serial Driver: Use timer to poll CTS PIN instead of workqueue.

This allows other threads to run when the serial driver polls the CTS
PIN in a loop.

Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
16 years agoBlackfin arch: fix typo error in bf548 serial header file
Sonic Zhang [Thu, 19 Jun 2008 09:07:15 +0000 (17:07 +0800)]
Blackfin arch: fix typo error in bf548 serial header file

Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
16 years agox86: use BOOTMEM_EXCLUSIVE on 32-bit
Bernhard Walle [Sun, 8 Jun 2008 14:16:07 +0000 (16:16 +0200)]
x86: use BOOTMEM_EXCLUSIVE on 32-bit

This patch uses the BOOTMEM_EXCLUSIVE for crashkernel reservation also for
i386 and prints a error message on failure.

The patch is still for 2.6.26 since it is only bug fixing. The unification
of reserve_crashkernel() between i386 and x86_64 should be done for 2.6.27.

Signed-off-by: Bernhard Walle <bwalle@suse.de>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Cc: <stable@kernel.org>
16 years agox86, 32-bit: fix boot failure on TSC-less processors
Mikael Pettersson [Sun, 15 Jun 2008 00:19:56 +0000 (02:19 +0200)]
x86, 32-bit: fix boot failure on TSC-less processors

Booting 2.6.26-rc6 on my 486 DX/4 fails with a "BUG: Int 6"
(invalid opcode) and a kernel halt immediately after the
kernel has been uncompressed. The BUG shows EIP pointing
to an rdtsc instruction in native_read_tsc(), invoked from
native_sched_clock().

(This error occurs so early that not even the serial console
can capture it.)

A bisection showed that this bug first occurs in 2.6.26-rc3-git7,
via commit 9ccc906c97e34fd91dc6aaf5b69b52d824386910:

>x86: distangle user disabled TSC from unstable
>
>tsc_enabled is set to 0 from the command line switch "notsc" and from
>the mark_tsc_unstable code. Seperate those functionalities and replace
>tsc_enable with tsc_disable. This makes also the native_sched_clock()
>decision when to use TSC understandable.
>
>Preparatory patch to solve the sched_clock() issue on 32 bit.
>
>Signed-off-by: Thomas Gleixner <tglx@linutronix.de>

The core reason for this bug is that native_sched_clock() gets
called before tsc_init().

Before the commit above, tsc_32.c used a "tsc_enabled" variable
which defaulted to 0 == disabled, and which only got enabled late
in tsc_init(). Thus early calls to native_sched_clock() would skip
the TSC and use jiffies instead.

After the commit above, tsc_32.c uses a "tsc_disabled" variable
which defaults to 0, meaning that the TSC is Ok to use. Early calls
to native_sched_clock() now erroneously try to use the TSC on
!cpu_has_tsc processors, leading to invalid opcode exceptions.

My proposed fix is to initialise tsc_disabled to a "soft disabled"
state distinct from the hard disabled state set up by the "notsc"
kernel option. This fixes the native_sched_clock() problem. It also
allows tsc_init() to be simplified: instead of setting tsc_disabled = 1
on every error return, we just set tsc_disabled = 0 once when all
checks have succeeded.

I've verified that this lets my 486 boot again. I've also verified
that a Core2 machine still uses the TSC as clocksource after the patch.

Signed-off-by: Mikael Pettersson <mikpe@it.uu.se>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agox86: fix NULL pointer deref in __switch_to
Suresh Siddha [Fri, 13 Jun 2008 22:47:12 +0000 (15:47 -0700)]
x86: fix NULL pointer deref in __switch_to

Patrick McHardy reported a crash:

> > I get this oops once a day, its apparently triggered by something
> > run by cron, but the process is a different one each time.
> >
> > Kernel is -git from yesterday shortly before the -rc6 release
> > (last commit is the usb-2.6 merge, the x86 patches are missing),
> > .config is attached.
> >
> > I'll retry with current -git, but the patches that have gone in
> > since I last updated don't look related.
> >
> > [62060.043009] BUG: unable to handle kernel NULL pointer dereference at
> > 000001ff
> > [62060.043009] IP: [<c0102a9b>] __switch_to+0x2f/0x118
> > [62060.043009] *pde = 00000000
> > [62060.043009] Oops: 0002 [#1] PREEMPT

Vegard Nossum analyzed it:

> This decodes to
>
>    0:   0f ae 00                fxsave (%eax)
>
> so it's related to the floating-point context. This is the exact
> location of the crash:
>
> $ addr2line -e arch/x86/kernel/process_32.o -i ab0
> include/asm/i387.h:232
> include/asm/i387.h:262
> arch/x86/kernel/process_32.c:595
>
> ...so it looks like prev_task->thread.xstate->fxsave has become NULL.
> Or maybe it never had any other value.

Somehow (as described below) TS_USEDFPU is set but the fpu is not
allocated or freed.

Another possible FPU pre-emption issue with the sleazy FPU optimization
which was benign before but not so anymore, with the dynamic FPU allocation
patch.

New task is getting exec'd and it is prempted at the below point.

flush_thread() {
...
/*
* Forget coprocessor state..
*/
clear_fpu(tsk);
<----- Preemption point
clear_used_math();
...
}

Now when it context switches in again, as the used_math() is still set
and fpu_counter can be > 5, we will do a math_state_restore() which sets
the task's TS_USEDFPU. After it continues from the above preemption point
it does clear_used_math() and much later free_thread_xstate().

Now, at the next context switch, it is quite possible that xstate is
null, used_math() is not set and TS_USEDFPU is still set. This will
trigger unlazy_fpu() causing kernel oops.

Fix this  by clearing tsk's fpu_counter before clearing task's fpu.

Reported-by: Patrick McHardy <kaber@trash.net>
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agox86: set PAE PHYSICAL_MASK_SHIFT to 44 bits.
Jeremy Fitzhardinge [Fri, 6 Jun 2008 09:21:39 +0000 (10:21 +0100)]
x86: set PAE PHYSICAL_MASK_SHIFT to 44 bits.

When a 64-bit x86 processor runs in 32-bit PAE mode, a pte can
potentially have the same number of physical address bits as the
64-bit host ("Enhanced Legacy PAE Paging").  This means, in theory,
we could have up to 52 bits of physical address in a pte.

The 32-bit kernel uses a 32-bit unsigned long to represent a pfn.
This means that it can only represent physical addresses up to 32+12=44
bits wide.  Rather than widening pfns everywhere, just set 2^44 as the
Linux x86_32-PAE architectural limit for physical address size.

This is a bugfix for two cases:
1. running a 32-bit PAE kernel on a machine with
  more than 64GB RAM.
2. running a 32-bit PAE Xen guest on a host machine with
  more than 64GB RAM

In both cases, a pte could need to have more than 36 bits of physical,
and masking it to 36-bits will cause fairly severe havoc.

Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com>
Cc: Jan Beulich <jbeulich@novell.com>
Cc: <stable@kernel.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agosoftlockup: fix NMI hangs due to lock race - 2.6.26-rc regression
Jason Wessel [Tue, 27 May 2008 17:23:29 +0000 (12:23 -0500)]
softlockup: fix NMI hangs due to lock race - 2.6.26-rc regression

The touch_nmi_watchdog() routine on x86 ultimately calls
touch_softlockup_watchdog().  The problem is that to touch the
softlockup watchdog, the cpu_clock code has to be called which could
involve multiple cpu locks and can lead to a hard hang if one of the
locks is held by a processor that is not going to return anytime soon
(such as could be the case with kgdb or perhaps even with some other
kind of exception).

This patch causes the public version of the
touch_softlockup_watchdog() to defer the cpu clock access to a later
point.

The test case for this problem is to use the following kernel config
options:

CONFIG_KGDB_TESTS=y
CONFIG_KGDB_TESTS_ON_BOOT=y
CONFIG_KGDB_TESTS_BOOT_STRING="V1F100I100000"

It should be noted that kgdb test suite and these options were not
available until 2.6.26-rc2, so it was necessary to patch the kgdb
test suite during the bisection.

I would consider this patch a regression fix because the problem first
appeared in commit 27ec4407790d075c325e1f4da0a19c56953cce23 when some
logic was added to try to periodically sync the clocks.  It was
possible to work around this particular problem by simply not
performing the sync anytime the system was in a critical context.
This was ok until commit 3e51f33fcc7f55e6df25d15b55ed10c8b4da84cd,
which added config option CONFIG_HAVE_UNSTABLE_SCHED_CLOCK and some
multi-cpu locks to sync the clocks.  It became clear that accessing
this code from an nmi was the source of the lockups.  Avoiding the
access to the low level clock code from an code inside the NMI
processing also fixed the problem with the 27ec44... commit.

Signed-off-by: Jason Wessel <jason.wessel@windriver.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agorcupreempt: remove export of rcu_batches_completed_bh
Steven Rostedt [Thu, 22 May 2008 18:18:17 +0000 (14:18 -0400)]
rcupreempt: remove export of rcu_batches_completed_bh

In rcupreempt, rcu_batches_completed_bh is defined as a static inline in
the header file. This does not need to be exported, and not only that,
this breaks my PPC build.

Signed-off-by: Steven Rostedt <srostedt@redhat.com>
Cc: "Paul E. McKenney" <paulmck@linux.vnet.ibm.com>
Cc: paulus@samba.org
Cc: linuxppc-dev@ozlabs.org
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
16 years agocpuset: limit the input of cpuset.sched_relax_domain_level
Li Zefan [Tue, 13 May 2008 02:27:17 +0000 (10:27 +0800)]
cpuset: limit the input of cpuset.sched_relax_domain_level

We allow the inputs to be [-1 ... SD_LV_MAX), and return -EINVAL
for inputs outside this range.

Signed-off-by: Li Zefan <lizf@cn.fujitsu.com>
Acked-by: Paul Menage <menage@google.com>
Acked-by: Paul Jackson <pj@sgi.com>
Acked-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
16 years agoMerge branch 'linus' into sched/urgent
Ingo Molnar [Thu, 19 Jun 2008 07:37:31 +0000 (09:37 +0200)]
Merge branch 'linus' into sched/urgent

16 years agosched: CPU hotplug events must not destroy scheduler domains created by the cpusets
Max Krasnyansky [Thu, 29 May 2008 18:17:01 +0000 (11:17 -0700)]
sched: CPU hotplug events must not destroy scheduler domains created by the cpusets

First issue is not related to the cpusets. We're simply leaking doms_cur.
It's allocated in arch_init_sched_domains() which is called for every
hotplug event. So we just keep reallocation doms_cur without freeing it.
I introduced free_sched_domains() function that cleans things up.

Second issue is that sched domains created by the cpusets are
completely destroyed by the CPU hotplug events. For all CPU hotplug
events scheduler attaches all CPUs to the NULL domain and then puts
them all into the single domain thereby destroying domains created
by the cpusets (partition_sched_domains).
The solution is simple, when cpusets are enabled scheduler should not
create default domain and instead let cpusets do that. Which is
exactly what the patch does.

Signed-off-by: Max Krasnyansky <maxk@qualcomm.com>
Cc: pj@sgi.com
Cc: menage@google.com
Cc: rostedt@goodmis.org
Acked-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
16 years agosched: rt-group: fix RR buglet
Peter Zijlstra [Thu, 19 Jun 2008 07:06:59 +0000 (09:06 +0200)]
sched: rt-group: fix RR buglet

In tick_task_rt() we first call update_curr_rt() which can dequeue a runqueue
due to it running out of runtime, and then we try to requeue it, of it also
having exhausted its RR quota. Obviously requeueing something that is no longer
on the runqueue will not have the expected result.

Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Tested-by: Daniel K. <dk@uw.no>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agosched: rt-group: heirarchy aware throttle
Peter Zijlstra [Thu, 19 Jun 2008 07:06:57 +0000 (09:06 +0200)]
sched: rt-group: heirarchy aware throttle

The bandwidth throttle code dequeues a group when it runs out of quota, and
re-queues it once the period rolls over and the quota gets refreshed.

Sadly it failed to take the hierarchy into consideration. Share more of the
enqueue/dequeue code with regular task opterations.

Also, some operations like sched_setscheduler() can dequeue/enqueue tasks that
are in throttled runqueues, we should not inadvertly re-enqueue empty runqueues
so check for that.

Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Tested-by: Daniel K. <dk@uw.no>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agosched: rt-group: fix hierarchy
Peter Zijlstra [Thu, 19 Jun 2008 07:06:56 +0000 (09:06 +0200)]
sched: rt-group: fix hierarchy

Don't re-set the entity's runqueue to the wrong rq after we've set it
to the right one.

Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Tested-by: Daniel K. <dk@uw.no>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agosched: NULL pointer dereference while setting sched_rt_period_us
Dario Faggioli [Wed, 18 Jun 2008 07:18:38 +0000 (09:18 +0200)]
sched: NULL pointer dereference while setting sched_rt_period_us

When CONFIG_RT_GROUP_SCHED and CONFIG_CGROUP_SCHED are enabled, with:

 echo 10000 > /proc/sys/kernel/sched_rt_period_us

We get this:

 BUG: unable to handle kernel NULL pointer dereference at 0000008c
 [  947.682233] IP: [<c0216b72>] __rt_schedulable+0x12/0x160
 [  947.683123] *pde = 00000000=20
 [  947.683782] Oops: 0000 [#1]
 [  947.684307] Modules linked in:
 [  947.684308]
 [  947.684308] Pid: 2359, comm: bash Not tainted (2.6.26-rc6 #8)
 [  947.684308] EIP: 0060:[<c0216b72>] EFLAGS: 00000246 CPU: 0
 [  947.684308] EIP is at __rt_schedulable+0x12/0x160
 [  947.684308] EAX: 00000000 EBX: 00000000 ECX: 00000000 EDX: 00000001
 [  947.684308] ESI: c0521db4 EDI: 00000001 EBP: c6cc9f00 ESP: c6cc9ed0
 [  947.684308]  DS: 007b ES: 007b FS: 0000 GS: 0033 SS: 0068
 [  947.684308] Process bash (pid: 2359, tiÆcc8000 taskÇa54f00=20 task.tiÆcc8000)
 [  947.684308] Stack: c0222790 00000000 080f8c08 c0521db4 c6cc9f00 00000001 00000000 00000000
 [  947.684308]        c6cc9f9c 00000000 c0521db4 00000001 c6cc9f28 c0216d40 00000000 00000000
 [  947.684308]        c6cc9f9c 000f4240 000e7ef0 ffffffff c0521db4 c79dfb60 c6cc9f58 c02af2cc
 [  947.684308] Call Trace:
 [  947.684308]  [<c0222790>] ? do_proc_dointvec_conv+0x0/0x50
 [  947.684308]  [<c0216d40>] ? sched_rt_handler+0x80/0x110
 [  947.684308]  [<c02af2cc>] ? proc_sys_call_handler+0x9c/0xb0
 [  947.684308]  [<c02af2fa>] ? proc_sys_write+0x1a/0x20
 [  947.684308]  [<c0273c36>] ? vfs_write+0x96/0x160
 [  947.684308]  [<c02af2e0>] ? proc_sys_write+0x0/0x20
 [  947.684308]  [<c027423d>] ? sys_write+0x3d/0x70
 [  947.684308]  [<c0202ef5>] ? sysenter_past_esp+0x6a/0x91
 [  947.684308]  =======================
 [  947.684308] Code: 24 04 e8 62 b1 0e 00 89 c7 89 f8 8b 5d f4 8b 75
 f8 8b 7d fc 89 ec 5d c3 90 55 89 e5 57 56 53 83 ec 24 89 45 ec 89 55 e4
 89 4d e8 <8b> b8 8c 00 00 00 85 ff 0f 84 c9 00 00 00 8b 57 24 39 55 e8
 8b
 [  947.684308] EIP: [<c0216b72>] __rt_schedulable+0x12/0x160 SS:ESP  0068:c6cc9ed0

We think the following patch solves the issue.

Signed-off-by: Dario Faggioli <raistlin@linux.it>
Signed-off-by: Michael Trimarchi <trimarchimichael@yahoo.it>
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
16 years agoagp: brown paper bag patch - put back two lines that got lost
Dave Airlie [Thu, 19 Jun 2008 04:57:31 +0000 (14:57 +1000)]
agp: brown paper bag patch - put back two lines that got lost

Commit 62c96b9d0917894c164aa3e474a3ff3bca1554ae ("agp/intel: cleanup
some serious whitespace badness") didn't just fix whitespace.  It also
lost two lines.

Noticed by Linus. No more whitespace diffs for me.

Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
16 years agoagp: brown paper bag patch - put back the two lines it took out.
Dave Airlie [Thu, 19 Jun 2008 04:57:31 +0000 (14:57 +1000)]
agp: brown paper bag patch - put back the two lines it took out.

no more whitespace diffs for me.

Signed-off-by: Dave Airlie <airlied@redhat.com>
16 years agoMerge branch 'agp-patches' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied...
Linus Torvalds [Thu, 19 Jun 2008 04:52:35 +0000 (21:52 -0700)]
Merge branch 'agp-patches' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/agp-2.6

* 'agp-patches' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/agp-2.6:
  agp/intel: cleanup some serious whitespace badness
  [AGP] intel_agp: Add support for Intel 4 series chipsets
  [AGP] intel_agp: extra stolen mem size available for IGD_GM chipset
  agp: more boolean conversions.
  drivers/char/agp - use bool
  agp: two-stage page destruction issue
  agp/via: fixup pci ids

16 years agoagp/intel: cleanup some serious whitespace badness
Dave Airlie [Thu, 19 Jun 2008 04:27:53 +0000 (14:27 +1000)]
agp/intel: cleanup some serious whitespace badness

Signed-off-by: Dave Airlie <airlied@redhat.com>
16 years ago[AGP] intel_agp: Add support for Intel 4 series chipsets
Zhenyu Wang [Thu, 19 Jun 2008 04:17:58 +0000 (14:17 +1000)]
[AGP] intel_agp: Add support for Intel 4 series chipsets

Signed-off-by: Zhenyu Wang <zhenyu.z.wang@intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
16 years ago[AGP] intel_agp: extra stolen mem size available for IGD_GM chipset
Zhenyu Wang [Thu, 19 Jun 2008 04:00:37 +0000 (14:00 +1000)]
[AGP] intel_agp: extra stolen mem size available for IGD_GM chipset

This adds missing stolen memory size detect for IGD_GM, be sure to
detect right size as current X intel driver (2.3.2) which has already
worked out.

Signed-off-by: Zhenyu Wang <zhenyu.z.wang@intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
16 years agodrm/radeon: add hier-z registers for r300 and r500 chipsets
Dave Airlie [Thu, 19 Jun 2008 03:01:58 +0000 (13:01 +1000)]
drm/radeon: add hier-z registers for r300 and r500 chipsets

16 years agodrm/radeon: use DSTCACHE_CTLSTAT rather than RB2D_DSTCACHE_CTLSTAT
Alex Deucher [Thu, 19 Jun 2008 02:39:23 +0000 (12:39 +1000)]
drm/radeon: use DSTCACHE_CTLSTAT rather than RB2D_DSTCACHE_CTLSTAT

According to the hw guys, you should use DSTCACHE_CTLSTAT to flush
the 2D dst cache rather than RB2D_DSTCACHE_CTLSTAT.

Signed-off-by: Dave Airlie <airlied@redhat.com>
16 years agodrm/radeon: switch IGP gart to use radeon_write_agp_base()
Alex Deucher [Thu, 19 Jun 2008 02:38:29 +0000 (12:38 +1000)]
drm/radeon: switch IGP gart to use radeon_write_agp_base()

Signed-off-by: Dave Airlie <airlied@redhat.com>
16 years agodrm/radeon: Restore sw interrupt on resume
Dennis Kasprzyk [Thu, 19 Jun 2008 02:36:55 +0000 (12:36 +1000)]
drm/radeon: Restore sw interrupt on resume

Fixes performance drop after suspend/resume on some systems.

Signed-off-by: Dave Airlie <airlied@redhat.com>
16 years agodrm/r500: add support for AGP based cards.
Dave Airlie [Thu, 19 Jun 2008 01:40:44 +0000 (11:40 +1000)]
drm/r500: add support for AGP based cards.

AGP registers weren't programmed properly for r500 cards.

Signed-off-by: Dave Airlie <airlied@redhat.com>
16 years agodrm/radeon: fix texture uploads with large 3d textures (bug 13980)
Roland Scheidegger [Thu, 19 Jun 2008 01:36:04 +0000 (11:36 +1000)]
drm/radeon: fix texture uploads with large 3d textures (bug 13980)

Texture uploads could hit the blitter coordinate limit, adjust the texture
offset when uploading the pieces. Make sure to check the end address of the
upload too.

Signed-off-by: Dave Airlie <airlied@redhat.com>
16 years agodrm/radeon: add initial r500 support.
Dave Airlie [Wed, 28 May 2008 03:52:28 +0000 (13:52 +1000)]
drm/radeon: add initial r500 support.

This contains all the command buffer processing for the r500 cards.
It doesn't yet contain vblank support.

Signed-off-by: Dave Airlie <airlied@redhat.com>
16 years agodrm/radeon: init pipe setup in kernel code.
Alex Deucher [Wed, 28 May 2008 01:57:40 +0000 (11:57 +1000)]
drm/radeon: init pipe setup in kernel code.

This inits the card pipes in the kernel and lets userspace getparam
the correct setup.

Signed-off-by: Dave Airlie <airlied@redhat.com>
16 years agodrm/radeon: fixup radeon_do_engine_reset
Alex Deucher [Wed, 28 May 2008 01:54:06 +0000 (11:54 +1000)]
drm/radeon: fixup radeon_do_engine_reset

Cleanup do engine reset for different chip families.

Signed-off-by: Dave Airlie <airlied@redhat.com>
16 years agodrm/radeon: fix pixcache and purge/cache flushing registers
Alex Deucher [Wed, 28 May 2008 01:51:12 +0000 (11:51 +1000)]
drm/radeon: fix pixcache and purge/cache flushing registers

Signed-off-by: Dave Airlie <airlied@redhat.com>
16 years agodrm/radeon: write AGP_BASE_2 on chips that support it.
Alex Deucher [Wed, 28 May 2008 01:46:36 +0000 (11:46 +1000)]
drm/radeon: write AGP_BASE_2 on chips that support it.

Signed-off-by: Dave Airlie <airlied@redhat.com>
16 years agodrm/radeon: merge IGP chip setup and fixup RS400 vs RS480 support
Alex Deucher [Wed, 28 May 2008 03:28:59 +0000 (13:28 +1000)]
drm/radeon: merge IGP chip setup and fixup RS400 vs RS480 support

We only support RS480 (AMD based IGP) at the moment not
RS400 (Intel based IGP) ones.

Signed-off-by: Dave Airlie <airlied@redhat.com>
16 years agodrm/radeon: IGP clean up register and magic numbers.
Alex Deucher [Wed, 28 May 2008 02:54:16 +0000 (12:54 +1000)]
drm/radeon: IGP clean up register and magic numbers.

Signed-off-by: Dave Airlie <airlied@redhat.com>
16 years agodrm/rs690: set base 2 to 0.
Dave Airlie [Wed, 28 May 2008 01:28:27 +0000 (11:28 +1000)]
drm/rs690: set base 2 to 0.

Signed-off-by: Dave Airlie <airlied@redhat.com>
16 years agodrm/rs690: set all of gart base address.
Dave Airlie [Wed, 28 May 2008 01:27:01 +0000 (11:27 +1000)]
drm/rs690: set all of gart base address.

Docs state bits 4-11 maps to bits 32-39 of the 40-bit range

Signed-off-by: Dave Airlie <airlied@redhat.com>