From: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Date: Thu, 31 Jul 2008 14:06:58 +0000 (+0200)
Subject: avr32: Add MMIO address definitions for certain controllers
X-Git-Tag: v2.6.27-rc3~63^2~4
X-Git-Url: https://err.no/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=a8d902db221e1e2dcbbd32efbf89055ed69f8e56;p=linux-2.6

avr32: Add MMIO address definitions for certain controllers

Hardcoded MMIO base addresses are used a few places throughout the
platform code. Move these into the chip-specific header file so that
adding support for new chips becomes a bit easier.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
---

diff --git a/arch/avr32/mach-at32ap/clock.c b/arch/avr32/mach-at32ap/clock.c
index 4642117cc9..6c27ddac5a 100644
--- a/arch/avr32/mach-at32ap/clock.c
+++ b/arch/avr32/mach-at32ap/clock.c
@@ -16,6 +16,8 @@
 #include <linux/device.h>
 #include <linux/string.h>
 
+#include <mach/chip.h>
+
 #include "clock.h"
 
 static DEFINE_SPINLOCK(clk_lock);
diff --git a/arch/avr32/mach-at32ap/include/mach/at32ap700x.h b/arch/avr32/mach-at32ap/include/mach/at32ap700x.h
index d18a3053be..31b44e13ec 100644
--- a/arch/avr32/mach-at32ap/include/mach/at32ap700x.h
+++ b/arch/avr32/mach-at32ap/include/mach/at32ap700x.h
@@ -46,4 +46,12 @@
 #define DMAC_DMAREQ_2		9
 #define DMAC_DMAREQ_3		10
 
+/*
+ * Base addresses of controllers that may be accessed early by
+ * platform code.
+ */
+#define PM_BASE		0xfff00000
+#define HMATRIX_BASE	0xfff00800
+#define SDRAMC_BASE	0xfff03800
+
 #endif /* __ASM_ARCH_AT32AP700X_H__ */
diff --git a/arch/avr32/mach-at32ap/pm.c b/arch/avr32/mach-at32ap/pm.c
index a0cbef54fc..f021edfeaa 100644
--- a/arch/avr32/mach-at32ap/pm.c
+++ b/arch/avr32/mach-at32ap/pm.c
@@ -14,12 +14,10 @@
 #include <asm/cacheflush.h>
 #include <asm/sysreg.h>
 
+#include <mach/chip.h>
 #include <mach/pm.h>
 #include <mach/sram.h>
 
-/* FIXME: This is only valid for AP7000 */
-#define SDRAMC_BASE	0xfff03800
-
 #include "sdramc.h"
 
 #define SRAM_PAGE_FLAGS	(SYSREG_BIT(TLBELO_D) | SYSREG_BF(SZ, 1)	\
diff --git a/arch/avr32/mach-at32ap/pm.h b/arch/avr32/mach-at32ap/pm.h
index 694d521edc..532a3732c2 100644
--- a/arch/avr32/mach-at32ap/pm.h
+++ b/arch/avr32/mach-at32ap/pm.h
@@ -4,14 +4,6 @@
 #ifndef __ARCH_AVR32_MACH_AT32AP_PM_H__
 #define __ARCH_AVR32_MACH_AT32AP_PM_H__
 
-/*
- * We can reduce the code size a bit by using a constant here. Since
- * this file is only used on AVR32 AP CPUs with segmentation enabled,
- * it's safe to not use ioremap. Generic drivers should of course
- * never do this.
- */
-#define AT32_PM_BASE	0xfff00000
-
 /* PM register offsets */
 #define PM_MCCTRL				0x0000
 #define PM_CKSEL				0x0004
@@ -113,8 +105,8 @@
 
 /* Register access macros */
 #define pm_readl(reg)							\
-	__raw_readl((void __iomem __force *)AT32_PM_BASE + PM_##reg)
+	__raw_readl((void __iomem __force *)PM_BASE + PM_##reg)
 #define pm_writel(reg,value)						\
-	__raw_writel((value), (void __iomem __force *)AT32_PM_BASE + PM_##reg)
+	__raw_writel((value), (void __iomem __force *)PM_BASE + PM_##reg)
 
 #endif /* __ARCH_AVR32_MACH_AT32AP_PM_H__ */