From: Avi Kivity <avi@qumranet.com>
Date: Sun, 9 Dec 2007 14:37:36 +0000 (+0200)
Subject: KVM: MMU: Set nx bit correctly on shadow ptes
X-Git-Tag: v2.6.25-rc1~1138^2~50
X-Git-Url: https://err.no/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=8d87a03aea43535a92efbb180e0ceac94d4bb5db;p=linux-2.6

KVM: MMU: Set nx bit correctly on shadow ptes

While the page table walker correctly generates a guest page fault
if a guest tries to execute a non-executable page, the shadow code does
not mark it non-executable.  This means that if a guest accesses an nx
page first with a read access, then subsequent code fetch accesses will
succeed.

Fix by setting the nx bit on shadow ptes.

Signed-off-by: Avi Kivity <avi@qumranet.com>
---

diff --git a/drivers/kvm/paging_tmpl.h b/drivers/kvm/paging_tmpl.h
index 7688cbf413..59ba752a68 100644
--- a/drivers/kvm/paging_tmpl.h
+++ b/drivers/kvm/paging_tmpl.h
@@ -255,6 +255,8 @@ static void FNAME(set_pte)(struct kvm_vcpu *vcpu, pt_element_t gpte,
 	spte |= gpte & PT64_NX_MASK;
 	if (!dirty)
 		pte_access &= ~ACC_WRITE_MASK;
+	if (!(pte_access & ACC_EXEC_MASK))
+		spte |= PT64_NX_MASK;
 
 	page = gfn_to_page(vcpu->kvm, gfn);