From: Becky Bruce Date: Mon, 12 Feb 2007 23:43:46 +0000 (-0600) Subject: [POWERPC] 85xx: Don't write reserved values to MAS1[TSIZE] X-Git-Tag: v2.6.21-rc1~273^2~3^2~9^2~3 X-Git-Url: https://err.no/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=8ce0a7df6e6117d8814e976d4b7ce6a6b2c9cf93;p=linux-2.6 [POWERPC] 85xx: Don't write reserved values to MAS1[TSIZE] Some of the current tlbwe instructions early on in head_fsl_booke.S take advantage of unarchitected behavior that allows the writing of reserved values to the TSIZE field. This patch corrects that, as well as an error where an uninitialized (by linux) value was written into a MAS register and used for a tlbwe. Correct this for both arch/ppc and arch/powerpc. Signed-off-by: Becky Bruce Signed-off-by: Kumar Gala --- diff --git a/arch/powerpc/kernel/head_fsl_booke.S b/arch/powerpc/kernel/head_fsl_booke.S index 66877bdfe0..54f40d95cd 100644 --- a/arch/powerpc/kernel/head_fsl_booke.S +++ b/arch/powerpc/kernel/head_fsl_booke.S @@ -206,7 +206,8 @@ skpinv: addi r6,r6,1 /* Increment */ rlwimi r7,r3,16,4,15 /* Setup MAS0 = TLBSEL | ESEL(r3) */ mtspr SPRN_MAS0,r7 tlbre - li r6,0 + mfspr r6,SPRN_MAS1 + rlwinm r6,r6,0,2,0 /* clear IPROT */ mtspr SPRN_MAS1,r6 tlbwe /* Invalidate TLB1 */ @@ -248,6 +249,8 @@ skpinv: addi r6,r6,1 /* Increment */ rlwimi r7,r5,16,4,15 /* Setup MAS0 = TLBSEL | ESEL(r5) */ mtspr SPRN_MAS0,r7 tlbre + mfspr r8,SPRN_MAS1 + rlwinm r8,r8,0,2,0 /* clear IPROT */ mtspr SPRN_MAS1,r8 tlbwe /* Invalidate TLB1 */ diff --git a/arch/ppc/kernel/head_fsl_booke.S b/arch/ppc/kernel/head_fsl_booke.S index 66877bdfe0..54f40d95cd 100644 --- a/arch/ppc/kernel/head_fsl_booke.S +++ b/arch/ppc/kernel/head_fsl_booke.S @@ -206,7 +206,8 @@ skpinv: addi r6,r6,1 /* Increment */ rlwimi r7,r3,16,4,15 /* Setup MAS0 = TLBSEL | ESEL(r3) */ mtspr SPRN_MAS0,r7 tlbre - li r6,0 + mfspr r6,SPRN_MAS1 + rlwinm r6,r6,0,2,0 /* clear IPROT */ mtspr SPRN_MAS1,r6 tlbwe /* Invalidate TLB1 */ @@ -248,6 +249,8 @@ skpinv: addi r6,r6,1 /* Increment */ rlwimi r7,r5,16,4,15 /* Setup MAS0 = TLBSEL | ESEL(r5) */ mtspr SPRN_MAS0,r7 tlbre + mfspr r8,SPRN_MAS1 + rlwinm r8,r8,0,2,0 /* clear IPROT */ mtspr SPRN_MAS1,r8 tlbwe /* Invalidate TLB1 */