From: Matt Porter <mporter@kernel.crashing.org>
Date: Sat, 3 Sep 2005 22:55:42 +0000 (-0700)
Subject: [PATCH] ppc32: add cputable entry for 440SP Rev. A
X-Git-Tag: v2.6.14-rc1~917
X-Git-Url: https://err.no/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=656de7e46901fe3228b592e1d9fc89c353f0fa4e;p=linux-2.6

[PATCH] ppc32: add cputable entry for 440SP Rev. A

Adds the appropriate cputable entry for PPC440SP so cache line sizes are
configured correctly.

Signed-off-by: Matt Porter <mporter@kernel.crashing.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
---

diff --git a/arch/ppc/kernel/cputable.c b/arch/ppc/kernel/cputable.c
index 22c187c1f5..61382341bb 100644
--- a/arch/ppc/kernel/cputable.c
+++ b/arch/ppc/kernel/cputable.c
@@ -932,6 +932,16 @@ struct cpu_spec	cpu_specs[] = {
 		.icache_bsize		= 32,
 		.dcache_bsize		= 32,
 	},
+	{ /* 440SP Rev. A */
+		.pvr_mask		= 0xff000fff,
+		.pvr_value		= 0x53000891,
+		.cpu_name		= "440SP Rev. A",
+		.cpu_features		= CPU_FTR_SPLIT_ID_CACHE |
+			CPU_FTR_USE_TB,
+		.cpu_user_features	= PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
+		.icache_bsize		= 32,
+		.dcache_bsize		= 32,
+	},
 #endif /* CONFIG_44x */
 #ifdef CONFIG_FSL_BOOKE
 	{ 	/* e200z5 */