From: Mark Brown Date: Sun, 27 Jan 2008 13:58:11 +0000 (+0000) Subject: natsemi: Update locking documentation X-Git-Tag: v2.6.25-rc1~1065^2~19 X-Git-Url: https://err.no/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=6344f0521aac9f93c312826216762f2185268390;p=linux-2.6 natsemi: Update locking documentation The documentation regarding synchronisation at the head of the natsemi driver was badly bitrotted so replace it with a general statement about the techniques used which is less likely to bitrot. Also remove the note saying these chips are uncommon - it makes little difference but they were used in a number of laptops and at least one mass market PCI ethernet card. Signed-off-by: Mark Brown Signed-off-by: Jeff Garzik Signed-off-by: David S. Miller --- diff --git a/drivers/net/natsemi.c b/drivers/net/natsemi.c index c329a4f584..0a3e60418e 100644 --- a/drivers/net/natsemi.c +++ b/drivers/net/natsemi.c @@ -203,22 +203,8 @@ skbuff at an offset of "+2", 16-byte aligning the IP header. IIId. Synchronization Most operations are synchronized on the np->lock irq spinlock, except the -performance critical codepaths: - -The rx process only runs in the interrupt handler. Access from outside -the interrupt handler is only permitted after disable_irq(). - -The rx process usually runs under the netif_tx_lock. If np->intr_tx_reap -is set, then access is permitted under spin_lock_irq(&np->lock). - -Thus configuration functions that want to access everything must call - disable_irq(dev->irq); - netif_tx_lock_bh(dev); - spin_lock_irq(&np->lock); - -IV. Notes - -NatSemi PCI network controllers are very uncommon. +recieve and transmit paths which are synchronised using a combination of +hardware descriptor ownership, disabling interrupts and NAPI poll scheduling. IVb. References