From: Chen, Huacai <huacai.chen@intel.com>
Date: Tue, 10 Jun 2008 01:05:08 +0000 (+0800)
Subject: [MIPS] modify the MIPS CPU classfication
X-Git-Tag: v2.6.27-rc1~1063^2~53
X-Git-Url: https://err.no/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=2954c02a884dc0ba9e91882c0aba13bcb9d22e6c;p=linux-2.6

[MIPS] modify the MIPS CPU classfication

Signed-off-by: Huacai Chen <huacai.chen@intel.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
---

diff --git a/include/asm-mips/cpu.h b/include/asm-mips/cpu.h
index 1c35cac6f3..229a786101 100644
--- a/include/asm-mips/cpu.h
+++ b/include/asm-mips/cpu.h
@@ -66,8 +66,10 @@
 #define PRID_IMP_RM7000		0x2700
 #define PRID_IMP_NEVADA		0x2800		/* RM5260 ??? */
 #define PRID_IMP_RM9000		0x3400
+#define PRID_IMP_LOONGSON1	0x4200
 #define PRID_IMP_R5432		0x5400
 #define PRID_IMP_R5500		0x5500
+#define PRID_IMP_LOONGSON2	0x6300
 
 #define PRID_IMP_UNKNOWN	0xff00
 
@@ -90,8 +92,6 @@
 #define PRID_IMP_24KE		0x9600
 #define PRID_IMP_74K		0x9700
 #define PRID_IMP_1004K		0x9900
-#define PRID_IMP_LOONGSON1      0x4200
-#define PRID_IMP_LOONGSON2      0x6300
 
 /*
  * These are the PRID's for when 23:16 == PRID_COMP_SIBYTE