From: Ralf Baechle <ralf@linux-mips.org>
Date: Tue, 15 Nov 2005 16:10:01 +0000 (+0000)
Subject: [MIPS] SEAD: More build fixes.
X-Git-Tag: v2.6.15-rc2~65^2~1
X-Git-Url: https://err.no/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=1a6ea3ec6784cf3dedc338e1980dc0b4cf28a805;p=linux-2.6

[MIPS] SEAD: More build fixes.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
---

diff --git a/arch/mips/mips-boards/sead/sead_int.c b/arch/mips/mips-boards/sead/sead_int.c
index e1dd7e0097..90fda0d991 100644
--- a/arch/mips/mips-boards/sead/sead_int.c
+++ b/arch/mips/mips-boards/sead/sead_int.c
@@ -30,19 +30,9 @@
 
 extern asmlinkage void mipsIRQ(void);
 
-asmlinkage void sead_hw0_irqdispatch(struct pt_regs *regs)
-{
-	do_IRQ(SEADINT_UART0, regs);
-}
-
-asmlinkage void sead_hw1_irqdispatch(struct pt_regs *regs)
-{
-	do_IRQ(SEADINT_UART1, regs);
-}
-
 void __init arch_init_irq(void)
 {
-	mips_cpu_irq_init(0);
+	mips_cpu_irq_init(MIPSCPU_INT_BASE);
 
 	/* Now safe to set the exception vector. */
 	set_except_vector(0, mipsIRQ);
diff --git a/arch/mips/mips-boards/sead/sead_setup.c b/arch/mips/mips-boards/sead/sead_setup.c
index de90bec550..f966bc161d 100644
--- a/arch/mips/mips-boards/sead/sead_setup.c
+++ b/arch/mips/mips-boards/sead/sead_setup.c
@@ -45,7 +45,7 @@ const char *get_system_type(void)
 	return "MIPS SEAD";
 }
 
-static void __init sead_setup(void)
+void __init plat_setup(void)
 {
 	ioport_resource.end = 0x7fffffff;
 
@@ -69,7 +69,7 @@ static void __init serial_init(void)
 #else
 	s.iobase = SEAD_UART0_REGS_BASE+3;
 #endif
-	s.irq = SEADINT_UART0;
+	s.irq = MIPSCPU_INT_BASE + MIPSCPU_INT_UART0;
 	s.uartclk = SEAD_BASE_BAUD * 16;
 	s.flags = ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST | ASYNC_AUTO_IRQ;
 	s.iotype = 0;
diff --git a/include/asm-mips/mips-boards/seadint.h b/include/asm-mips/mips-boards/seadint.h
index ba88f769f9..365c2a3c64 100644
--- a/include/asm-mips/mips-boards/seadint.h
+++ b/include/asm-mips/mips-boards/seadint.h
@@ -20,7 +20,14 @@
 #ifndef _MIPS_SEADINT_H
 #define _MIPS_SEADINT_H
 
-#define SEADINT_UART0     2
-#define SEADINT_UART1     3
+/*
+ * Interrupts 0..7 are used for SEAD CPU interrupts
+ */
+#define MIPSCPU_INT_BASE	0
+
+#define MIPSCPU_INT_UART0	2
+#define MIPSCPU_INT_UART1	3
+
+#define MIPSCPU_INT_CPUCTR	7
 
 #endif /* !(_MIPS_SEADINT_H) */