[MIPS] SMTC: Move MIPS_CPU_IPI_IRQ definition into header.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --git a/arch/mips/kernel/smtc.c b/arch/mips/kernel/smtc.c
index 16aa5d37117c03049034d3c52755548015e2d55a..43826c16101d15ee3f556c67e055749cfb7fcce4 100644 (file)
--- a/arch/mips/kernel/smtc.c
+++ b/arch/mips/kernel/smtc.c
@@ -28,8 +28,6 @@
  * This file should be built into the kernel only if CONFIG_MIPS_MT_SMTC is set.
  */
 
-#define MIPS_CPU_IPI_IRQ       1
-
 #define LOCK_MT_PRA() \
        local_irq_save(flags); \
        mtflags = dmt()

diff --git a/include/asm-mips/smtc.h b/include/asm-mips/smtc.h
index 44dfa4adecf323e970fcdd17d6c1aed8e67ab32e..ff3e8936b493d8b7137ab991fe84fd9e1bdebc19 100644 (file)
--- a/include/asm-mips/smtc.h
+++ b/include/asm-mips/smtc.h
@@ -55,4 +55,14 @@ extern void smtc_boot_secondary(int cpu, struct task_struct *t);
 
 #define PARKED_INDEX   ((unsigned int)0x80000000)
 
+/*
+ * Define low-level interrupt mask for IPIs, if necessary.
+ * By default, use SW interrupt 1, which requires no external
+ * hardware support, but which works only for single-core
+ * MIPS MT systems.
+ */
+#ifndef MIPS_CPU_IPI_IRQ
+#define MIPS_CPU_IPI_IRQ 1
+#endif
+
 #endif /*  _ASM_SMTC_MT_H */