[ARM] 4479/1: AT91: Define new MMC register bits

Add definitions for RDPROOF, WRPROOF and PDCFBYTE bits of the Mode
Register in the updated MMC controller found on the AT91SAM9260 and
AT91SAM9263 processors.

Signed-off-by: Andrew Victor <andrew@sanpeople.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

diff --git a/include/asm-arm/arch-at91/at91_mci.h b/include/asm-arm/arch-at91/at91_mci.h
index 40a9876b661a1162aa11cbd401e7e872c611c390..c2e11cc374ba6a28a1b33bf94f13a523bc73df90 100644 (file)
--- a/include/asm-arm/arch-at91/at91_mci.h
+++ b/include/asm-arm/arch-at91/at91_mci.h
@@ -26,6 +26,9 @@
 #define AT91_MCI_MR            0x04            /* Mode Register */
 #define                AT91_MCI_CLKDIV         (0xff  <<  0)   /* Clock Divider */
 #define                AT91_MCI_PWSDIV         (7     <<  8)   /* Power Saving Divider */
+#define                AT91_MCI_RDPROOF        (1     << 11)   /* Read Proof Enable [SAM926[03] only] */
+#define                AT91_MCI_WRPROOF        (1     << 12)   /* Write Proof Enable [SAM926[03] only] */
+#define                AT91_MCI_PDCFBYTE       (1     << 13)   /* PDC Force Byte Transfer [SAM926[03] only] */
 #define                AT91_MCI_PDCPADV        (1     << 14)   /* PDC Padding Value */
 #define                AT91_MCI_PDCMODE        (1     << 15)   /* PDC-orientated Mode */
 #define                AT91_MCI_BLKLEN         (0xfff << 18)   /* Data Block Length */