]> err.no Git - linux-2.6/commitdiff
[ARM] 4384/1: S3C2412/13 SPI registers offset correction
authorSandeep Sanjay Patil <psandeep.s@gmail.com>
Wed, 16 May 2007 09:51:45 +0000 (10:51 +0100)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Wed, 16 May 2007 14:37:43 +0000 (15:37 +0100)
Change the SPI Channel 1 register offset in s3c_spi1_resource[], and
s3c2412_dma_mappings[]. Offset has to be 0x100 in s3c2412/13's case.
Also, total SPI memory resource size changed to 0x24 for s3c2412/13.

Signed-off-by: Sandeep Patil <psandeep.s@gmail.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
arch/arm/mach-s3c2412/dma.c
arch/arm/mach-s3c2412/s3c2412.c
arch/arm/plat-s3c24xx/devs.c
include/asm-arm/arch-s3c2410/regs-spi.h

index d0f4695c09d9c7bdf7b0413e2588f070d8e87491..668cccefe7b066aa4472a91b18469d4b80904617 100644 (file)
@@ -59,8 +59,8 @@ static struct s3c24xx_dma_map __initdata s3c2412_dma_mappings[] = {
        [DMACH_SPI1] = {
                .name           = "spi1",
                .channels       = MAP(S3C2412_DMAREQSEL_SPI1TX),
-               .hw_addr.to     = S3C2410_PA_SPI + 0x20 + S3C2410_SPTDAT,
-               .hw_addr.from   = S3C2410_PA_SPI + 0x20 + S3C2410_SPRDAT,
+               .hw_addr.to     = S3C2410_PA_SPI + S3C2412_SPI1 + S3C2410_SPTDAT,
+               .hw_addr.from   = S3C2410_PA_SPI + S3C2412_SPI1  + S3C2410_SPRDAT,
        },
        [DMACH_UART0] = {
                .name           = "uart0",
index aafe0bc593f17bb92f8e32c0b82391c260bf0a7d..c602aa39f9c4080671a6525c4e4cd2ecbde7d475 100644 (file)
@@ -37,6 +37,7 @@
 #include <asm/arch/regs-gpio.h>
 #include <asm/arch/regs-gpioj.h>
 #include <asm/arch/regs-dsc.h>
+#include <asm/arch/regs-spi.h>
 
 #include <asm/plat-s3c24xx/s3c2412.h>
 #include <asm/plat-s3c24xx/cpu.h>
@@ -74,6 +75,14 @@ void __init s3c2412_init_uarts(struct s3c2410_uartcfg *cfg, int no)
        s3c_device_sdi.name  = "s3c2412-sdi";
        s3c_device_lcd.name  = "s3c2412-lcd";
        s3c_device_nand.name = "s3c2412-nand";
+
+       /* spi channel related changes, s3c2412/13 specific */
+       s3c_device_spi0.name = "s3c2412-spi";
+       s3c_device_spi0.resource[0].end = S3C24XX_PA_SPI + 0x24;
+       s3c_device_spi1.name = "s3c2412-spi";
+       s3c_device_spi1.resource[0].start = S3C24XX_PA_SPI + S3C2412_SPI1;
+       s3c_device_spi1.resource[0].end = S3C24XX_PA_SPI + S3C2412_SPI1 + 0x24;
+
 }
 
 /* s3c2412_idle
index 0fe53b39cb2f57566200a8f234cf4e64f3cefa33..8eca9599ef60ac6c868d29d2c7554c36a4fadb99 100644 (file)
@@ -33,6 +33,7 @@
 
 #include <asm/plat-s3c24xx/devs.h>
 #include <asm/plat-s3c24xx/cpu.h>
+#include <asm/arch/regs-spi.h>
 
 /* Serial port registrations */
 
@@ -437,8 +438,8 @@ EXPORT_SYMBOL(s3c_device_spi0);
 
 static struct resource s3c_spi1_resource[] = {
        [0] = {
-               .start = S3C24XX_PA_SPI + 0x20,
-               .end   = S3C24XX_PA_SPI + 0x20 + 0x1f,
+               .start = S3C24XX_PA_SPI + S3C2410_SPI1,
+               .end   = S3C24XX_PA_SPI + S3C2410_SPI1 + 0x1f,
                .flags = IORESOURCE_MEM,
        },
        [1] = {
index 3552280d1e8f3f8644b0962dca6f335a20127601..4a499a138256e797207bf3c9c36e7d0bd50c3123 100644 (file)
@@ -12,6 +12,8 @@
 #ifndef __ASM_ARCH_REGS_SPI_H
 #define __ASM_ARCH_REGS_SPI_H
 
+#define S3C2410_SPI1   (0x20)
+#define S3C2412_SPI1   (0x100)
 
 #define S3C2410_SPCON  (0x00)