More information (hardware only) at
<http://www.hp.com/jornada/>.
-config SH_EC3104
- bool "EC3104"
- help
- Select EC3104 if configuring for a system with an Eclipse
- International EC3104 chip, e.g. the Harris AD2000.
-
config SH_SATURN
bool "Saturn"
select CPU_SUBTYPE_SH7604
<http://www.m17n.org/linux-sh/dreamcast/>. There is a
Dreamcast project is at <http://linuxdc.sourceforge.net/>.
-config SH_BIGSUR
- bool "BigSur"
-
config SH_MPC1211
bool "Interface MPC1211"
help
config HEARTBEAT
bool "Heartbeat LED"
depends on SH_MPC1211 || SH_SH03 || \
- SH_BIGSUR || SOLUTION_ENGINE || \
+ SOLUTION_ENGINE || \
SH_RTS7751R2D || SH_SH4202_MICRODEV || SH_LANDISK || \
SH_R7780RP
help
machdir-$(CONFIG_SH_7343_SOLUTION_ENGINE) := se/7343
machdir-$(CONFIG_SH_73180_SOLUTION_ENGINE) := se/73180
machdir-$(CONFIG_SH_HP6XX) := hp6xx
-machdir-$(CONFIG_SH_EC3104) := ec3104
machdir-$(CONFIG_SH_SATURN) := saturn
machdir-$(CONFIG_SH_DREAMCAST) := dreamcast
-machdir-$(CONFIG_SH_BIGSUR) := bigsur
machdir-$(CONFIG_SH_MPC1211) := mpc1211
machdir-$(CONFIG_SH_SH03) := sh03
machdir-$(CONFIG_SH_SECUREEDGE5410) := snapgear
+++ /dev/null
-#
-# Makefile for the BigSur specific parts of the kernel
-#
-
-obj-y := setup.o io.o irq.o led.o
-
+++ /dev/null
-/*
- * arch/sh/boards/bigsur/io.c
- *
- * By Dustin McIntire (dustin@sensoria.com) (c)2001
- * Derived from io_hd64465.h, which bore the message:
- * By Greg Banks <gbanks@pocketpenguins.com>
- * (c) 2000 PocketPenguins Inc.
- * and from io_hd64461.h, which bore the message:
- * Copyright 2000 Stuart Menefy (stuart.menefy@st.com)
- *
- * May be copied or modified under the terms of the GNU General Public
- * License. See linux/COPYING for more information.
- *
- * IO functions for a Hitachi Big Sur Evaluation Board.
- */
-
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <asm/machvec.h>
-#include <asm/io.h>
-#include <asm/bigsur/bigsur.h>
-
-/* Low iomap maps port 0-1K to addresses in 8byte chunks */
-#define BIGSUR_IOMAP_LO_THRESH 0x400
-#define BIGSUR_IOMAP_LO_SHIFT 3
-#define BIGSUR_IOMAP_LO_MASK ((1<<BIGSUR_IOMAP_LO_SHIFT)-1)
-#define BIGSUR_IOMAP_LO_NMAP (BIGSUR_IOMAP_LO_THRESH>>BIGSUR_IOMAP_LO_SHIFT)
-static u32 bigsur_iomap_lo[BIGSUR_IOMAP_LO_NMAP];
-static u8 bigsur_iomap_lo_shift[BIGSUR_IOMAP_LO_NMAP];
-
-/* High iomap maps port 1K-64K to addresses in 1K chunks */
-#define BIGSUR_IOMAP_HI_THRESH 0x10000
-#define BIGSUR_IOMAP_HI_SHIFT 10
-#define BIGSUR_IOMAP_HI_MASK ((1<<BIGSUR_IOMAP_HI_SHIFT)-1)
-#define BIGSUR_IOMAP_HI_NMAP (BIGSUR_IOMAP_HI_THRESH>>BIGSUR_IOMAP_HI_SHIFT)
-static u32 bigsur_iomap_hi[BIGSUR_IOMAP_HI_NMAP];
-static u8 bigsur_iomap_hi_shift[BIGSUR_IOMAP_HI_NMAP];
-
-void bigsur_port_map(u32 baseport, u32 nports, u32 addr, u8 shift)
-{
- u32 port, endport = baseport + nports;
-
- pr_debug("bigsur_port_map(base=0x%0x, n=0x%0x, addr=0x%08x)\n",
- baseport, nports, addr);
-
- for (port = baseport ;
- port < endport && port < BIGSUR_IOMAP_LO_THRESH ;
- port += (1<<BIGSUR_IOMAP_LO_SHIFT)) {
- pr_debug(" maplo[0x%x] = 0x%08x\n", port, addr);
- bigsur_iomap_lo[port>>BIGSUR_IOMAP_LO_SHIFT] = addr;
- bigsur_iomap_lo_shift[port>>BIGSUR_IOMAP_LO_SHIFT] = shift;
- addr += (1<<(BIGSUR_IOMAP_LO_SHIFT));
- }
-
- for (port = max_t(u32, baseport, BIGSUR_IOMAP_LO_THRESH);
- port < endport && port < BIGSUR_IOMAP_HI_THRESH ;
- port += (1<<BIGSUR_IOMAP_HI_SHIFT)) {
- pr_debug(" maphi[0x%x] = 0x%08x\n", port, addr);
- bigsur_iomap_hi[port>>BIGSUR_IOMAP_HI_SHIFT] = addr;
- bigsur_iomap_hi_shift[port>>BIGSUR_IOMAP_HI_SHIFT] = shift;
- addr += (1<<(BIGSUR_IOMAP_HI_SHIFT));
- }
-}
-EXPORT_SYMBOL(bigsur_port_map);
-
-void bigsur_port_unmap(u32 baseport, u32 nports)
-{
- u32 port, endport = baseport + nports;
-
- pr_debug("bigsur_port_unmap(base=0x%0x, n=0x%0x)\n", baseport, nports);
-
- for (port = baseport ;
- port < endport && port < BIGSUR_IOMAP_LO_THRESH ;
- port += (1<<BIGSUR_IOMAP_LO_SHIFT)) {
- bigsur_iomap_lo[port>>BIGSUR_IOMAP_LO_SHIFT] = 0;
- }
-
- for (port = max_t(u32, baseport, BIGSUR_IOMAP_LO_THRESH);
- port < endport && port < BIGSUR_IOMAP_HI_THRESH ;
- port += (1<<BIGSUR_IOMAP_HI_SHIFT)) {
- bigsur_iomap_hi[port>>BIGSUR_IOMAP_HI_SHIFT] = 0;
- }
-}
-EXPORT_SYMBOL(bigsur_port_unmap);
-
-unsigned long bigsur_isa_port2addr(unsigned long port)
-{
- unsigned long addr = 0;
- unsigned char shift;
-
- /* Physical address not in P0, do nothing */
- if (PXSEG(port)) {
- addr = port;
- /* physical address in P0, map to P2 */
- } else if (port >= 0x30000) {
- addr = P2SEGADDR(port);
- /* Big Sur I/O + HD64465 registers 0x10000-0x30000 */
- } else if (port >= BIGSUR_IOMAP_HI_THRESH) {
- addr = BIGSUR_INTERNAL_BASE + (port - BIGSUR_IOMAP_HI_THRESH);
- /* Handle remapping of high IO/PCI IO ports */
- } else if (port >= BIGSUR_IOMAP_LO_THRESH) {
- addr = bigsur_iomap_hi[port >> BIGSUR_IOMAP_HI_SHIFT];
- shift = bigsur_iomap_hi_shift[port >> BIGSUR_IOMAP_HI_SHIFT];
-
- if (addr != 0)
- addr += (port & BIGSUR_IOMAP_HI_MASK) << shift;
- } else {
- /* Handle remapping of low IO ports */
- addr = bigsur_iomap_lo[port >> BIGSUR_IOMAP_LO_SHIFT];
- shift = bigsur_iomap_lo_shift[port >> BIGSUR_IOMAP_LO_SHIFT];
-
- if (addr != 0)
- addr += (port & BIGSUR_IOMAP_LO_MASK) << shift;
- }
-
- pr_debug("%s(0x%08lx) = 0x%08lx\n", __FUNCTION__, port, addr);
-
- return addr;
-}
-
+++ /dev/null
-/*
- *
- * By Dustin McIntire (dustin@sensoria.com) (c)2001
- *
- * Setup and IRQ handling code for the HD64465 companion chip.
- * by Greg Banks <gbanks@pocketpenguins.com>
- * Copyright (c) 2000 PocketPenguins Inc
- *
- * Derived from setup_hd64465.c which bore the message:
- * Greg Banks <gbanks@pocketpenguins.com>
- * Copyright (c) 2000 PocketPenguins Inc and
- * Copyright (C) 2000 YAEGASHI Takeshi
- * and setup_cqreek.c which bore message:
- * Copyright (C) 2000 Niibe Yutaka
- *
- * May be copied or modified under the terms of the GNU General Public
- * License. See linux/COPYING for more information.
- *
- * IRQ functions for a Hitachi Big Sur Evaluation Board.
- *
- */
-#undef DEBUG
-
-#include <linux/sched.h>
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/param.h>
-#include <linux/ioport.h>
-#include <linux/interrupt.h>
-#include <linux/init.h>
-#include <linux/irq.h>
-#include <linux/bitops.h>
-
-#include <asm/io.h>
-#include <asm/irq.h>
-
-#include <asm/bigsur/io.h>
-#include <asm/hd64465/hd64465.h>
-#include <asm/bigsur/bigsur.h>
-
-//#define BIGSUR_DEBUG 3
-#undef BIGSUR_DEBUG
-
-#ifdef BIGSUR_DEBUG
-#define DIPRINTK(n, args...) if (BIGSUR_DEBUG>(n)) printk(args)
-#else
-#define DIPRINTK(n, args...)
-#endif /* BIGSUR_DEBUG */
-
-#ifdef CONFIG_HD64465
-extern int hd64465_irq_demux(int irq);
-#endif /* CONFIG_HD64465 */
-
-
-/*===========================================================*/
-// Big Sur CPLD IRQ Routines
-/*===========================================================*/
-
-/* Level 1 IRQ routines */
-static void disable_bigsur_l1irq(unsigned int irq)
-{
- unsigned char mask;
- unsigned int mask_port = ((irq - BIGSUR_IRQ_LOW)/8) ? BIGSUR_IRLMR1 : BIGSUR_IRLMR0;
- unsigned char bit = (1 << ((irq - MGATE_IRQ_LOW)%8) );
-
- if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH) {
- pr_debug("Disable L1 IRQ %d\n", irq);
- DIPRINTK(2,"disable_bigsur_l1irq: IMR=0x%08x mask=0x%x\n",
- mask_port, bit);
-
- /* Disable IRQ - set mask bit */
- mask = inb(mask_port) | bit;
- outb(mask, mask_port);
- return;
- }
- pr_debug("disable_bigsur_l1irq: Invalid IRQ %d\n", irq);
-}
-
-static void enable_bigsur_l1irq(unsigned int irq)
-{
- unsigned char mask;
- unsigned int mask_port = ((irq - BIGSUR_IRQ_LOW)/8) ? BIGSUR_IRLMR1 : BIGSUR_IRLMR0;
- unsigned char bit = (1 << ((irq - MGATE_IRQ_LOW)%8) );
-
- if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH) {
- pr_debug("Enable L1 IRQ %d\n", irq);
- DIPRINTK(2,"enable_bigsur_l1irq: IMR=0x%08x mask=0x%x\n",
- mask_port, bit);
- /* Enable L1 IRQ - clear mask bit */
- mask = inb(mask_port) & ~bit;
- outb(mask, mask_port);
- return;
- }
- pr_debug("enable_bigsur_l1irq: Invalid IRQ %d\n", irq);
-}
-
-
-/* Level 2 irq masks and registers for L2 decoding */
-/* Level2 bitmasks for each level 1 IRQ */
-const u32 bigsur_l2irq_mask[] =
- {0x40,0x80,0x08,0x01,0x01,0x3C,0x3E,0xFF,0x40,0x80,0x06,0x03};
-/* Level2 to ISR[n] map for each level 1 IRQ */
-const u32 bigsur_l2irq_reg[] =
- { 2, 2, 3, 3, 1, 2, 1, 0, 1, 1, 3, 2};
-/* Level2 to Level 1 IRQ map */
-const u32 bigsur_l2_l1_map[] =
- {7,7,7,7,7,7,7,7, 4,6,6,6,6,6,8,9, 11,11,5,5,5,5,0,1, 3,10,10,2,-1,-1,-1,-1};
-/* IRQ inactive level (high or low) */
-const u32 bigsur_l2_inactv_state[] = {0x00, 0xBE, 0xFC, 0xF7};
-
-/* CPLD external status and mask registers base and offsets */
-static const u32 isr_base = BIGSUR_IRQ0;
-static const u32 isr_offset = BIGSUR_IRQ0 - BIGSUR_IRQ1;
-static const u32 imr_base = BIGSUR_IMR0;
-static const u32 imr_offset = BIGSUR_IMR0 - BIGSUR_IMR1;
-
-#define REG_NUM(irq) ((irq-BIGSUR_2NDLVL_IRQ_LOW)/8 )
-
-/* Level 2 IRQ routines */
-static void disable_bigsur_l2irq(unsigned int irq)
-{
- unsigned char mask;
- unsigned char bit = 1 << ((irq-BIGSUR_2NDLVL_IRQ_LOW)%8);
- unsigned int mask_port = imr_base - REG_NUM(irq)*imr_offset;
-
- if(irq >= BIGSUR_2NDLVL_IRQ_LOW && irq < BIGSUR_2NDLVL_IRQ_HIGH) {
- pr_debug("Disable L2 IRQ %d\n", irq);
- DIPRINTK(2,"disable_bigsur_l2irq: IMR=0x%08x mask=0x%x\n",
- mask_port, bit);
-
- /* Disable L2 IRQ - set mask bit */
- mask = inb(mask_port) | bit;
- outb(mask, mask_port);
- return;
- }
- pr_debug("disable_bigsur_l2irq: Invalid IRQ %d\n", irq);
-}
-
-static void enable_bigsur_l2irq(unsigned int irq)
-{
- unsigned char mask;
- unsigned char bit = 1 << ((irq-BIGSUR_2NDLVL_IRQ_LOW)%8);
- unsigned int mask_port = imr_base - REG_NUM(irq)*imr_offset;
-
- if(irq >= BIGSUR_2NDLVL_IRQ_LOW && irq < BIGSUR_2NDLVL_IRQ_HIGH) {
- pr_debug("Enable L2 IRQ %d\n", irq);
- DIPRINTK(2,"enable_bigsur_l2irq: IMR=0x%08x mask=0x%x\n",
- mask_port, bit);
-
- /* Enable L2 IRQ - clear mask bit */
- mask = inb(mask_port) & ~bit;
- outb(mask, mask_port);
- return;
- }
- pr_debug("enable_bigsur_l2irq: Invalid IRQ %d\n", irq);
-}
-
-static void mask_and_ack_bigsur(unsigned int irq)
-{
- pr_debug("mask_and_ack_bigsur IRQ %d\n", irq);
- if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH)
- disable_bigsur_l1irq(irq);
- else
- disable_bigsur_l2irq(irq);
-}
-
-static void end_bigsur_irq(unsigned int irq)
-{
- pr_debug("end_bigsur_irq IRQ %d\n", irq);
- if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) {
- if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH)
- enable_bigsur_l1irq(irq);
- else
- enable_bigsur_l2irq(irq);
- }
-}
-
-static unsigned int startup_bigsur_irq(unsigned int irq)
-{
- u8 mask;
- u32 reg;
-
- pr_debug("startup_bigsur_irq IRQ %d\n", irq);
-
- if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH) {
- /* Enable the L1 IRQ */
- enable_bigsur_l1irq(irq);
- /* Enable all L2 IRQs in this L1 IRQ */
- mask = ~(bigsur_l2irq_mask[irq-BIGSUR_IRQ_LOW]);
- reg = imr_base - bigsur_l2irq_reg[irq-BIGSUR_IRQ_LOW] * imr_offset;
- mask &= inb(reg);
- outb(mask,reg);
- DIPRINTK(2,"startup_bigsur_irq: IMR=0x%08x mask=0x%x\n",reg,inb(reg));
- }
- else {
- /* Enable the L2 IRQ - clear mask bit */
- enable_bigsur_l2irq(irq);
- /* Enable the L1 bit masking this L2 IRQ */
- enable_bigsur_l1irq(bigsur_l2_l1_map[irq-BIGSUR_2NDLVL_IRQ_LOW]);
- DIPRINTK(2,"startup_bigsur_irq: L1=%d L2=%d\n",
- bigsur_l2_l1_map[irq-BIGSUR_2NDLVL_IRQ_LOW],irq);
- }
- return 0;
-}
-
-static void shutdown_bigsur_irq(unsigned int irq)
-{
- pr_debug("shutdown_bigsur_irq IRQ %d\n", irq);
- if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH)
- disable_bigsur_l1irq(irq);
- else
- disable_bigsur_l2irq(irq);
-}
-
-/* Define the IRQ structures for the L1 and L2 IRQ types */
-static struct hw_interrupt_type bigsur_l1irq_type = {
- .typename = "BigSur-CPLD-Level1-IRQ",
- .startup = startup_bigsur_irq,
- .shutdown = shutdown_bigsur_irq,
- .enable = enable_bigsur_l1irq,
- .disable = disable_bigsur_l1irq,
- .ack = mask_and_ack_bigsur,
- .end = end_bigsur_irq
-};
-
-static struct hw_interrupt_type bigsur_l2irq_type = {
- .typename = "BigSur-CPLD-Level2-IRQ",
- .startup = startup_bigsur_irq,
- .shutdown =shutdown_bigsur_irq,
- .enable = enable_bigsur_l2irq,
- .disable = disable_bigsur_l2irq,
- .ack = mask_and_ack_bigsur,
- .end = end_bigsur_irq
-};
-
-
-static void make_bigsur_l1isr(unsigned int irq) {
-
- /* sanity check first */
- if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH) {
- /* save the handler in the main description table */
- irq_desc[irq].chip = &bigsur_l1irq_type;
- irq_desc[irq].status = IRQ_DISABLED;
- irq_desc[irq].action = 0;
- irq_desc[irq].depth = 1;
-
- disable_bigsur_l1irq(irq);
- return;
- }
- pr_debug("make_bigsur_l1isr: bad irq, %d\n", irq);
- return;
-}
-
-static void make_bigsur_l2isr(unsigned int irq) {
-
- /* sanity check first */
- if(irq >= BIGSUR_2NDLVL_IRQ_LOW && irq < BIGSUR_2NDLVL_IRQ_HIGH) {
- /* save the handler in the main description table */
- irq_desc[irq].chip = &bigsur_l2irq_type;
- irq_desc[irq].status = IRQ_DISABLED;
- irq_desc[irq].action = 0;
- irq_desc[irq].depth = 1;
-
- disable_bigsur_l2irq(irq);
- return;
- }
- pr_debug("make_bigsur_l2isr: bad irq, %d\n", irq);
- return;
-}
-
-/* The IRQ's will be decoded as follows:
- * If a level 2 handler exists and there is an unmasked active
- * IRQ, the 2nd level handler will be called.
- * If a level 2 handler does not exist for the active IRQ
- * the 1st level handler will be called.
- */
-
-int bigsur_irq_demux(int irq)
-{
- int dmux_irq = irq;
- u8 mask, actv_irqs;
- u32 reg_num;
-
- DIPRINTK(3,"bigsur_irq_demux, irq=%d\n", irq);
- /* decode the 1st level IRQ */
- if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH) {
- /* Get corresponding L2 ISR bitmask and ISR number */
- mask = bigsur_l2irq_mask[irq-BIGSUR_IRQ_LOW];
- reg_num = bigsur_l2irq_reg[irq-BIGSUR_IRQ_LOW];
- /* find the active IRQ's (XOR with inactive level)*/
- actv_irqs = inb(isr_base-reg_num*isr_offset) ^
- bigsur_l2_inactv_state[reg_num];
- /* decode active IRQ's */
- actv_irqs = actv_irqs & mask & ~(inb(imr_base-reg_num*imr_offset));
- /* if NEZ then we have an active L2 IRQ */
- if(actv_irqs) dmux_irq = ffz(~actv_irqs) + reg_num*8+BIGSUR_2NDLVL_IRQ_LOW;
- /* if no 2nd level IRQ action, but has 1st level, use 1st level handler */
- if(!irq_desc[dmux_irq].action && irq_desc[irq].action)
- dmux_irq = irq;
- DIPRINTK(1,"bigsur_irq_demux: irq=%d dmux_irq=%d mask=0x%04x reg=%d\n",
- irq, dmux_irq, mask, reg_num);
- }
-#ifdef CONFIG_HD64465
- dmux_irq = hd64465_irq_demux(dmux_irq);
-#endif /* CONFIG_HD64465 */
- DIPRINTK(3,"bigsur_irq_demux, demux_irq=%d\n", dmux_irq);
-
- return dmux_irq;
-}
-
-/*===========================================================*/
-// Big Sur Init Routines
-/*===========================================================*/
-void __init init_bigsur_IRQ(void)
-{
- int i;
-
- if (!MACH_BIGSUR) return;
-
- /* Create ISR's for Big Sur CPLD IRQ's */
- /*==============================================================*/
- for(i=BIGSUR_IRQ_LOW;i<BIGSUR_IRQ_HIGH;i++)
- make_bigsur_l1isr(i);
-
- printk(KERN_INFO "Big Sur CPLD L1 interrupts %d to %d.\n",
- BIGSUR_IRQ_LOW,BIGSUR_IRQ_HIGH);
-
- for(i=BIGSUR_2NDLVL_IRQ_LOW;i<BIGSUR_2NDLVL_IRQ_HIGH;i++)
- make_bigsur_l2isr(i);
-
- printk(KERN_INFO "Big Sur CPLD L2 interrupts %d to %d.\n",
- BIGSUR_2NDLVL_IRQ_LOW,BIGSUR_2NDLVL_IRQ_HIGH);
-
-}
+++ /dev/null
-/*
- * linux/arch/sh/boards/bigsur/led.c
- *
- * By Dustin McIntire (dustin@sensoria.com) (c)2001
- * Derived from led_se.c and led.c, which bore the message:
- * Copyright (C) 2000 Stuart Menefy <stuart.menefy@st.com>
- *
- * May be copied or modified under the terms of the GNU General Public
- * License. See linux/COPYING for more information.
- *
- * This file contains Big Sur specific LED code.
- */
-
-#include <asm/io.h>
-#include <asm/bigsur/bigsur.h>
-
-static void mach_led(int position, int value)
-{
- int word;
-
- word = bigsur_inl(BIGSUR_CSLR);
- if (value) {
- bigsur_outl(word & ~BIGSUR_LED, BIGSUR_CSLR);
- } else {
- bigsur_outl(word | BIGSUR_LED, BIGSUR_CSLR);
- }
-}
-
-#ifdef CONFIG_HEARTBEAT
-
-#include <linux/sched.h>
-
-/* Cycle the LED on/off */
-void heartbeat_bigsur(void)
-{
- static unsigned cnt = 0, period = 0, dist = 0;
-
- if (cnt == 0 || cnt == dist)
- mach_led( -1, 1);
- else if (cnt == 7 || cnt == dist+7)
- mach_led( -1, 0);
-
- if (++cnt > period) {
- cnt = 0;
- /* The hyperbolic function below modifies the heartbeat period
- * length in dependency of the current (5min) load. It goes
- * through the points f(0)=126, f(1)=86, f(5)=51,
- * f(inf)->30. */
- period = ((672<<FSHIFT)/(5*avenrun[0]+(7<<FSHIFT))) + 30;
- dist = period / 4;
- }
-}
-#endif /* CONFIG_HEARTBEAT */
-
+++ /dev/null
-/*
- *
- * By Dustin McIntire (dustin@sensoria.com) (c)2001
- *
- * Setup and IRQ handling code for the HD64465 companion chip.
- * by Greg Banks <gbanks@pocketpenguins.com>
- * Copyright (c) 2000 PocketPenguins Inc
- *
- * Derived from setup_hd64465.c which bore the message:
- * Greg Banks <gbanks@pocketpenguins.com>
- * Copyright (c) 2000 PocketPenguins Inc and
- * Copyright (C) 2000 YAEGASHI Takeshi
- * and setup_cqreek.c which bore message:
- * Copyright (C) 2000 Niibe Yutaka
- *
- * May be copied or modified under the terms of the GNU General Public
- * License. See linux/COPYING for more information.
- *
- * Setup functions for a Hitachi Big Sur Evaluation Board.
- *
- */
-
-#include <linux/sched.h>
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/param.h>
-#include <linux/ioport.h>
-#include <linux/interrupt.h>
-#include <linux/init.h>
-#include <linux/irq.h>
-#include <linux/bitops.h>
-
-#include <asm/io.h>
-#include <asm/irq.h>
-#include <asm/machvec.h>
-#include <asm/bigsur/io.h>
-#include <asm/hd64465/hd64465.h>
-#include <asm/bigsur/bigsur.h>
-
-/*===========================================================*/
-// Big Sur Init Routines
-/*===========================================================*/
-
-static void __init bigsur_setup(char **cmdline_p)
-{
- /* Mask all 2nd level IRQ's */
- outb(-1,BIGSUR_IMR0);
- outb(-1,BIGSUR_IMR1);
- outb(-1,BIGSUR_IMR2);
- outb(-1,BIGSUR_IMR3);
-
- /* Mask 1st level interrupts */
- outb(-1,BIGSUR_IRLMR0);
- outb(-1,BIGSUR_IRLMR1);
-
-#if defined (CONFIG_HD64465) && defined (CONFIG_SERIAL)
- /* remap IO ports for first ISA serial port to HD64465 UART */
- bigsur_port_map(0x3f8, 8, CONFIG_HD64465_IOBASE + 0x8000, 1);
-#endif /* CONFIG_HD64465 && CONFIG_SERIAL */
- /* TODO: setup IDE registers */
- bigsur_port_map(BIGSUR_IDECTL_IOPORT, 2, BIGSUR_ICTL, 8);
- /* Setup the Ethernet port to BIGSUR_ETHER_IOPORT */
- bigsur_port_map(BIGSUR_ETHER_IOPORT, 16, BIGSUR_ETHR+BIGSUR_ETHER_IOPORT, 0);
- /* set page to 1 */
- outw(1, BIGSUR_ETHR+0xe);
- /* set the IO port to BIGSUR_ETHER_IOPORT */
- outw(BIGSUR_ETHER_IOPORT<<3, BIGSUR_ETHR+0x2);
-}
-
-/*
- * The Machine Vector
- */
-extern void heartbeat_bigsur(void);
-extern void init_bigsur_IRQ(void);
-
-struct sh_machine_vector mv_bigsur __initmv = {
- .mv_name = "Big Sur",
- .mv_setup = bigsur_setup,
-
- .mv_isa_port2addr = bigsur_isa_port2addr,
- .mv_irq_demux = bigsur_irq_demux,
-
- .mv_init_irq = init_bigsur_IRQ,
-#ifdef CONFIG_HEARTBEAT
- .mv_heartbeat = heartbeat_bigsur,
-#endif
-};
-ALIAS_MV(bigsur)
+++ /dev/null
-#
-# Makefile for the EC3104 specific parts of the kernel
-#
-
-obj-y := setup.o io.o irq.o
-
+++ /dev/null
-/*
- * linux/arch/sh/boards/ec3104/io.c
- * EC3104 companion chip support
- *
- * Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>
- *
- */
-/* EC3104 note:
- * This code was written without any documentation about the EC3104 chip. While
- * I hope I got most of the basic functionality right, the register names I use
- * are most likely completely different from those in the chip documentation.
- *
- * If you have any further information about the EC3104, please tell me
- * (prumpf@tux.org).
- */
-
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <asm/io.h>
-#include <asm/page.h>
-#include <asm/ec3104/ec3104.h>
-
-/*
- * EC3104 has a real ISA bus which we redirect low port accesses to (the
- * actual device on mine is a ESS 1868, and I don't want to hack the driver
- * more than strictly necessary). I am not going to duplicate the
- * hard coding of PC addresses (for the 16550s aso) here though; it's just
- * too ugly.
- */
-
-#define low_port(port) ((port) < 0x10000)
-
-static inline unsigned long port2addr(unsigned long port)
-{
- switch(port >> 16) {
- case 0:
- return EC3104_ISA_BASE + port * 2;
-
- /* XXX hack. it's unclear what to do about the serial ports */
- case 1:
- return EC3104_BASE + (port&0xffff) * 4;
-
- default:
- /* XXX PCMCIA */
- return 0;
- }
-}
-
-unsigned char ec3104_inb(unsigned long port)
-{
- u8 ret;
-
- ret = *(volatile u8 *)port2addr(port);
-
- return ret;
-}
-
-unsigned short ec3104_inw(unsigned long port)
-{
- BUG();
-}
-
-unsigned long ec3104_inl(unsigned long port)
-{
- BUG();
-}
-
-void ec3104_outb(unsigned char data, unsigned long port)
-{
- *(volatile u8 *)port2addr(port) = data;
-}
-
-void ec3104_outw(unsigned short data, unsigned long port)
-{
- BUG();
-}
-
-void ec3104_outl(unsigned long data, unsigned long port)
-{
- BUG();
-}
+++ /dev/null
-/*
- * linux/arch/sh/boards/ec3104/irq.c
- * EC3104 companion chip support
- *
- * Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>
- *
- */
-
-#include <asm/io.h>
-#include <asm/irq.h>
-#include <asm/ec3104/ec3104.h>
-
-/* This is for debugging mostly; here's the table that I intend to keep
- * in here:
- *
- * index function base addr power interrupt bit
- * 0 power b0ec0000 --- 00000001 (unused)
- * 1 irqs b0ec1000 --- 00000002 (unused)
- * 2 ?? b0ec2000 b0ec0008 00000004
- * 3 PS2 (1) b0ec3000 b0ec000c 00000008
- * 4 PS2 (2) b0ec4000 b0ec0010 00000010
- * 5 ?? b0ec5000 b0ec0014 00000020
- * 6 I2C b0ec6000 b0ec0018 00000040
- * 7 serial (1) b0ec7000 b0ec001c 00000080
- * 8 serial (2) b0ec8000 b0ec0020 00000100
- * 9 serial (3) b0ec9000 b0ec0024 00000200
- * 10 serial (4) b0eca000 b0ec0028 00000400
- * 12 GPIO (1) b0ecc000 b0ec0030
- * 13 GPIO (2) b0ecc000 b0ec0030
- * 16 pcmcia (1) b0ed0000 b0ec0040 00010000
- * 17 pcmcia (2) b0ed1000 b0ec0044 00020000
- */
-
-/* I used the register names from another interrupt controller I worked with,
- * since it seems to be identical to the ec3104 except that all bits are
- * inverted:
- *
- * IRR: Interrupt Request Register (pending and enabled interrupts)
- * IMR: Interrupt Mask Register (which interrupts are enabled)
- * IPR: Interrupt Pending Register (pending interrupts, even disabled ones)
- *
- * 0 bits mean pending or enabled, 1 bits mean not pending or disabled. all
- * IRQs seem to be level-triggered.
- */
-
-#define EC3104_IRR (EC3104_BASE + 0x1000)
-#define EC3104_IMR (EC3104_BASE + 0x1004)
-#define EC3104_IPR (EC3104_BASE + 0x1008)
-
-#define ctrl_readl(addr) (*(volatile u32 *)(addr))
-#define ctrl_writel(data,addr) (*(volatile u32 *)(addr) = (data))
-#define ctrl_readb(addr) (*(volatile u8 *)(addr))
-
-static char *ec3104_name(unsigned index)
-{
- switch(index) {
- case 0:
- return "power management";
- case 1:
- return "interrupts";
- case 3:
- return "PS2 (1)";
- case 4:
- return "PS2 (2)";
- case 5:
- return "I2C (1)";
- case 6:
- return "I2C (2)";
- case 7:
- return "serial (1)";
- case 8:
- return "serial (2)";
- case 9:
- return "serial (3)";
- case 10:
- return "serial (4)";
- case 16:
- return "pcmcia (1)";
- case 17:
- return "pcmcia (2)";
- default: {
- static char buf[32];
-
- sprintf(buf, "unknown (%d)", index);
-
- return buf;
- }
- }
-}
-
-int get_pending_interrupts(char *buf)
-{
- u32 ipr;
- u32 bit;
- char *p = buf;
-
- p += sprintf(p, "pending: (");
-
- ipr = ctrl_inl(EC3104_IPR);
-
- for (bit = 1; bit < 32; bit++)
- if (!(ipr & (1<<bit)))
- p += sprintf(p, "%s ", ec3104_name(bit));
-
- p += sprintf(p, ")\n");
-
- return p - buf;
-}
-
-static inline u32 ec3104_irq2mask(unsigned int irq)
-{
- return (1 << (irq - EC3104_IRQBASE));
-}
-
-static inline void mask_ec3104_irq(unsigned int irq)
-{
- u32 mask;
-
- mask = ctrl_readl(EC3104_IMR);
-
- mask |= ec3104_irq2mask(irq);
-
- ctrl_writel(mask, EC3104_IMR);
-}
-
-static inline void unmask_ec3104_irq(unsigned int irq)
-{
- u32 mask;
-
- mask = ctrl_readl(EC3104_IMR);
-
- mask &= ~ec3104_irq2mask(irq);
-
- ctrl_writel(mask, EC3104_IMR);
-}
-
-static void disable_ec3104_irq(unsigned int irq)
-{
- mask_ec3104_irq(irq);
-}
-
-static void enable_ec3104_irq(unsigned int irq)
-{
- unmask_ec3104_irq(irq);
-}
-
-static void mask_and_ack_ec3104_irq(unsigned int irq)
-{
- mask_ec3104_irq(irq);
-}
-
-static void end_ec3104_irq(unsigned int irq)
-{
- if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
- unmask_ec3104_irq(irq);
-}
-
-static unsigned int startup_ec3104_irq(unsigned int irq)
-{
- unmask_ec3104_irq(irq);
-
- return 0;
-}
-
-static void shutdown_ec3104_irq(unsigned int irq)
-{
- mask_ec3104_irq(irq);
-
-}
-
-static struct hw_interrupt_type ec3104_int = {
- .typename = "EC3104",
- .enable = enable_ec3104_irq,
- .disable = disable_ec3104_irq,
- .ack = mask_and_ack_ec3104_irq,
- .end = end_ec3104_irq,
- .startup = startup_ec3104_irq,
- .shutdown = shutdown_ec3104_irq,
-};
-
-/* Yuck. the _demux API is ugly */
-int ec3104_irq_demux(int irq)
-{
- if (irq == EC3104_IRQ) {
- unsigned int mask;
-
- mask = ctrl_readl(EC3104_IRR);
-
- if (mask == 0xffffffff)
- return EC3104_IRQ;
- else
- return EC3104_IRQBASE + ffz(mask);
- }
-
- return irq;
-}
+++ /dev/null
-/*
- * linux/arch/sh/boards/ec3104/setup.c
- * EC3104 companion chip support
- *
- * Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>
- *
- */
-/* EC3104 note:
- * This code was written without any documentation about the EC3104 chip. While
- * I hope I got most of the basic functionality right, the register names I use
- * are most likely completely different from those in the chip documentation.
- *
- * If you have any further information about the EC3104, please tell me
- * (prumpf@tux.org).
- */
-
-#include <linux/sched.h>
-#include <linux/kernel.h>
-#include <linux/param.h>
-#include <linux/interrupt.h>
-#include <linux/init.h>
-#include <linux/irq.h>
-#include <linux/types.h>
-#include <asm/io.h>
-#include <asm/irq.h>
-#include <asm/machvec.h>
-#include <asm/mach/ec3104.h>
-
-static void __init ec3104_setup(char **cmdline_p)
-{
- char str[8];
- int i;
-
- for (i=0; i<8; i++)
- str[i] = ctrl_readb(EC3104_BASE + i);
-
- for (i = EC3104_IRQBASE; i < EC3104_IRQBASE + 32; i++)
- irq_desc[i].handler = &ec3104_int;
-
- printk("initializing EC3104 \"%.8s\" at %08x, IRQ %d, IRQ base %d\n",
- str, EC3104_BASE, EC3104_IRQ, EC3104_IRQBASE);
-
- /* mask all interrupts. this should have been done by the boot
- * loader for us but we want to be sure ... */
- ctrl_writel(0xffffffff, EC3104_IMR);
-}
-
-/*
- * The Machine Vector
- */
-struct sh_machine_vector mv_ec3104 __initmv = {
- .mv_name = "EC3104",
- .mv_setup = ec3104_setup,
- .mv_nr_irqs = 96,
-
- .mv_inb = ec3104_inb,
- .mv_inw = ec3104_inw,
- .mv_inl = ec3104_inl,
- .mv_outb = ec3104_outb,
- .mv_outw = ec3104_outw,
- .mv_outl = ec3104_outl,
-
- .mv_irq_demux = ec3104_irq_demux,
-};
-ALIAS_MV(ec3104)
obj-$(CONFIG_SH_DREAMCAST) += ops-dreamcast.o fixups-dreamcast.o \
dma-dreamcast.o
obj-$(CONFIG_SH_SECUREEDGE5410) += ops-snapgear.o
-obj-$(CONFIG_SH_BIGSUR) += ops-bigsur.o
obj-$(CONFIG_SH_RTS7751R2D) += ops-rts7751r2d.o fixups-rts7751r2d.o
obj-$(CONFIG_SH_SH03) += ops-sh03.o fixups-sh03.o
obj-$(CONFIG_SH_R7780RP) += ops-r7780rp.o fixups-r7780rp.o
+++ /dev/null
-/*
- * linux/arch/sh/drivers/pci/ops-bigsur.c
- *
- * By Dustin McIntire (dustin@sensoria.com) (c)2001
- *
- * Ported to new API by Paul Mundt <lethal@linux-sh.org>.
- *
- * May be copied or modified under the terms of the GNU General Public
- * License. See linux/COPYING for more information.
- *
- * PCI initialization for the Hitachi Big Sur Evaluation Board
- */
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/init.h>
-#include <linux/pci.h>
-#include <asm/io.h>
-#include "pci-sh4.h"
-#include <asm/bigsur/bigsur.h>
-
-#define BIGSUR_PCI_IO 0x4000
-#define BIGSUR_PCI_MEM 0xfd000000
-
-static struct resource sh7751_io_resource = {
- .name = "SH7751 IO",
- .start = BIGSUR_PCI_IO,
- .end = BIGSUR_PCI_IO + (64*1024) - 1,
- .flags = IORESOURCE_IO,
-};
-
-static struct resource sh7751_mem_resource = {
- .name = "SH7751 mem",
- .start = BIGSUR_PCI_MEM,
- .end = BIGSUR_PCI_MEM + (64*1024*1024) - 1,
- .flags = IORESOURCE_MEM,
-};
-
-extern struct pci_ops sh7751_pci_ops;
-
-struct pci_channel board_pci_channels[] = {
- { &sh4_pci_ops, &sh7751_io_resource, &sh7751_mem_resource, 0, 0xff },
- { 0, }
-};
-
-static struct sh4_pci_address_map sh7751_pci_map = {
- .window0 = {
- .base = SH7751_CS3_BASE_ADDR,
- .size = BIGSUR_LSR0_SIZE,
- },
-
- .window1 = {
- .base = SH7751_CS3_BASE_ADDR,
- .size = BIGSUR_LSR1_SIZE,
- },
-};
-
-/*
- * Initialize the Big Sur PCI interface
- * Setup hardware to be Central Funtion
- * Copy the BSR regs to the PCI interface
- * Setup PCI windows into local RAM
- */
-int __init pcibios_init_platform(void)
-{
- return sh7751_pcic_init(&sh7751_pci_map);
-}
-
-int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
-{
- /*
- * The Big Sur can be used in a CPCI chassis, but the SH7751 PCI
- * interface is on the wrong end of the board so that it can also
- * support a V320 CPI interface chip... Therefor the IRQ mapping is
- * somewhat use dependent... I'l assume a linear map for now, i.e.
- * INTA=slot0,pin0... INTD=slot3,pin0...
- */
- int irq = (slot + pin-1) % 4 + BIGSUR_SH7751_PCI_IRQ_BASE;
-
- PCIDBG(2, "PCI: Mapping Big Sur IRQ for slot %d, pin %c to irq %d\n",
- slot, pin-1+'A', irq);
-
- return irq;
-}
PCIBIOS_MIN_IO, (64 << 10),
SH7751_PCI_IO_BASE + PCIBIOS_MIN_IO);
- /*
- * XXX: For now, leave this board-specific. In the event we have other
- * boards that need to do similar work, this can be wrapped.
- */
-#ifdef CONFIG_SH_BIGSUR
- bigsur_port_map(PCIBIOS_MIN_IO, (64 << 10),
- SH7751_PCI_IO_BASE + PCIBIOS_MIN_IO, 0);
-#endif
-
/* Make sure the MSB's of IO window are set to access PCI space
* correctly */
word = PCIBIOS_MIN_IO & SH4_PCIIOBR_MASK;
HD64465 HD64465
SATURN SH_SATURN
DREAMCAST SH_DREAMCAST
-BIGSUR SH_BIGSUR
MPC1211 SH_MPC1211
SNAPGEAR SH_SECUREEDGE5410
HS7751RVOIP SH_HS7751RVOIP
+++ /dev/null
-/*
- *
- * Hitachi Big Sur Eval Board support
- *
- * Dustin McIntire (dustin@sensoria.com)
- *
- * May be copied or modified under the terms of the GNU General Public
- * License. See linux/COPYING for more information.
- *
- * Derived from Hitachi SH7751 reference manual
- *
- */
-
-#ifndef _ASM_BIGSUR_H_
-#define _ASM_BIGSUR_H_
-
-#include <asm/irq.h>
-#include <asm/hd64465/hd64465.h>
-
-/* 7751 Internal IRQ's used by external CPLD controller */
-#define BIGSUR_IRQ_LOW 0
-#define BIGSUR_IRQ_NUM 14 /* External CPLD level 1 IRQs */
-#define BIGSUR_IRQ_HIGH (BIGSUR_IRQ_LOW + BIGSUR_IRQ_NUM)
-#define BIGSUR_2NDLVL_IRQ_LOW (HD64465_IRQ_BASE+HD64465_IRQ_NUM)
-#define BIGSUR_2NDLVL_IRQ_NUM 32 /* Level 2 IRQs = 4 regs * 8 bits */
-#define BIGSUR_2NDLVL_IRQ_HIGH (BIGSUR_2NDLVL_IRQ_LOW + \
- BIGSUR_2NDLVL_IRQ_NUM)
-
-/* PCI interrupt base number (A_INTA-A_INTD) */
-#define BIGSUR_SH7751_PCI_IRQ_BASE (BIGSUR_2NDLVL_IRQ_LOW+10)
-
-/* CPLD registers and external chip addresses */
-#define BIGSUR_HD64464_ADDR 0xB2000000
-#define BIGSUR_DGDR 0xB1FFFE00
-#define BIGSUR_BIDR 0xB1FFFD00
-#define BIGSUR_CSLR 0xB1FFFC00
-#define BIGSUR_SW1R 0xB1FFFB00
-#define BIGSUR_DBGR 0xB1FFFA00
-#define BIGSUR_BDTR 0xB1FFF900
-#define BIGSUR_BDRR 0xB1FFF800
-#define BIGSUR_PPR1 0xB1FFF700
-#define BIGSUR_PPR2 0xB1FFF600
-#define BIGSUR_IDE2 0xB1FFF500
-#define BIGSUR_IDE3 0xB1FFF400
-#define BIGSUR_SPCR 0xB1FFF300
-#define BIGSUR_ETHR 0xB1FE0000
-#define BIGSUR_PPDR 0xB1FDFF00
-#define BIGSUR_ICTL 0xB1FDFE00
-#define BIGSUR_ICMD 0xB1FDFD00
-#define BIGSUR_DMA0 0xB1FDFC00
-#define BIGSUR_DMA1 0xB1FDFB00
-#define BIGSUR_IRQ0 0xB1FDFA00
-#define BIGSUR_IRQ1 0xB1FDF900
-#define BIGSUR_IRQ2 0xB1FDF800
-#define BIGSUR_IRQ3 0xB1FDF700
-#define BIGSUR_IMR0 0xB1FDF600
-#define BIGSUR_IMR1 0xB1FDF500
-#define BIGSUR_IMR2 0xB1FDF400
-#define BIGSUR_IMR3 0xB1FDF300
-#define BIGSUR_IRLMR0 0xB1FDF200
-#define BIGSUR_IRLMR1 0xB1FDF100
-#define BIGSUR_V320USC_ADDR 0xB1000000
-#define BIGSUR_HD64465_ADDR 0xB0000000
-#define BIGSUR_INTERNAL_BASE 0xB0000000
-
-/* SMC ethernet card parameters */
-#define BIGSUR_ETHER_IOPORT 0x220
-
-/* IDE register paramters */
-#define BIGSUR_IDECMD_IOPORT 0x1f0
-#define BIGSUR_IDECTL_IOPORT 0x1f8
-
-/* LED bit position in BIGSUR_CSLR */
-#define BIGSUR_LED (1<<4)
-
-/* PCI: default LOCAL memory window sizes (seen from PCI bus) */
-#define BIGSUR_LSR0_SIZE (64*(1<<20)) //64MB
-#define BIGSUR_LSR1_SIZE (64*(1<<20)) //64MB
-
-#endif /* _ASM_BIGSUR_H_ */
+++ /dev/null
-/*
- * include/asm-sh/bigsur/io.h
- *
- * By Dustin McIntire (dustin@sensoria.com) (c)2001
- * Derived from io_hd64465.h, which bore the message:
- * By Greg Banks <gbanks@pocketpenguins.com>
- * (c) 2000 PocketPenguins Inc.
- * and from io_hd64461.h, which bore the message:
- * Copyright 2000 Stuart Menefy (stuart.menefy@st.com)
- *
- * May be copied or modified under the terms of the GNU General Public
- * License. See linux/COPYING for more information.
- *
- * IO functions for a Hitachi Big Sur Evaluation Board.
- */
-
-#ifndef _ASM_SH_IO_BIGSUR_H
-#define _ASM_SH_IO_BIGSUR_H
-
-#include <linux/types.h>
-
-extern unsigned long bigsur_isa_port2addr(unsigned long offset);
-extern int bigsur_irq_demux(int irq);
-/* Provision for generic secondary demux step -- used by PCMCIA code */
-extern void bigsur_register_irq_demux(int irq,
- int (*demux)(int irq, void *dev), void *dev);
-extern void bigsur_unregister_irq_demux(int irq);
-/* Set this variable to 1 to see port traffic */
-extern int bigsur_io_debug;
-/* Map a range of ports to a range of kernel virtual memory. */
-extern void bigsur_port_map(u32 baseport, u32 nports, u32 addr, u8 shift);
-extern void bigsur_port_unmap(u32 baseport, u32 nports);
-
-#endif /* _ASM_SH_IO_BIGSUR_H */
-
+++ /dev/null
-/*
- * include/asm-sh/bigsur/serial.h
- *
- * Configuration details for Big Sur 16550 based serial ports
- * i.e. HD64465, PCMCIA, etc.
- */
-
-#ifndef _ASM_SERIAL_BIGSUR_H
-#define _ASM_SERIAL_BIGSUR_H
-#include <asm/hd64465.h>
-
-#define BASE_BAUD (3379200 / 16)
-
-#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
-
-
-#define SERIAL_PORT_DFNS \
- /* UART CLK PORT IRQ FLAGS */ \
- { 0, BASE_BAUD, 0x3F8, HD64465_IRQ_UART, STD_COM_FLAGS } /* ttyS0 */
-
-/* XXX: This should be moved ino irq.h */
-#define irq_cannonicalize(x) (x)
-
-#endif /* _ASM_SERIAL_BIGSUR_H */
+++ /dev/null
-#ifndef __ASM_EC3104_H
-#define __ASM_EC3104_H
-
-
-/*
- * Most of the register set is at 0xb0ec0000 - 0xb0ecffff.
- *
- * as far as I've figured it out the register map is:
- * 0xb0ec0000 - id string
- * 0xb0ec0XXX - power management
- * 0xb0ec1XXX - interrupt control
- * 0xb0ec3XXX - ps2 port (touch pad on aero 8000)
- * 0xb0ec6XXX - i2c
- * 0xb0ec7000 - first serial port (proprietary connector on aero 8000)
- * 0xb0ec8000 - second serial port
- * 0xb0ec9000 - third serial port
- * 0xb0eca000 - fourth serial port (keyboard controller on aero 8000)
- * 0xb0eccXXX - GPIO
- * 0xb0ecdXXX - GPIO
- */
-
-#define EC3104_BASE 0xb0ec0000
-
-#define EC3104_SER4_DATA (EC3104_BASE+0xa000)
-#define EC3104_SER4_IIR (EC3104_BASE+0xa008)
-#define EC3104_SER4_MCR (EC3104_BASE+0xa010)
-#define EC3104_SER4_LSR (EC3104_BASE+0xa014)
-#define EC3104_SER4_MSR (EC3104_BASE+0xa018)
-
-/*
- * our ISA bus. this seems to be real ISA.
- */
-#define EC3104_ISA_BASE 0xa5000000
-
-#define EC3104_IRQ 11
-#define EC3104_IRQBASE 64
-
-#define EC3104_IRQ_SER1 EC3104_IRQBASE + 7
-#define EC3104_IRQ_SER2 EC3104_IRQBASE + 8
-#define EC3104_IRQ_SER3 EC3104_IRQBASE + 9
-#define EC3104_IRQ_SER4 EC3104_IRQBASE + 10
-
-#endif /* __ASM_EC3104_H */
+++ /dev/null
-#ifndef _ASM_SH_IO_EC3104_H
-#define _ASM_SH_IO_EC3104_H
-
-#include <linux/types.h>
-
-extern unsigned char ec3104_inb(unsigned long port);
-extern unsigned short ec3104_inw(unsigned long port);
-extern unsigned long ec3104_inl(unsigned long port);
-
-extern void ec3104_outb(unsigned char value, unsigned long port);
-extern void ec3104_outw(unsigned short value, unsigned long port);
-extern void ec3104_outl(unsigned long value, unsigned long port);
-
-extern int ec3104_irq_demux(int irq);
-
-#endif /* _ASM_SH_IO_EC3104_H */
+++ /dev/null
-extern unsigned char ec3104_kbd_sysrq_xlate[];
-extern int ec3104_kbd_setkeycode(unsigned int scancode, unsigned int keycode);
-extern int ec3104_kbd_getkeycode(unsigned int scancode);
-extern int ec3104_kbd_translate(unsigned char, unsigned char *, char);
-extern char ec3104_kbd_unexpected_up(unsigned char);
-extern void ec3104_kbd_leds(unsigned char);
-extern void ec3104_kbd_init_hw(void);
-
-#define kbd_sysrq_xlate ec3104_kbd_sysrq_xlate
-#define kbd_setkeycode ec3104_kbd_setkeycode
-#define kbd_getkeycode ec3104_kbd_getkeycode
-#define kbd_translate ec3104_kbd_translate
-#define kbd_unexpected_up ec3104_kbd_unexpected_up
-#define kbd_leds ec3104_kbd_leds
-#define kbd_init_hw ec3104_kbd_init_hw
+++ /dev/null
-#include <asm/ec3104.h>
-/* Naturally we don't know the exact value but 115200 baud has a divisor
- * of 9 and 19200 baud has a divisor of 52, so this seems like a good
- * guess. */
-#define BASE_BAUD (16800000 / 16)
-
-#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
-
-/* there is a fourth serial port with the expected values as well, but
- * it's got the keyboard controller behind it so we can't really use it
- * (without moving the keyboard driver to userspace, which doesn't sound
- * like a very good idea) */
-#define SERIAL_PORT_DFNS \
- /* UART CLK PORT IRQ FLAGS */ \
- { 0, BASE_BAUD, 0x11C00, EC3104_IRQBASE+7, STD_COM_FLAGS }, /* ttyS0 */ \
- { 0, BASE_BAUD, 0x12000, EC3104_IRQBASE+8, STD_COM_FLAGS }, /* ttyS1 */ \
- { 0, BASE_BAUD, 0x12400, EC3104_IRQBASE+9, STD_COM_FLAGS }, /* ttyS2 */
-
-/* XXX: This should be moved ino irq.h */
-#define irq_cannonicalize(x) (x)
/* 3. OFFCHIP_NR_IRQS */
#if defined(CONFIG_HD64461)
# define OFFCHIP_NR_IRQS 18
-#elif defined (CONFIG_SH_BIGSUR) /* must be before CONFIG_HD64465 */
-# define OFFCHIP_NR_IRQS 48
#elif defined(CONFIG_HD64465)
# define OFFCHIP_NR_IRQS 16
-#elif defined (CONFIG_SH_EC3104)
-# define OFFCHIP_NR_IRQS 16
#elif defined (CONFIG_SH_DREAMCAST)
# define OFFCHIP_NR_IRQS 96
#elif defined (CONFIG_SH_TITAN)
#include <linux/kernel.h>
-#ifdef CONFIG_SH_EC3104
-#include <asm/serial-ec3104.h>
-#elif defined (CONFIG_SH_BIGSUR)
-#include <asm/serial-bigsur.h>
-#else
/*
* This assumes you have a 1.8432 MHz clock for your UART.
*
#endif
-#endif
#endif /* _ASM_SERIAL_H */
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