]> err.no Git - linux-2.6/commitdiff
[ARM] 4909/1: [AT91] Timer/Counter Block platform_devices
authorAndrew Victor <linux@maxim.org.za>
Wed, 2 Apr 2008 20:58:00 +0000 (21:58 +0100)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Fri, 4 Apr 2008 08:52:25 +0000 (09:52 +0100)
Register platform_devices for the Timer/Counter Block peripherals
found on the AT91RM9200, SAM9 & CAP9 processors.

Original patch from David Brownell.

Signed-off-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
arch/arm/mach-at91/at91cap9_devices.c
arch/arm/mach-at91/at91rm9200_devices.c
arch/arm/mach-at91/at91sam9260_devices.c
arch/arm/mach-at91/at91sam9261_devices.c
arch/arm/mach-at91/at91sam9263_devices.c
arch/arm/mach-at91/at91sam9rl_devices.c

index 7d782ee4117b8cc529ab67c5d66e43b9008c4c50..2eeaf5d5bbf36fe2c9f4875994c623f37dccfa7e 100644 (file)
@@ -536,6 +536,43 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
 #endif
 
 
+/* --------------------------------------------------------------------
+ *  Timer/Counter block
+ * -------------------------------------------------------------------- */
+
+#ifdef CONFIG_ATMEL_TCLIB
+
+static struct resource tcb_resources[] = {
+       [0] = {
+               .start  = AT91CAP9_BASE_TCB0,
+               .end    = AT91CAP9_BASE_TCB0 + SZ_16K - 1,
+               .flags  = IORESOURCE_MEM,
+       },
+       [1] = {
+               .start  = AT91CAP9_ID_TCB,
+               .end    = AT91CAP9_ID_TCB,
+               .flags  = IORESOURCE_IRQ,
+       },
+};
+
+static struct platform_device at91cap9_tcb_device = {
+       .name           = "atmel_tcb",
+       .id             = 0,
+       .resource       = tcb_resources,
+       .num_resources  = ARRAY_SIZE(tcb_resources),
+};
+
+static void __init at91_add_device_tc(void)
+{
+       /* this chip has one clock and irq for all three TC channels */
+       at91_clock_associate("tcb_clk", &at91cap9_tcb_device.dev, "t0_clk");
+       platform_device_register(&at91cap9_tcb_device);
+}
+#else
+static void __init at91_add_device_tc(void) { }
+#endif
+
+
 /* --------------------------------------------------------------------
  *  RTT
  * -------------------------------------------------------------------- */
@@ -1074,6 +1111,7 @@ static int __init at91_add_standard_devices(void)
 {
        at91_add_device_rtt();
        at91_add_device_watchdog();
+       at91_add_device_tc();
        return 0;
 }
 
index ef6aeb86e9805ba402c58cc70afdece13b009419..70d3a0018530e5f8ba29f3dd56513e4e7363a269 100644 (file)
@@ -576,6 +576,90 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
 #endif
 
 
+/* --------------------------------------------------------------------
+ *  Timer/Counter blocks
+ * -------------------------------------------------------------------- */
+
+#ifdef CONFIG_ATMEL_TCLIB
+
+static struct resource tcb0_resources[] = {
+       [0] = {
+               .start  = AT91RM9200_BASE_TCB0,
+               .end    = AT91RM9200_BASE_TCB0 + SZ_16K - 1,
+               .flags  = IORESOURCE_MEM,
+       },
+       [1] = {
+               .start  = AT91RM9200_ID_TC0,
+               .end    = AT91RM9200_ID_TC0,
+               .flags  = IORESOURCE_IRQ,
+       },
+       [2] = {
+               .start  = AT91RM9200_ID_TC1,
+               .end    = AT91RM9200_ID_TC1,
+               .flags  = IORESOURCE_IRQ,
+       },
+       [3] = {
+               .start  = AT91RM9200_ID_TC2,
+               .end    = AT91RM9200_ID_TC2,
+               .flags  = IORESOURCE_IRQ,
+       },
+};
+
+static struct platform_device at91rm9200_tcb0_device = {
+       .name           = "atmel_tcb",
+       .id             = 0,
+       .resource       = tcb0_resources,
+       .num_resources  = ARRAY_SIZE(tcb0_resources),
+};
+
+static struct resource tcb1_resources[] = {
+       [0] = {
+               .start  = AT91RM9200_BASE_TCB1,
+               .end    = AT91RM9200_BASE_TCB1 + SZ_16K - 1,
+               .flags  = IORESOURCE_MEM,
+       },
+       [1] = {
+               .start  = AT91RM9200_ID_TC3,
+               .end    = AT91RM9200_ID_TC3,
+               .flags  = IORESOURCE_IRQ,
+       },
+       [2] = {
+               .start  = AT91RM9200_ID_TC4,
+               .end    = AT91RM9200_ID_TC4,
+               .flags  = IORESOURCE_IRQ,
+       },
+       [3] = {
+               .start  = AT91RM9200_ID_TC5,
+               .end    = AT91RM9200_ID_TC5,
+               .flags  = IORESOURCE_IRQ,
+       },
+};
+
+static struct platform_device at91rm9200_tcb1_device = {
+       .name           = "atmel_tcb",
+       .id             = 1,
+       .resource       = tcb1_resources,
+       .num_resources  = ARRAY_SIZE(tcb1_resources),
+};
+
+static void __init at91_add_device_tc(void)
+{
+       /* this chip has a separate clock and irq for each TC channel */
+       at91_clock_associate("tc0_clk", &at91rm9200_tcb0_device.dev, "t0_clk");
+       at91_clock_associate("tc1_clk", &at91rm9200_tcb0_device.dev, "t1_clk");
+       at91_clock_associate("tc2_clk", &at91rm9200_tcb0_device.dev, "t2_clk");
+       platform_device_register(&at91rm9200_tcb0_device);
+
+       at91_clock_associate("tc3_clk", &at91rm9200_tcb1_device.dev, "t0_clk");
+       at91_clock_associate("tc4_clk", &at91rm9200_tcb1_device.dev, "t1_clk");
+       at91_clock_associate("tc5_clk", &at91rm9200_tcb1_device.dev, "t2_clk");
+       platform_device_register(&at91rm9200_tcb1_device);
+}
+#else
+static void __init at91_add_device_tc(void) { }
+#endif
+
+
 /* --------------------------------------------------------------------
  *  RTC
  * -------------------------------------------------------------------- */
@@ -1141,6 +1225,7 @@ static int __init at91_add_standard_devices(void)
 {
        at91_add_device_rtc();
        at91_add_device_watchdog();
+       at91_add_device_tc();
        return 0;
 }
 
index f20afe4d156c35a3a32d62e15347b21f9ffd72e6..20ac09c0231215e6ac1afdbc5b1399ca5d1bb8c2 100644 (file)
@@ -544,6 +544,90 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
 #endif
 
 
+/* --------------------------------------------------------------------
+ *  Timer/Counter blocks
+ * -------------------------------------------------------------------- */
+
+#ifdef CONFIG_ATMEL_TCLIB
+
+static struct resource tcb0_resources[] = {
+       [0] = {
+               .start  = AT91SAM9260_BASE_TCB0,
+               .end    = AT91SAM9260_BASE_TCB0 + SZ_16K - 1,
+               .flags  = IORESOURCE_MEM,
+       },
+       [1] = {
+               .start  = AT91SAM9260_ID_TC0,
+               .end    = AT91SAM9260_ID_TC0,
+               .flags  = IORESOURCE_IRQ,
+       },
+       [2] = {
+               .start  = AT91SAM9260_ID_TC1,
+               .end    = AT91SAM9260_ID_TC1,
+               .flags  = IORESOURCE_IRQ,
+       },
+       [3] = {
+               .start  = AT91SAM9260_ID_TC2,
+               .end    = AT91SAM9260_ID_TC2,
+               .flags  = IORESOURCE_IRQ,
+       },
+};
+
+static struct platform_device at91sam9260_tcb0_device = {
+       .name           = "atmel_tcb",
+       .id             = 0,
+       .resource       = tcb0_resources,
+       .num_resources  = ARRAY_SIZE(tcb0_resources),
+};
+
+static struct resource tcb1_resources[] = {
+       [0] = {
+               .start  = AT91SAM9260_BASE_TCB1,
+               .end    = AT91SAM9260_BASE_TCB1 + SZ_16K - 1,
+               .flags  = IORESOURCE_MEM,
+       },
+       [1] = {
+               .start  = AT91SAM9260_ID_TC3,
+               .end    = AT91SAM9260_ID_TC3,
+               .flags  = IORESOURCE_IRQ,
+       },
+       [2] = {
+               .start  = AT91SAM9260_ID_TC4,
+               .end    = AT91SAM9260_ID_TC4,
+               .flags  = IORESOURCE_IRQ,
+       },
+       [3] = {
+               .start  = AT91SAM9260_ID_TC5,
+               .end    = AT91SAM9260_ID_TC5,
+               .flags  = IORESOURCE_IRQ,
+       },
+};
+
+static struct platform_device at91sam9260_tcb1_device = {
+       .name           = "atmel_tcb",
+       .id             = 1,
+       .resource       = tcb1_resources,
+       .num_resources  = ARRAY_SIZE(tcb1_resources),
+};
+
+static void __init at91_add_device_tc(void)
+{
+       /* this chip has a separate clock and irq for each TC channel */
+       at91_clock_associate("tc0_clk", &at91sam9260_tcb0_device.dev, "t0_clk");
+       at91_clock_associate("tc1_clk", &at91sam9260_tcb0_device.dev, "t1_clk");
+       at91_clock_associate("tc2_clk", &at91sam9260_tcb0_device.dev, "t2_clk");
+       platform_device_register(&at91sam9260_tcb0_device);
+
+       at91_clock_associate("tc3_clk", &at91sam9260_tcb1_device.dev, "t0_clk");
+       at91_clock_associate("tc4_clk", &at91sam9260_tcb1_device.dev, "t1_clk");
+       at91_clock_associate("tc5_clk", &at91sam9260_tcb1_device.dev, "t2_clk");
+       platform_device_register(&at91sam9260_tcb1_device);
+}
+#else
+static void __init at91_add_device_tc(void) { }
+#endif
+
+
 /* --------------------------------------------------------------------
  *  RTT
  * -------------------------------------------------------------------- */
@@ -1108,6 +1192,7 @@ static int __init at91_add_standard_devices(void)
 {
        at91_add_device_rtt();
        at91_add_device_watchdog();
+       at91_add_device_tc();
        return 0;
 }
 
index 0bd0edf8fa3bdce56c8be5609daa50e2756f55d0..03cd32482eace0c675037cd401b2f8e267179326 100644 (file)
@@ -547,6 +547,55 @@ void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) {}
 #endif
 
 
+/* --------------------------------------------------------------------
+ *  Timer/Counter block
+ * -------------------------------------------------------------------- */
+
+#ifdef CONFIG_ATMEL_TCLIB
+
+static struct resource tcb_resources[] = {
+       [0] = {
+               .start  = AT91SAM9261_BASE_TCB0,
+               .end    = AT91SAM9261_BASE_TCB0 + SZ_16K - 1,
+               .flags  = IORESOURCE_MEM,
+       },
+       [1] = {
+               .start  = AT91SAM9261_ID_TC0,
+               .end    = AT91SAM9261_ID_TC0,
+               .flags  = IORESOURCE_IRQ,
+       },
+       [2] = {
+               .start  = AT91SAM9261_ID_TC1,
+               .end    = AT91SAM9261_ID_TC1,
+               .flags  = IORESOURCE_IRQ,
+       },
+       [3] = {
+               .start  = AT91SAM9261_ID_TC2,
+               .end    = AT91SAM9261_ID_TC2,
+               .flags  = IORESOURCE_IRQ,
+       },
+};
+
+static struct platform_device at91sam9261_tcb_device = {
+       .name           = "atmel_tcb",
+       .id             = 0,
+       .resource       = tcb_resources,
+       .num_resources  = ARRAY_SIZE(tcb_resources),
+};
+
+static void __init at91_add_device_tc(void)
+{
+       /* this chip has a separate clock and irq for each TC channel */
+       at91_clock_associate("tc0_clk", &at91sam9261_tcb_device.dev, "t0_clk");
+       at91_clock_associate("tc1_clk", &at91sam9261_tcb_device.dev, "t1_clk");
+       at91_clock_associate("tc2_clk", &at91sam9261_tcb_device.dev, "t2_clk");
+       platform_device_register(&at91sam9261_tcb_device);
+}
+#else
+static void __init at91_add_device_tc(void) { }
+#endif
+
+
 /* --------------------------------------------------------------------
  *  RTT
  * -------------------------------------------------------------------- */
@@ -1050,6 +1099,7 @@ static int __init at91_add_standard_devices(void)
 {
        at91_add_device_rtt();
        at91_add_device_watchdog();
+       at91_add_device_tc();
        return 0;
 }
 
index 64aab9c9b97e14c3f217c6baee038761c4ef615e..c81842c027063b712334a507139ace2612676f29 100644 (file)
@@ -787,6 +787,43 @@ void __init at91_add_device_isi(void) {}
 #endif
 
 
+/* --------------------------------------------------------------------
+ *  Timer/Counter block
+ * -------------------------------------------------------------------- */
+
+#ifdef CONFIG_ATMEL_TCLIB
+
+static struct resource tcb_resources[] = {
+       [0] = {
+               .start  = AT91SAM9263_BASE_TCB0,
+               .end    = AT91SAM9263_BASE_TCB0 + SZ_16K - 1,
+               .flags  = IORESOURCE_MEM,
+       },
+       [1] = {
+               .start  = AT91SAM9263_ID_TCB,
+               .end    = AT91SAM9263_ID_TCB,
+               .flags  = IORESOURCE_IRQ,
+       },
+};
+
+static struct platform_device at91sam9263_tcb_device = {
+       .name           = "atmel_tcb",
+       .id             = 0,
+       .resource       = tcb_resources,
+       .num_resources  = ARRAY_SIZE(tcb_resources),
+};
+
+static void __init at91_add_device_tc(void)
+{
+       /* this chip has one clock and irq for all three TC channels */
+       at91_clock_associate("tcb_clk", &at91sam9263_tcb_device.dev, "t0_clk");
+       platform_device_register(&at91sam9263_tcb_device);
+}
+#else
+static void __init at91_add_device_tc(void) { }
+#endif
+
+
 /* --------------------------------------------------------------------
  *  RTT
  * -------------------------------------------------------------------- */
@@ -1262,6 +1299,7 @@ static int __init at91_add_standard_devices(void)
 {
        at91_add_device_rtt();
        at91_add_device_watchdog();
+       at91_add_device_tc();
        return 0;
 }
 
index 8982b02c8b46df62036e8a1ea912c41a9272e1c9..892262a71d0167fbf74ce563f994b21ad1c134a7 100644 (file)
@@ -389,6 +389,55 @@ void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) {}
 #endif
 
 
+/* --------------------------------------------------------------------
+ *  Timer/Counter block
+ * -------------------------------------------------------------------- */
+
+#ifdef CONFIG_ATMEL_TCLIB
+
+static struct resource tcb_resources[] = {
+       [0] = {
+               .start  = AT91SAM9RL_BASE_TCB0,
+               .end    = AT91SAM9RL_BASE_TCB0 + SZ_16K - 1,
+               .flags  = IORESOURCE_MEM,
+       },
+       [1] = {
+               .start  = AT91SAM9RL_ID_TC0,
+               .end    = AT91SAM9RL_ID_TC0,
+               .flags  = IORESOURCE_IRQ,
+       },
+       [2] = {
+               .start  = AT91SAM9RL_ID_TC1,
+               .end    = AT91SAM9RL_ID_TC1,
+               .flags  = IORESOURCE_IRQ,
+       },
+       [3] = {
+               .start  = AT91SAM9RL_ID_TC2,
+               .end    = AT91SAM9RL_ID_TC2,
+               .flags  = IORESOURCE_IRQ,
+       },
+};
+
+static struct platform_device at91sam9rl_tcb_device = {
+       .name           = "atmel_tcb",
+       .id             = 0,
+       .resource       = tcb_resources,
+       .num_resources  = ARRAY_SIZE(tcb_resources),
+};
+
+static void __init at91_add_device_tc(void)
+{
+       /* this chip has a separate clock and irq for each TC channel */
+       at91_clock_associate("tc0_clk", &at91sam9rl_tcb_device.dev, "t0_clk");
+       at91_clock_associate("tc1_clk", &at91sam9rl_tcb_device.dev, "t1_clk");
+       at91_clock_associate("tc2_clk", &at91sam9rl_tcb_device.dev, "t2_clk");
+       platform_device_register(&at91sam9rl_tcb_device);
+}
+#else
+static void __init at91_add_device_tc(void) { }
+#endif
+
+
 /* --------------------------------------------------------------------
  *  RTC
  * -------------------------------------------------------------------- */
@@ -930,6 +979,7 @@ static int __init at91_add_standard_devices(void)
        at91_add_device_rtc();
        at91_add_device_rtt();
        at91_add_device_watchdog();
+       at91_add_device_tc();
        return 0;
 }