[POWERPC] 85xx/86xx: refactor RSTCR reset code

On the majority of 85xx & 86xx we have a register that's ability to
assert HRESET_REQ to reset the board.  We refactored that code so it
can be shared between both platforms into fsl_soc.c and removed all
the duplication in each platform directory.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

diff --git a/arch/powerpc/boot/dts/mpc8641_hpcn.dts b/arch/powerpc/boot/dts/mpc8641_hpcn.dts
index f797662212bad545c05d448c22eb34e33192d2fb..367765937a06eb37c0aa026344911e58a7d76209 100644 (file)
--- a/arch/powerpc/boot/dts/mpc8641_hpcn.dts
+++ b/arch/powerpc/boot/dts/mpc8641_hpcn.dts
@@ -214,6 +214,12 @@
                        device_type = "open-pic";
                        big-endian;
                };
+
+               global-utilities@e0000 {
+                       compatible = "fsl,mpc8641-guts";
+                       reg = <e0000 1000>;
+                       fsl,has-rstcr;
+               };
        };
 
        pcie@f8008000 {

diff --git a/arch/powerpc/platforms/85xx/Makefile b/arch/powerpc/platforms/85xx/Makefile
index 25bd9e2d494613fff2357e967b10a6639e3c45f0..5eca92023ec8bf642d50654c55d3c68306739d85 100644 (file)
--- a/arch/powerpc/platforms/85xx/Makefile
+++ b/arch/powerpc/platforms/85xx/Makefile
@@ -1,7 +1,6 @@
 #
 # Makefile for the PowerPC 85xx linux kernel.
 #
-obj-$(CONFIG_PPC_85xx) += misc.o
 obj-$(CONFIG_MPC8540_ADS) += mpc85xx_ads.o
 obj-$(CONFIG_MPC8560_ADS) += mpc85xx_ads.o
 obj-$(CONFIG_MPC85xx_CDS) += mpc85xx_cds.o

diff --git a/arch/powerpc/platforms/85xx/misc.c b/arch/powerpc/platforms/85xx/misc.c
deleted file mode 100644 (file)
index 4fe376e..0000000
--- a/arch/powerpc/platforms/85xx/misc.c
+++ /dev/null
@@ -1,55 +0,0 @@
-/*
- * MPC85xx generic code.
- *
- * Maintained by Kumar Gala (see MAINTAINERS for contact information)
- *
- * Copyright 2005 Freescale Semiconductor Inc.
- *
- * This program is free software; you can redistribute  it and/or modify it
- * under  the terms of  the GNU General  Public License as published by the
- * Free Software Foundation;  either version 2 of the  License, or (at your
- * option) any later version.
- */
-#include <linux/irq.h>
-#include <linux/module.h>
-#include <asm/irq.h>
-#include <asm/io.h>
-#include <asm/prom.h>
-#include <sysdev/fsl_soc.h>
-
-static __be32 __iomem *rstcr;
-
-extern void abort(void);
-
-static int __init mpc85xx_rstcr(void)
-{
-       struct device_node *np;
-       np = of_find_node_by_name(NULL, "global-utilities");
-       if ((np && of_get_property(np, "fsl,has-rstcr", NULL))) {
-               const u32 *prop = of_get_property(np, "reg", NULL);
-               if (prop) {
-                       /* map reset control register
-                        * 0xE00B0 is offset of reset control register
-                        */
-                       rstcr = ioremap(get_immrbase() + *prop + 0xB0, 0xff);
-                       if (!rstcr)
-                               printk (KERN_EMERG "Error: reset control "
-                                               "register not mapped!\n");
-               }
-       } else
-               printk (KERN_INFO "rstcr compatible register does not exist!\n");
-       if (np)
-               of_node_put(np);
-       return 0;
-}
-
-arch_initcall(mpc85xx_rstcr);
-
-void mpc85xx_restart(char *cmd)
-{
-       local_irq_disable();
-       if (rstcr)
-               /* set reset control register */
-               out_be32(rstcr, 0x2);   /* HRESET_REQ */
-       abort();
-}

diff --git a/arch/powerpc/platforms/85xx/mpc85xx.h b/arch/powerpc/platforms/85xx/mpc85xx.h
deleted file mode 100644 (file)
index 5b34dee..0000000
--- a/arch/powerpc/platforms/85xx/mpc85xx.h
+++ /dev/null
@@ -1,17 +0,0 @@
-/*
- * arch/powerpc/platforms/85xx/mpc85xx.h
- *
- * MPC85xx soc definitions/function decls
- *
- * Maintainer: Kumar Gala <kumar.gala@freescale.com>
- *
- * Copyright 2005 Freescale Semiconductor Inc.
- *
- * This program is free software; you can redistribute  it and/or modify it
- * under  the terms of  the GNU General  Public License as published by the
- * Free Software Foundation;  either version 2 of the  License, or (at your
- * option) any later version.
- *
- */
-
-extern void mpc85xx_restart(char *);

diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ads.c b/arch/powerpc/platforms/85xx/mpc85xx_ads.c
index acb1ef93224065a39e7058e29329d5010e421fae..378a244b3bac867a23291b2428c18162a72687de 100644 (file)
--- a/arch/powerpc/platforms/85xx/mpc85xx_ads.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_ads.c
@@ -30,7 +30,6 @@
 
 #include <sysdev/fsl_soc.h>
 #include <sysdev/fsl_pci.h>
-#include "mpc85xx.h"
 
 #ifdef CONFIG_CPM2
 #include <linux/fs_enet_pd.h>
@@ -249,7 +248,7 @@ define_machine(mpc85xx_ads) {
        .init_IRQ               = mpc85xx_ads_pic_init,
        .show_cpuinfo           = mpc85xx_ads_show_cpuinfo,
        .get_irq                = mpic_get_irq,
-       .restart                = mpc85xx_restart,
+       .restart                = fsl_rstcr_restart,
        .calibrate_decr         = generic_calibrate_decr,
        .progress               = udbg_progress,
 };

diff --git a/arch/powerpc/platforms/85xx/mpc85xx_cds.c b/arch/powerpc/platforms/85xx/mpc85xx_cds.c
index abc85b8d9f8a443b95985e1e9cb19451af0bd07c..afe5868cd9750901da48781f106504bb22c9d361 100644 (file)
--- a/arch/powerpc/platforms/85xx/mpc85xx_cds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_cds.c
@@ -46,7 +46,6 @@
 
 #include <sysdev/fsl_soc.h>
 #include <sysdev/fsl_pci.h>
-#include "mpc85xx.h"
 
 static int cds_pci_slot = 2;
 static volatile u8 *cadmus;
@@ -96,7 +95,7 @@ static void mpc85xx_cds_restart(char *cmd)
         *  If we can't find the VIA chip (maybe the P2P bridge is disabled)
         *  or the VIA chip reset didn't work, just use the default reset.
         */
-       mpc85xx_restart(NULL);
+       fsl_rstcr_restart(NULL);
 }
 
 static void __init mpc85xx_cds_pci_irq_fixup(struct pci_dev *dev)
@@ -343,7 +342,7 @@ define_machine(mpc85xx_cds) {
        .restart        = mpc85xx_cds_restart,
        .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
 #else
-       .restart        = mpc85xx_restart,
+       .restart        = fsl_rstcr_restart,
 #endif
        .calibrate_decr = generic_calibrate_decr,
        .progress       = udbg_progress,

diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ds.c b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
index d60bb2beeb55106e7313f5eafbe21529cfc70098..772e8de9310e0c386f45b61c4cad8c756e9d6e90 100644 (file)
--- a/arch/powerpc/platforms/85xx/mpc85xx_ds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
@@ -33,7 +33,6 @@
 
 #include <sysdev/fsl_soc.h>
 #include <sysdev/fsl_pci.h>
-#include "mpc85xx.h"
 
 #undef DEBUG
 
@@ -211,7 +210,7 @@ define_machine(mpc8544_ds) {
        .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
 #endif
        .get_irq                = mpic_get_irq,
-       .restart                = mpc85xx_restart,
+       .restart                = fsl_rstcr_restart,
        .calibrate_decr         = generic_calibrate_decr,
        .progress               = udbg_progress,
 };
@@ -225,7 +224,7 @@ define_machine(mpc8572_ds) {
        .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
 #endif
        .get_irq                = mpic_get_irq,
-       .restart                = mpc85xx_restart,
+       .restart                = fsl_rstcr_restart,
        .calibrate_decr         = generic_calibrate_decr,
        .progress               = udbg_progress,
 };

diff --git a/arch/powerpc/platforms/85xx/mpc85xx_mds.c b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
index f8b6b08af84855120bc36fa66b9b631d70ca3eea..00f4c3aef78bbaef52bd3a838a5cdfc5a9b08eff 100644 (file)
--- a/arch/powerpc/platforms/85xx/mpc85xx_mds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
@@ -50,8 +50,6 @@
 #include <asm/qe_ic.h>
 #include <asm/mpic.h>
 
-#include "mpc85xx.h"
-
 #undef DEBUG
 #ifdef DEBUG
 #define DBG(fmt...) udbg_printf(fmt)
@@ -200,7 +198,7 @@ define_machine(mpc85xx_mds) {
        .setup_arch     = mpc85xx_mds_setup_arch,
        .init_IRQ       = mpc85xx_mds_pic_init,
        .get_irq        = mpic_get_irq,
-       .restart        = mpc85xx_restart,
+       .restart        = fsl_rstcr_restart,
        .calibrate_decr = generic_calibrate_decr,
        .progress       = udbg_progress,
 #ifdef CONFIG_PCI

diff --git a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
index c794d88fa55f925fba5bd0ce262002d079e32faa..6390895e5e9258ae03c07512180c1a94f3dc3224 100644 (file)
--- a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
+++ b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
@@ -37,8 +37,6 @@
 #include <sysdev/fsl_pci.h>
 #include <sysdev/fsl_soc.h>
 
-#define MPC86XX_RSTCR_OFFSET   (0xe00b0)       /* Reset Control Register */
-
 void __init
 mpc86xx_hpcd_init_irq(void)
 {
@@ -187,21 +185,6 @@ static int __init mpc86xx_hpcd_probe(void)
        return 0;
 }
 
-void
-mpc86xx_restart(char *cmd)
-{
-       void __iomem *rstcr;
-
-       rstcr = ioremap(get_immrbase() + MPC86XX_RSTCR_OFFSET, 0x100);
-
-       local_irq_disable();
-
-       /* Assert reset request to Reset Control Register */
-       out_be32(rstcr, 0x2);
-
-       /* not reached */
-}
-
 long __init
 mpc86xx_time_init(void)
 {
@@ -225,7 +208,7 @@ define_machine(mpc86xx_hpcd) {
        .setup_arch             = mpc86xx_hpcd_setup_arch,
        .init_IRQ               = mpc86xx_hpcd_init_irq,
        .get_irq                = mpic_get_irq,
-       .restart                = mpc86xx_restart,
+       .restart                = fsl_rstcr_restart,
        .time_init              = mpc86xx_time_init,
        .calibrate_decr         = generic_calibrate_decr,
        .progress               = udbg_progress,

diff --git a/arch/powerpc/platforms/86xx/mpc8641_hpcn.h b/arch/powerpc/platforms/86xx/mpc8641_hpcn.h
deleted file mode 100644 (file)
index 41e554c..0000000
--- a/arch/powerpc/platforms/86xx/mpc8641_hpcn.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * MPC8641 HPCN board definitions
- *
- * Copyright 2006 Freescale Semiconductor Inc.
- *
- * This program is free software; you can redistribute  it and/or modify it
- * under  the terms of  the GNU General  Public License as published by the
- * Free Software Foundation;  either version 2 of the  License, or (at your
- * option) any later version.
- *
- * Author: Xianghua Xiao <x.xiao@freescale.com>
- */
-
-#ifndef __MPC8641_HPCN_H__
-#define __MPC8641_HPCN_H__
-
-#include <linux/init.h>
-
-#define MPC86XX_RSTCR_OFFSET   (0xe00b0)       /* Reset Control Register */
-
-#endif /* __MPC8641_HPCN_H__ */

diff --git a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
index 6879b83ef95a0f53623da8b82815039a4ca4022a..32a531aebcb78458ca1998387c29ad9441337213 100644 (file)
--- a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
+++ b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
@@ -35,7 +35,6 @@
 #include <sysdev/fsl_soc.h>
 
 #include "mpc86xx.h"
-#include "mpc8641_hpcn.h"
 
 #undef DEBUG
 
@@ -196,23 +195,6 @@ static int __init mpc86xx_hpcn_probe(void)
        return 0;
 }
 
-
-void
-mpc86xx_restart(char *cmd)
-{
-       void __iomem *rstcr;
-
-       rstcr = ioremap(get_immrbase() + MPC86XX_RSTCR_OFFSET, 0x100);
-
-       local_irq_disable();
-
-       /* Assert reset request to Reset Control Register */
-       out_be32(rstcr, 0x2);
-
-       /* not reached */
-}
-
-
 long __init
 mpc86xx_time_init(void)
 {
@@ -237,7 +219,7 @@ define_machine(mpc86xx_hpcn) {
        .init_IRQ               = mpc86xx_hpcn_init_irq,
        .show_cpuinfo           = mpc86xx_hpcn_show_cpuinfo,
        .get_irq                = mpic_get_irq,
-       .restart                = mpc86xx_restart,
+       .restart                = fsl_rstcr_restart,
        .time_init              = mpc86xx_time_init,
        .calibrate_decr         = generic_calibrate_decr,
        .progress               = udbg_progress,

diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c
index c765d7a5217b84842832628885a1477785b903bc..be5e0bda231886f7f48e7a473a63f345adf918bf 100644 (file)
--- a/arch/powerpc/sysdev/fsl_soc.c
+++ b/arch/powerpc/sysdev/fsl_soc.c
@@ -1298,3 +1298,41 @@ err:
 
        return spi_register_board_info(board_infos, num_board_infos);
 }
+
+#if defined(CONFIG_PPC_85xx) || defined(CONFIG_PPC_86xx)
+static __be32 __iomem *rstcr;
+
+static int __init setup_rstcr(void)
+{
+       struct device_node *np;
+       np = of_find_node_by_name(NULL, "global-utilities");
+       if ((np && of_get_property(np, "fsl,has-rstcr", NULL))) {
+               const u32 *prop = of_get_property(np, "reg", NULL);
+               if (prop) {
+                       /* map reset control register
+                        * 0xE00B0 is offset of reset control register
+                        */
+                       rstcr = ioremap(get_immrbase() + *prop + 0xB0, 0xff);
+                       if (!rstcr)
+                               printk (KERN_EMERG "Error: reset control "
+                                               "register not mapped!\n");
+               }
+       } else
+               printk (KERN_INFO "rstcr compatible register does not exist!\n");
+       if (np)
+               of_node_put(np);
+       return 0;
+}
+
+arch_initcall(setup_rstcr);
+
+void fsl_rstcr_restart(char *cmd)
+{
+       local_irq_disable();
+       if (rstcr)
+               /* set reset control register */
+               out_be32(rstcr, 0x2);   /* HRESET_REQ */
+
+       while (1) ;
+}
+#endif

diff --git a/arch/powerpc/sysdev/fsl_soc.h b/arch/powerpc/sysdev/fsl_soc.h
index 618d91d1e1034b8c035dc35d5cf6875a23c5d7da..63e7db30a4cd5b547f6041589fcf43b88ee6568d 100644 (file)
--- a/arch/powerpc/sysdev/fsl_soc.h
+++ b/arch/powerpc/sysdev/fsl_soc.h
@@ -15,5 +15,6 @@ extern int fsl_spi_init(struct spi_board_info *board_infos,
                        void (*activate_cs)(u8 cs, u8 polarity),
                        void (*deactivate_cs)(u8 cs, u8 polarity));
 
+extern void fsl_rstcr_restart(char *cmd);
 #endif
 #endif