config UART1_CTS_PIN
int "UART1 CTS pin"
- depends on BFIN_UART1_CTSRTS && (BF53x || BF561)
+ depends on BFIN_UART1_CTSRTS && !BF54x
default -1
help
Refer to ./include/asm-blackfin/gpio.h to see the GPIO map.
config UART1_RTS_PIN
int "UART1 RTS pin"
- depends on BFIN_UART1_CTSRTS && (BF53x || BF561)
+ depends on BFIN_UART1_CTSRTS && !BF54x
default -1
help
Refer to ./include/asm-blackfin/gpio.h to see the GPIO map.
if (uart->cts_pin < 0)
return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
+# ifdef BF54x
+ if (UART_GET_MSR(uart) & CTS)
+# else
if (gpio_get_value(uart->cts_pin))
+# endif
return TIOCM_DSR | TIOCM_CAR;
else
#endif
return;
if (mctrl & TIOCM_RTS)
+# ifdef BF54x
+ UART_PUT_MCR(uart, UART_GET_MCR(uart) & ~MRTS);
+# else
gpio_set_value(uart->rts_pin, 0);
+# endif
else
+# ifdef BF54x
+ UART_PUT_MCR(uart, UART_GET_MCR(uart) | MRTS);
+# else
gpio_set_value(uart->rts_pin, 1);
+# endif
#endif
}
#define UART_GET_LCR(uart) bfin_read16(((uart)->port.membase + OFFSET_LCR))
#define UART_GET_LSR(uart) bfin_read16(((uart)->port.membase + OFFSET_LSR))
#define UART_GET_GCTL(uart) bfin_read16(((uart)->port.membase + OFFSET_GCTL))
+#define UART_GET_MSR(uart) bfin_read16(((uart)->port.membase + OFFSET_MSR))
+#define UART_GET_MCR(uart) bfin_read16(((uart)->port.membase + OFFSET_MCR))
#define UART_PUT_CHAR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_THR),v)
#define UART_PUT_DLL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLL),v)
#define UART_PUT_LCR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_LCR),v)
#define UART_CLEAR_LSR(uart) bfin_write16(((uart)->port.membase + OFFSET_LSR), -1)
#define UART_PUT_GCTL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_GCTL),v)
+#define UART_PUT_MCR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_MCR),v)
#if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART1_CTSRTS)
# define CONFIG_SERIAL_BFIN_CTSRTS