[ARM] 4986/1: S3C24XX: Simtec machines need UCLK as parent to DCLK

All current Simtec designs source the DCLK outputs from
the UPLL. This means the DCLK's parent must be set to UPLL
so that anything enabling and disabling an UPLL sourced
clock does not shutdown the DCLK due to missing open counts.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

diff --git a/arch/arm/mach-s3c2410/mach-bast.c b/arch/arm/mach-s3c2410/mach-bast.c
index b45fb65889d249706c590d4861681af1fac5f2fe..518727d0dfcc10e433d0ef2e511f3955bc80f328 100644 (file)
--- a/arch/arm/mach-s3c2410/mach-bast.c
+++ b/arch/arm/mach-s3c2410/mach-bast.c
@@ -592,10 +592,10 @@ static void __init bast_map_io(void)
 {
        /* initialise the clocks */
 
-       s3c24xx_dclk0.parent = NULL;
+       s3c24xx_dclk0.parent = &clk_upll;
        s3c24xx_dclk0.rate   = 12*1000*1000;
 
-       s3c24xx_dclk1.parent = NULL;
+       s3c24xx_dclk1.parent = &clk_upll;
        s3c24xx_dclk1.rate   = 24*1000*1000;
 
        s3c24xx_clkout0.parent  = &s3c24xx_dclk0;

diff --git a/arch/arm/mach-s3c2410/mach-vr1000.c b/arch/arm/mach-s3c2410/mach-vr1000.c
index 3aade7b78fe5929a4deddb621f858b424336d8af..c56423373ff311af067e8ad5d37cb7152bf1fdcd 100644 (file)
--- a/arch/arm/mach-s3c2410/mach-vr1000.c
+++ b/arch/arm/mach-s3c2410/mach-vr1000.c
@@ -393,7 +393,7 @@ static void __init vr1000_map_io(void)
 {
        /* initialise clock sources */
 
-       s3c24xx_dclk0.parent = NULL;
+       s3c24xx_dclk0.parent = &clk_upll;
        s3c24xx_dclk0.rate   = 12*1000*1000;
 
        s3c24xx_dclk1.parent = NULL;

diff --git a/arch/arm/mach-s3c2440/mach-anubis.c b/arch/arm/mach-s3c2440/mach-anubis.c
index 3d3dfa95db8ef7dcfcd668150e7fb4959638213f..47258915a2f9da5a2208ca5581cc60e8b551a197 100644 (file)
--- a/arch/arm/mach-s3c2440/mach-anubis.c
+++ b/arch/arm/mach-s3c2440/mach-anubis.c
@@ -413,10 +413,10 @@ static void __init anubis_map_io(void)
 {
        /* initialise the clocks */
 
-       s3c24xx_dclk0.parent = NULL;
+       s3c24xx_dclk0.parent = &clk_upll;
        s3c24xx_dclk0.rate   = 12*1000*1000;
 
-       s3c24xx_dclk1.parent = NULL;
+       s3c24xx_dclk1.parent = &clk_upll;
        s3c24xx_dclk1.rate   = 24*1000*1000;
 
        s3c24xx_clkout0.parent  = &s3c24xx_dclk0;

diff --git a/arch/arm/mach-s3c2440/mach-osiris.c b/arch/arm/mach-s3c2440/mach-osiris.c
index 78af7664988b98746f1499a79dd142a0fb33b5fd..8a8acdbd072da9854d99aeccae9a7af20dec3eda 100644 (file)
--- a/arch/arm/mach-s3c2440/mach-osiris.c
+++ b/arch/arm/mach-s3c2440/mach-osiris.c
@@ -18,6 +18,7 @@
 #include <linux/device.h>
 #include <linux/sysdev.h>
 #include <linux/serial_core.h>
+#include <linux/clk.h>
 
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
@@ -344,10 +345,10 @@ static void __init osiris_map_io(void)
 
        /* initialise the clocks */
 
-       s3c24xx_dclk0.parent = NULL;
+       s3c24xx_dclk0.parent = &clk_upll;
        s3c24xx_dclk0.rate   = 12*1000*1000;
 
-       s3c24xx_dclk1.parent = NULL;
+       s3c24xx_dclk1.parent = &clk_upll;
        s3c24xx_dclk1.rate   = 24*1000*1000;
 
        s3c24xx_clkout0.parent  = &s3c24xx_dclk0;