]> err.no Git - linux-2.6/commitdiff
PCI: read revision ID by default
authorAuke Kok <auke-jan.h.kok@intel.com>
Fri, 8 Jun 2007 22:46:30 +0000 (15:46 -0700)
committerGreg Kroah-Hartman <gregkh@suse.de>
Wed, 11 Jul 2007 23:02:09 +0000 (16:02 -0700)
Currently there are 97 occurrences where drivers need the pci
revision ID. We can do this once for all devices. Even the pci
subsystem needs the revision several times for quirks. The extra
u8 member pads out nicely in the pci_dev struct.

Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
arch/powerpc/kernel/pci_64.c
arch/sparc64/kernel/pci.c
drivers/pci/probe.c
include/linux/pci.h

index 96d393c2da02d62f1a49df6bd86c358fe7a964d5..e3009a43ac56ed117b553fab9f071593142205bb 100644 (file)
@@ -367,8 +367,10 @@ struct pci_dev *of_create_pci_dev(struct device_node *node,
        sprintf(pci_name(dev), "%04x:%02x:%02x.%d", pci_domain_nr(bus),
                dev->bus->number, PCI_SLOT(devfn), PCI_FUNC(devfn));
        dev->class = get_int_prop(node, "class-code", 0);
+       dev->revision = get_int_prop(node, "revision-id", 0);
 
        DBG("    class: 0x%x\n", dev->class);
+       DBG("    revision: 0x%x\n", dev->revision);
 
        dev->current_state = 4;         /* unknown power state */
        dev->error_state = pci_channel_io_normal;
index 81f4a5ea05f7ab948e307daa1853f53d1b554fbd..55ad1b899bb8e945a3e049d09ef13e5e1fd167a5 100644 (file)
@@ -448,6 +448,7 @@ struct pci_dev *of_create_pci_dev(struct pci_pbm_info *pbm,
                 */
                pci_read_config_dword(dev, PCI_CLASS_REVISION, &class);
                dev->class = class >> 8;
+               dev->revision = class & 0xff;
 
                sprintf(pci_name(dev), "%04x:%02x:%02x.%d", pci_domain_nr(bus),
                        dev->bus->number, PCI_SLOT(devfn), PCI_FUNC(devfn));
index 9cd983acba8c37287580cc9247f5ad6423277d3f..8802fcb4aaf07d1e995d6a9f7f4dc8ada4f8f51b 100644 (file)
@@ -702,6 +702,7 @@ static int pci_setup_device(struct pci_dev * dev)
                dev->bus->number, PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
 
        pci_read_config_dword(dev, PCI_CLASS_REVISION, &class);
+       dev->revision = class & 0xff;
        class >>= 8;                                /* upper 3 bytes */
        dev->class = class;
        class >>= 8;
index 5be420ac63037ae45b7af1e672eb9cdbcda3675d..45332440a2e6da57edce178f401ed8c00391451d 100644 (file)
@@ -139,6 +139,7 @@ struct pci_dev {
        unsigned short  subsystem_vendor;
        unsigned short  subsystem_device;
        unsigned int    class;          /* 3 bytes: (base,sub,prog-if) */
+       u8              revision;       /* PCI revision, low byte of class word */
        u8              hdr_type;       /* PCI header type (`multi' flag masked out) */
        u8              rom_base_reg;   /* which config register controls the ROM */
        u8              pin;            /* which interrupt pin this device uses */