[POWERPC] Update xmon slb code

This adds a bit more detail to the xmon SLB output.  When the valid
bit is set, this displays the ESID and VSID values, as well as
decoding the segment size -- 1T or 256M -- and displaying the LLP
bits.  This supresses the output for any slb entries that contain only
zeros.

sample output from power6 (1T segment support):
00 c000000008000000 40004f7ca3000500  1T  ESID=   c00000  VSID=       4f7ca3 LLP:100
01 d000000008000000 4000eb71b0000400  1T  ESID=   d00000  VSID=       eb71b0 LLP:  0
08 0000000018000000 0000c8499f8ccc80 256M ESID=        1  VSID=    c8499f8cc LLP:  0
09 00000000f8000000 0000d2c1a8e46c80 256M ESID=        f  VSID=    d2c1a8e46 LLP:  0
10 0000000048000000 0000ca87eab1dc80 256M ESID=        4  VSID=    ca87eab1d LLP:  0
43 cf00000008000000 400011b260000500  1T  ESID=   cf0000  VSID=       11b260 LLP:100

sample output from power5 (notice the non-valid but non-zero entries)
10 0000000008000000 00004fd0e077ac80 256M ESID=        0  VSID=    4fd0e077a LLP:  0
11 00000000f8000000 00005b085830fc80 256M ESID=        f  VSID=    5b085830f LLP:  0
12 0000000048000000 000052ce99fe6c80 256M ESID=        4  VSID=    52ce99fe6 LLP:  0
13 0000000018000000 000050904ed95c80 256M ESID=        1  VSID=    50904ed95 LLP:  0
14 cf00000008000000 0000d59aca40f500 256M ESID=cf0000000  VSID=    d59aca40f LLP:100
15 c000000078000000 000045cb97751500 256M ESID=c00000007  VSID=    45cb97751 LLP:100

Tested on power5 and power6.

Signed-Off-By: Will Schmidt <will_schmidt@vnet.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>

diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c
index c60d123e9f1f88dba595c6e29a90a6e17bd2c12b..865e36751f21c434d107e8d4b2dbadcce232e56d 100644 (file)
--- a/arch/powerpc/xmon/xmon.c
+++ b/arch/powerpc/xmon/xmon.c
@@ -2539,16 +2539,33 @@ static void xmon_print_symbol(unsigned long address, const char *mid,
 static void dump_slb(void)
 {
        int i;
-       unsigned long tmp;
+       unsigned long esid,vsid,valid;
+       unsigned long llp;
 
        printf("SLB contents of cpu %x\n", smp_processor_id());
 
        for (i = 0; i < mmu_slb_size; i++) {
-               asm volatile("slbmfee  %0,%1" : "=r" (tmp) : "r" (i));
-               printf("%02d %016lx ", i, tmp);
-
-               asm volatile("slbmfev  %0,%1" : "=r" (tmp) : "r" (i));
-               printf("%016lx\n", tmp);
+               asm volatile("slbmfee  %0,%1" : "=r" (esid) : "r" (i));
+               asm volatile("slbmfev  %0,%1" : "=r" (vsid) : "r" (i));
+               valid = (esid & SLB_ESID_V);
+               if (valid | esid | vsid) {
+                       printf("%02d %016lx %016lx", i, esid, vsid);
+                       if (valid) {
+                               llp = vsid & SLB_VSID_LLP;
+                               if (vsid & SLB_VSID_B_1T) {
+                                       printf("  1T  ESID=%9lx  VSID=%13lx LLP:%3lx \n",
+                                               GET_ESID_1T(esid),
+                                               (vsid & ~SLB_VSID_B) >> SLB_VSID_SHIFT_1T,
+                                               llp);
+                               } else {
+                                       printf(" 256M ESID=%9lx  VSID=%13lx LLP:%3lx \n",
+                                               GET_ESID(esid),
+                                               (vsid & ~SLB_VSID_B) >> SLB_VSID_SHIFT,
+                                               llp);
+                               }
+                       } else
+                               printf("\n");
+               }
        }
 }