pic@40000 {
linux,phandle = <40000>;
- clock-frequency = <0>;
interrupt-controller;
#address-cells = <0>;
reg = <40000 40000>;
- built-in;
compatible = "chrp,open-pic";
device_type = "open-pic";
- big-endian;
};
pic@40000 {
linux,phandle = <40000>;
- clock-frequency = <0>;
interrupt-controller;
#address-cells = <0>;
reg = <40000 40000>;
- built-in;
compatible = "chrp,open-pic";
device_type = "open-pic";
- big-endian;
};
i2c@3000 {
};
mpic: pic@7400 {
- clock-frequency = <0>;
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
reg = <0x7400 0x400>;
compatible = "chrp,open-pic";
device_type = "open-pic";
- big-endian;
};
pci@1000 {
compatible = "tsi108-pci";
interrupt-parent = <&mpic>;
};
mpic: pic@40000 {
- clock-frequency = <0>;
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
reg = <0x40000 0x40000>;
compatible = "chrp,open-pic";
device_type = "open-pic";
- big-endian;
};
};
};
mpic: pic@40000 {
- clock-frequency = <0>;
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
reg = <0x40000 0x40000>;
compatible = "chrp,open-pic";
device_type = "open-pic";
- big-endian;
};
cpm@919c0 {
};
mpic: pic@40000 {
- clock-frequency = <0>;
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
reg = <0x40000 0x40000>;
compatible = "chrp,open-pic";
device_type = "open-pic";
- big-endian;
};
msi@41600 {
};
mpic: pic@40000 {
- clock-frequency = <0>;
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
reg = <0x40000 0x40000>;
compatible = "chrp,open-pic";
device_type = "open-pic";
- big-endian;
};
};
};
mpic: pic@40000 {
- clock-frequency = <0>;
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
reg = <0x40000 0x40000>;
compatible = "chrp,open-pic";
device_type = "open-pic";
- big-endian;
};
cpm@919c0 {
#address-cells = <0>;
#interrupt-cells = <2>;
reg = <0x40000 0x40000>;
+ compatible = "chrp,open-pic";
device_type = "open-pic";
};
};
mpic: pic@40000 {
- clock-frequency = <0>;
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
reg = <0x40000 0x40000>;
compatible = "chrp,open-pic";
device_type = "open-pic";
- big-endian;
};
par_io@e0100 {
};
mpic: pic@40000 {
- clock-frequency = <0>;
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
reg = <0x40000 0x40000>;
compatible = "chrp,open-pic";
device_type = "open-pic";
- big-endian;
};
};
};
mpic: interrupt-controller@40000 {
- clock-frequency = <0>;
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
reg = <0x40000 0x40000>;
compatible = "chrp,open-pic";
device_type = "open-pic";
- big-endian;
};
msi@41600 {
};
mpic: pic@40000 {
- clock-frequency = <0>;
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
reg = <0x40000 0x40000>;
compatible = "chrp,open-pic";
device_type = "open-pic";
- big-endian;
};
global-utilities@e0000 {
mpic: pic@40000 {
interrupt-controller;
#address-cells = <0>;
- #size-cells = <0>;
#interrupt-cells = <2>;
reg = <0x40000 0x40000>;
compatible = "chrp,open-pic";
device_type = "open-pic";
- big-endian;
};
};
mpic: pic@40000 {
interrupt-controller;
#address-cells = <0>;
- #size-cells = <0>;
#interrupt-cells = <2>;
+ compatible = "chrp,open-pic";
reg = <0x40000 0x40000>;
device_type = "open-pic";
};
mpic: interrupt-controller@40000 {
#interrupt-cells = <2>;
+ #address-cells = <0>;
device_type = "open-pic";
compatible = "chrp,open-pic";
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
reg = <0x40000 0x40000>;
+ compatible = "chrp,open-pic";
device_type = "open-pic";
};
#interrupt-cells = <2>;
reg = <0x40000 0x40000>;
device_type = "open-pic";
+ compatible = "chrp,open-pic";
};
};
#interrupt-cells = <2>;
reg = <0x40000 0x40000>;
device_type = "open-pic";
+ compatible = "chrp,open-pic";
};
cpm@919c0 {
#interrupt-cells = <2>;
reg = <0x40000 0x40000>;
device_type = "open-pic";
+ compatible = "chrp,open-pic";
};
cpm@919c0 {
#interrupt-cells = <2>;
reg = <0x40000 0x40000>;
device_type = "open-pic";
+ compatible = "chrp,open-pic";
};
cpm@919c0 {