[POWERPC] spufs: fix spu irq affinity setting

This changes the hypervisor abstraction of setting cpu affinity to a
higher level to avoid platform dependent interrupt controller
routines.  I replaced spu_priv1_ops:spu_int_route_set() with a
new routine spu_priv1_ops:spu_cpu_affinity_set().

As a by-product, this change eliminated what looked like an
existing bug in the set affinity code where spu_int_route_set()
mistakenly called int_stat_get().

Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>

diff --git a/arch/powerpc/platforms/cell/spu_base.c b/arch/powerpc/platforms/cell/spu_base.c
index c3bb7299c4b56ba688377ce2c402c7ae8b999907..8ca22394e4d3a4407727622b2f72030c75914319 100644 (file)
--- a/arch/powerpc/platforms/cell/spu_base.c
+++ b/arch/powerpc/platforms/cell/spu_base.c
@@ -522,14 +522,6 @@ int spu_irq_class_1_bottom(struct spu *spu)
        return ret;
 }
 
-void spu_irq_setaffinity(struct spu *spu, int cpu)
-{
-       u64 target = iic_get_target_id(cpu);
-       u64 route = target << 48 | target << 32 | target << 16;
-       spu_int_route_set(spu, route);
-}
-EXPORT_SYMBOL_GPL(spu_irq_setaffinity);
-
 static int __init find_spu_node_id(struct device_node *spe)
 {
        unsigned int *id;

diff --git a/arch/powerpc/platforms/cell/spu_priv1_mmio.c b/arch/powerpc/platforms/cell/spu_priv1_mmio.c
index abe8a84925d2f68600ef3f4b45fbfcd1cf1074b0..71b69f0a1a48712b76b2c5d6f43a52f99699a5f3 100644 (file)
--- a/arch/powerpc/platforms/cell/spu_priv1_mmio.c
+++ b/arch/powerpc/platforms/cell/spu_priv1_mmio.c
@@ -24,6 +24,8 @@
 #include <asm/spu.h>
 #include <asm/spu_priv1.h>
 
+#include "interrupt.h"
+
 static void int_mask_and(struct spu *spu, int class, u64 mask)
 {
        u64 old_mask;
@@ -60,8 +62,10 @@ static u64 int_stat_get(struct spu *spu, int class)
        return in_be64(&spu->priv1->int_stat_RW[class]);
 }
 
-static void int_route_set(struct spu *spu, u64 route)
+static void cpu_affinity_set(struct spu *spu, int cpu)
 {
+       u64 target = iic_get_target_id(cpu);
+       u64 route = target << 48 | target << 32 | target << 16;
        out_be64(&spu->priv1->int_route_RW, route);
 }
 
@@ -138,7 +142,7 @@ const struct spu_priv1_ops spu_priv1_mmio_ops =
        .int_mask_get = int_mask_get,
        .int_stat_clear = int_stat_clear,
        .int_stat_get = int_stat_get,
-       .int_route_set = int_route_set,
+       .cpu_affinity_set = cpu_affinity_set,
        .mfc_dar_get = mfc_dar_get,
        .mfc_dsisr_get = mfc_dsisr_get,
        .mfc_dsisr_set = mfc_dsisr_set,

diff --git a/arch/powerpc/platforms/cell/spufs/sched.c b/arch/powerpc/platforms/cell/spufs/sched.c
index bf652cd77000e01c06ba723ae22f8a7e3aefe61c..3dcc5d8d66b96f8abd49183030837c19d13fe9da 100644 (file)
--- a/arch/powerpc/platforms/cell/spufs/sched.c
+++ b/arch/powerpc/platforms/cell/spufs/sched.c
@@ -43,6 +43,7 @@
 #include <asm/mmu_context.h>
 #include <asm/spu.h>
 #include <asm/spu_csa.h>
+#include <asm/spu_priv1.h>
 #include "spufs.h"
 
 #define SPU_MIN_TIMESLICE      (100 * HZ / 1000)
@@ -363,7 +364,7 @@ int spu_activate(struct spu_context *ctx, u64 flags)
         * We're likely to wait for interrupts on the same
         * CPU that we are now on, so send them here.
         */
-       spu_irq_setaffinity(spu, raw_smp_processor_id());
+       spu_cpu_affinity_set(spu, raw_smp_processor_id());
        put_active_spu(spu);
        return 0;
 }

diff --git a/include/asm-powerpc/spu_priv1.h b/include/asm-powerpc/spu_priv1.h
index cb87d1f7e9bc25a887951f3036cffaa1a72427ca..300c458b6d06b1839550b146873a3e1c618e6115 100644 (file)
--- a/include/asm-powerpc/spu_priv1.h
+++ b/include/asm-powerpc/spu_priv1.h
@@ -33,7 +33,7 @@ struct spu_priv1_ops
        u64 (*int_mask_get) (struct spu *spu, int class);
        void (*int_stat_clear) (struct spu *spu, int class, u64 stat);
        u64 (*int_stat_get) (struct spu *spu, int class);
-       void (*int_route_set) (struct spu *spu, u64 route);
+       void (*cpu_affinity_set) (struct spu *spu, int cpu);
        u64 (*mfc_dar_get) (struct spu *spu);
        u64 (*mfc_dsisr_get) (struct spu *spu);
        void (*mfc_dsisr_set) (struct spu *spu, u64 dsisr);
@@ -88,9 +88,9 @@ spu_int_stat_get (struct spu *spu, int class)
 }
 
 static inline void
-spu_int_route_set (struct spu *spu, u64 route)
+spu_cpu_affinity_set (struct spu *spu, int cpu)
 {
-       spu_priv1_ops->int_stat_get(spu, route);
+       spu_priv1_ops->cpu_affinity_set(spu, cpu);
 }
 
 static inline u64