]> err.no Git - linux-2.6/commitdiff
sh: unify external irq pin code for sh3
authorMagnus Damm <magnus.damm@gmail.com>
Thu, 24 Apr 2008 12:30:09 +0000 (21:30 +0900)
committerPaul Mundt <lethal@linux-sh.org>
Thu, 8 May 2008 10:52:00 +0000 (19:52 +0900)
This patch unifies the sh3 external irq pin code. It buys us some
savings with reduced code redundancy, but the main feature with
this change is irq sense selection support for all sh3 processors.

Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
arch/sh/kernel/cpu/sh3/Makefile
arch/sh/kernel/cpu/sh3/setup-sh3.c [new file with mode: 0644]
arch/sh/kernel/cpu/sh3/setup-sh7705.c
arch/sh/kernel/cpu/sh3/setup-sh770x.c
arch/sh/kernel/cpu/sh3/setup-sh7710.c
arch/sh/kernel/cpu/sh3/setup-sh7720.c
include/asm-sh/hw_irq.h

index 3ae4d9111f19e7cecc33463da2d5a93767713faf..511de55af8321c0d982d827d7987a6c85c45c0c6 100644 (file)
@@ -2,7 +2,7 @@
 # Makefile for the Linux/SuperH SH-3 backends.
 #
 
-obj-y  := ex.o probe.o entry.o
+obj-y  := ex.o probe.o entry.o setup-sh3.o
 
 # CPU subtype setup
 obj-$(CONFIG_CPU_SUBTYPE_SH7705)       += setup-sh7705.o
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh3.c b/arch/sh/kernel/cpu/sh3/setup-sh3.c
new file mode 100644 (file)
index 0000000..28e7d65
--- /dev/null
@@ -0,0 +1,64 @@
+/*
+ * Shared SH3 Setup code
+ *
+ *  Copyright (C) 2008  Magnus Damm
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+
+#include <linux/init.h>
+#include <linux/irq.h>
+#include <linux/io.h>
+
+/* All SH3 devices are equipped with IRQ0->5 (except sh7708) */
+
+enum {
+       UNUSED = 0,
+
+       /* interrupt sources */
+       IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5,
+};
+
+static struct intc_vect vectors_irq0123[] __initdata = {
+       INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620),
+       INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660),
+};
+
+static struct intc_vect vectors_irq45[] __initdata = {
+       INTC_VECT(IRQ4, 0x680), INTC_VECT(IRQ5, 0x6a0),
+};
+
+static struct intc_prio_reg prio_registers[] __initdata = {
+       { 0xa4000016, 0, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } },
+       { 0xa4000018, 0, 16, 4, /* IPRD */ { 0, 0, IRQ5, IRQ4 } },
+};
+
+static struct intc_sense_reg sense_registers[] __initdata = {
+       { 0xa4000010, 16, 2, { 0, 0, IRQ5, IRQ4, IRQ3, IRQ2, IRQ1, IRQ0 } },
+};
+
+static DECLARE_INTC_DESC(intc_desc_irq0123, "sh3-irq0123", vectors_irq0123,
+                        NULL, NULL, prio_registers, sense_registers);
+
+static DECLARE_INTC_DESC(intc_desc_irq45, "sh3-irq45", vectors_irq45,
+                        NULL, NULL, prio_registers, sense_registers);
+
+#define INTC_ICR1              0xa4000010UL
+#define INTC_ICR1_IRQLVL       (1<<14)
+
+void __init plat_irq_setup_pins(int mode)
+{
+       if (mode == IRQ_MODE_IRQ) {
+               ctrl_outw(ctrl_inw(INTC_ICR1) & ~INTC_ICR1_IRQLVL, INTC_ICR1);
+               register_intc_controller(&intc_desc_irq0123);
+               return;
+       }
+       BUG();
+}
+
+void __init plat_irq_setup_sh3(void)
+{
+       register_intc_controller(&intc_desc_irq45);
+}
index ba77891ee4e3694979f237bcb85da78396737e47..6468ae86b9443fd53bf0310fc3e97092f641786e 100644 (file)
@@ -37,7 +37,7 @@ enum {
 };
 
 static struct intc_vect vectors[] __initdata = {
-       INTC_VECT(IRQ4, 0x680), INTC_VECT(IRQ5, 0x6a0),
+       /* IRQ0->5 are handled in setup-sh3.c */
        INTC_VECT(PINT07, 0x700), INTC_VECT(PINT815, 0x720),
        INTC_VECT(DMAC_DEI0, 0x800), INTC_VECT(DMAC_DEI1, 0x820),
        INTC_VECT(DMAC_DEI2, 0x840), INTC_VECT(DMAC_DEI3, 0x860),
@@ -81,14 +81,6 @@ static struct intc_prio_reg prio_registers[] __initdata = {
 static DECLARE_INTC_DESC(intc_desc, "sh7705", vectors, groups,
                         NULL, prio_registers, NULL);
 
-static struct intc_vect vectors_irq[] __initdata = {
-       INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620),
-       INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660),
-};
-
-static DECLARE_INTC_DESC(intc_desc_irq, "sh7705-irq", vectors_irq, NULL,
-                        NULL, prio_registers, NULL);
-
 static struct plat_sci_port sci_platform_data[] = {
        {
                .mapbase        = 0xa4410000,
@@ -159,16 +151,8 @@ static int __init sh7705_devices_setup(void)
 }
 __initcall(sh7705_devices_setup);
 
-void __init plat_irq_setup_pins(int mode)
-{
-       if (mode == IRQ_MODE_IRQ) {
-               register_intc_controller(&intc_desc_irq);
-               return;
-       }
-       BUG();
-}
-
 void __init plat_irq_setup(void)
 {
        register_intc_controller(&intc_desc);
+       plat_irq_setup_sh3();
 }
index d3733b13ea5298194020ee43114ce3bafe8420c4..93c55e2ed952484fead5128b91509a851c28a887 100644 (file)
@@ -52,7 +52,7 @@ static struct intc_vect vectors[] __initdata = {
 #if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
     defined(CONFIG_CPU_SUBTYPE_SH7707) || \
     defined(CONFIG_CPU_SUBTYPE_SH7709)
-       INTC_VECT(IRQ4, 0x680), INTC_VECT(IRQ5, 0x6a0),
+       /* IRQ0->5 are handled in setup-sh3.c */
        INTC_VECT(DMAC_DEI0, 0x800), INTC_VECT(DMAC_DEI1, 0x820),
        INTC_VECT(DMAC_DEI2, 0x840), INTC_VECT(DMAC_DEI3, 0x860),
        INTC_VECT(ADC_ADI, 0x980),
@@ -104,18 +104,6 @@ static struct intc_prio_reg prio_registers[] __initdata = {
 static DECLARE_INTC_DESC(intc_desc, "sh770x", vectors, groups,
                         NULL, prio_registers, NULL);
 
-#if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
-    defined(CONFIG_CPU_SUBTYPE_SH7707) || \
-    defined(CONFIG_CPU_SUBTYPE_SH7709)
-static struct intc_vect vectors_irq[] __initdata = {
-       INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620),
-       INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660),
-};
-
-static DECLARE_INTC_DESC(intc_desc_irq, "sh770x-irq", vectors_irq, NULL,
-                        NULL, prio_registers, NULL);
-#endif
-
 static struct resource rtc_resources[] = {
        [0] =   {
                .start  = 0xfffffec0,
@@ -194,24 +182,12 @@ static int __init sh770x_devices_setup(void)
 }
 __initcall(sh770x_devices_setup);
 
-#define INTC_ICR1              0xa4000010UL
-#define INTC_ICR1_IRQLVL       (1<<14)
-
-void __init plat_irq_setup_pins(int mode)
+void __init plat_irq_setup(void)
 {
-       if (mode == IRQ_MODE_IRQ) {
+       register_intc_controller(&intc_desc);
 #if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
     defined(CONFIG_CPU_SUBTYPE_SH7707) || \
     defined(CONFIG_CPU_SUBTYPE_SH7709)
-               ctrl_outw(ctrl_inw(INTC_ICR1) & ~INTC_ICR1_IRQLVL, INTC_ICR1);
-               register_intc_controller(&intc_desc_irq);
-               return;
+       plat_irq_setup_sh3();
 #endif
-       }
-       BUG();
-}
-
-void __init plat_irq_setup(void)
-{
-       register_intc_controller(&intc_desc);
 }
index 7406c9ad92597c758cab7cecdf3102e48e72f078..f353a001fba6d37e2b241de7200b8d40462c3552 100644 (file)
@@ -38,7 +38,7 @@ enum {
 };
 
 static struct intc_vect vectors[] __initdata = {
-       INTC_VECT(IRQ4, 0x680), INTC_VECT(IRQ5, 0x6a0),
+       /* IRQ0->5 are handled in setup-sh3.c */
        INTC_VECT(DMAC_DEI0, 0x800), INTC_VECT(DMAC_DEI1, 0x820),
        INTC_VECT(DMAC_DEI2, 0x840), INTC_VECT(DMAC_DEI3, 0x860),
        INTC_VECT(SCIF0_ERI, 0x880), INTC_VECT(SCIF0_RXI, 0x8a0),
@@ -91,14 +91,6 @@ static struct intc_prio_reg prio_registers[] __initdata = {
 static DECLARE_INTC_DESC(intc_desc, "sh7710", vectors, groups,
                         NULL, prio_registers, NULL);
 
-static struct intc_vect vectors_irq[] __initdata = {
-       INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620),
-       INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660),
-};
-
-static DECLARE_INTC_DESC(intc_desc_irq, "sh7710-irq", vectors_irq, NULL,
-                        NULL, prio_registers, NULL);
-
 static struct resource rtc_resources[] = {
        [0] =   {
                .start  = 0xa413fec0,
@@ -170,16 +162,8 @@ static int __init sh7710_devices_setup(void)
 }
 __initcall(sh7710_devices_setup);
 
-void __init plat_irq_setup_pins(int mode)
-{
-       if (mode == IRQ_MODE_IRQ) {
-               register_intc_controller(&intc_desc_irq);
-               return;
-       }
-       BUG();
-}
-
 void __init plat_irq_setup(void)
 {
        register_intc_controller(&intc_desc);
+       plat_irq_setup_sh3();
 }
index 8028082527c55a82d835fc32f800a4262dc1bf06..0e6e66e7b584beca3ca5d803d4f9de6e7cb3a3ab 100644 (file)
 #include <linux/serial_sci.h>
 #include <asm/rtc.h>
 
-#define INTC_ICR1      0xA4140010UL
-#define INTC_ICR_IRLM   0x4000
-#define INTC_ICR_IRQ   (~INTC_ICR_IRLM)
-
 static struct resource rtc_resources[] = {
        [0] = {
                .start  = 0xa413fec0,
@@ -170,6 +166,7 @@ enum {
 };
 
 static struct intc_vect vectors[] __initdata = {
+       /* IRQ0->5 are handled in setup-sh3.c */
        INTC_VECT(TMU0, 0x400),       INTC_VECT(TMU1, 0x420),
        INTC_VECT(TMU2, 0x440),       INTC_VECT(RTC_ATI, 0x480),
        INTC_VECT(RTC_PRI, 0x4a0),    INTC_VECT(RTC_CUI, 0x4c0),
@@ -229,32 +226,8 @@ static struct intc_prio_reg prio_registers[] __initdata = {
 static DECLARE_INTC_DESC(intc_desc, "sh7720", vectors, groups,
                NULL, prio_registers, NULL);
 
-static struct intc_sense_reg sense_registers[] __initdata = {
-       { INTC_ICR1, 16, 2, { 0, 0, IRQ5, IRQ4, IRQ3, IRQ2, IRQ1, IRQ0 } },
-};
-
-static struct intc_vect vectors_irq[] __initdata = {
-       INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620),
-       INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660),
-       INTC_VECT(IRQ4, 0x680), INTC_VECT(IRQ5, 0x6a0),
-};
-
-static DECLARE_INTC_DESC(intc_irq_desc, "sh7720-irq", vectors_irq,
-               NULL, NULL, prio_registers, sense_registers);
-
-void __init plat_irq_setup_pins(int mode)
-{
-       switch (mode) {
-       case IRQ_MODE_IRQ:
-               ctrl_outw(ctrl_inw(INTC_ICR1) & INTC_ICR_IRQ, INTC_ICR1);
-               register_intc_controller(&intc_irq_desc);
-               break;
-       default:
-               BUG();
-       }
-}
-
 void __init plat_irq_setup(void)
 {
        register_intc_controller(&intc_desc);
+       plat_irq_setup_sh3();
 }
index c958fdaa00957ec835f2b7b1803baef4f5eb12d7..9d7003c03562738bdc991043c9f24219bbddc01c 100644 (file)
@@ -95,6 +95,9 @@ void __init register_intc_controller(struct intc_desc *desc);
 int intc_set_priority(unsigned int irq, unsigned int prio);
 
 void __init plat_irq_setup(void);
+#ifdef CONFIG_CPU_SH3
+void __init plat_irq_setup_sh3(void);
+#endif
 
 enum { IRQ_MODE_IRQ, IRQ_MODE_IRQ7654, IRQ_MODE_IRQ3210,
        IRQ_MODE_IRL7654_MASK, IRQ_MODE_IRL3210_MASK,