ata_piix: port enable for the first SATA controller of ICH8 is 0xf not 0x3

ICH8 and 9 use two SFF controllers to show 6 SATA ports.  The first
controllre hosts the first 4 ports while the second one hosts the last
2.  The PCS register of the first controller encompasses the first
four ports or all six ports depending on configuration while PCS of
the second controller controls the last two ports.  Using 0xf for the
first controller and 0x3 for the second controller always result in
the correct configuration.

Signed-off-by: Tejun Heo <htejun@gmail.com>

diff --git a/drivers/ata/ata_piix.c b/drivers/ata/ata_piix.c
index d5ff1d89bea305747d7f909cf9e479b08083f346..671e7966500946770e27c3efc4af5f91cd303cf5 100644 (file)
--- a/drivers/ata/ata_piix.c
+++ b/drivers/ata/ata_piix.c
@@ -430,7 +430,7 @@ static const struct piix_map_db ich6m_map_db = {
 
 static const struct piix_map_db ich8_map_db = {
        .mask = 0x3,
-       .port_enable = 0x3,
+       .port_enable = 0xf,
        .map = {
                /* PM   PS   SM   SS       MAP */
                {  P0,  P2,  P1,  P3 }, /* 00b (hardwired when in AHCI) */