bool
config PCI
- bool "PCI support" if ARCH_INTEGRATOR_AP || ARCH_VERSATILE_PB || ARCH_IXP4XX || ARCH_KS8695
+ bool "PCI support" if ARCH_INTEGRATOR_AP || ARCH_VERSATILE_PB || ARCH_IXP4XX || ARCH_KS8695 || MACH_ARMCORE
help
Find out whether you have a PCI motherboard. PCI is the name of a
bus system, i.e. the way the CPU talks to the other stuff inside
depends on PCI && ARCH_SHARK
default y
+config PCI_HOST_ITE8152
+ bool
+ depends on PCI && MACH_ARMCORE
+ default y
+ select DMABOUNCE
+
source "drivers/pci/Kconfig"
source "drivers/pcmcia/Kconfig"
{
struct irq_desc *desc;
- printk(KERN_DEBUG "===> %s: irq=%d\n", __FUNCTION__, irq);
-
desc = irq_desc + irq;
desc_handle_irq(irq, desc);
}
int bits_pd, bits_lp, bits_ld;
int i;
- printk(KERN_DEBUG "=> %s: irq = %d\n", __FUNCTION__, irq);
-
while (1) {
/* Read all */
bits_pd = __raw_readl(IT8152_INTC_PDCNIRR);
*/
int pci_set_dma_mask(struct pci_dev *dev, u64 mask)
{
- printk(KERN_DEBUG "%s: %s %llx\n",
- __FUNCTION__, dev->dev.bus_id, mask);
+ dev_dbg(&dev->dev, "%s: %llx\n", __FUNCTION__, mask);
if (mask >= PHYS_OFFSET + SZ_64M - 1)
return 0;
int
pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask)
{
- printk(KERN_DEBUG "%s: %s %llx\n",
- __FUNCTION__, dev->dev.bus_id, mask);
+ dev_dbg(&dev->dev, "%s: %llx\n", __FUNCTION__, mask);
if (mask >= PHYS_OFFSET + SZ_64M - 1)
return 0;
{
unsigned int sz = SZ_64M >> PAGE_SHIFT;
- printk(KERN_INFO "Adjusting zones for CM-x270\n");
+ pr_info("Adjusting zones for CM-x270\n");
/*
* Only adjust if > 64M on current system
{
int irq;
- printk(KERN_DEBUG "===> %s: %s slot=%x, pin=%x\n", __FUNCTION__,
- pci_name(dev), slot, pin);
+ dev_dbg(&dev->dev, "%s: slot=%x, pin=%x\n", __FUNCTION__, slot, pin);
irq = it8152_pci_map_irq(dev, slot, pin);
if (irq)
return(0);
}
-static struct pci_bus * __init
-cmx270_pci_scan_bus(int nr, struct pci_sys_data *sys)
+static void cmx270_pci_preinit(void)
{
- printk(KERN_INFO "Initializing CM-X270 PCI subsystem\n");
+ pr_info("Initializing CM-X270 PCI subsystem\n");
__raw_writel(0x800, IT8152_PCI_CFG_ADDR);
if (__raw_readl(IT8152_PCI_CFG_DATA) == 0x81521283) {
- printk(KERN_INFO "PCI Bridge found.\n");
+ pr_info("PCI Bridge found.\n");
/* set PCI I/O base at 0 */
writel(0x848, IT8152_PCI_CFG_ADDR);
/* CardBus Controller on ATXbase baseboard */
writel(0x4000, IT8152_PCI_CFG_ADDR);
if (readl(IT8152_PCI_CFG_DATA) == 0xAC51104C) {
- printk(KERN_INFO "CardBus Bridge found.\n");
+ pr_info("CardBus Bridge found.\n");
/* Configure socket 0 */
writel(0x408C, IT8152_PCI_CFG_ADDR);
writel(0xb0000000, IT8152_PCI_CFG_DATA);
}
}
- return it8152_pci_scan_bus(nr, sys);
}
static struct hw_pci cmx270_pci __initdata = {
.map_irq = cmx270_pci_map_irq,
.nr_controllers = 1,
.setup = it8152_pci_setup,
- .scan = cmx270_pci_scan_bus,
+ .scan = it8152_pci_scan_bus,
+ .preinit = cmx270_pci_preinit,
};
static int __init cmx270_init_pci(void)