[XTENSA] Fix cache flush macro for D$/I$ aliasing/non-aliasing

For configurations that have aliasing in the data cache but
not in the instruction cache, we don't need to flush the
instruction cache. Thus, we didn't define the macros to
flush the instruction cache. Some cache-flush functions,
howerver, were using those macros.

Signed-off-by: Chris Zankel <chris@zankel.net>

diff --git a/include/asm-xtensa/cacheflush.h b/include/asm-xtensa/cacheflush.h
index b773c57e75a525c344a892855d8b04a6df14473b..94c4c53a099eb81cf2c4dbf2292131fb8c746014 100644 (file)
--- a/include/asm-xtensa/cacheflush.h
+++ b/include/asm-xtensa/cacheflush.h
@@ -70,6 +70,8 @@ extern void __flush_invalidate_dcache_page_alias(unsigned long, unsigned long);
 #endif
 #if (ICACHE_WAY_SIZE > PAGE_SIZE)
 extern void __invalidate_icache_page_alias(unsigned long, unsigned long);
+#else
+# define __invalidate_icache_page_alias(v,p)   do { } while(0)
 #endif
 
 /*