sparse_init();
paging_init();
resource_init();
+#ifdef CONFIG_SMP
+ plat_smp_setup();
+#endif
}
int __init fpu_disable(char *s)
init_new_context(current, &init_mm);
current_thread_info()->cpu = 0;
smp_tune_scheduling();
- prom_prepare_cpus(max_cpus);
+ plat_prepare_cpus(max_cpus);
}
/* preload SMP state for boot cpu */
* Make sure all CPU's are in a sensible state before we boot any of the
* secondarys
*/
-void prom_prepare_cpus(unsigned int max_cpus)
+void plat_smp_setup(void)
{
unsigned long val;
int i, num;
write_vpe_c0_vpeconf0(tmp);
/* Record this as available CPU */
- if (i < max_cpus) {
- cpu_set(i, phys_cpu_present_map);
- __cpu_number_map[i] = ++num;
- __cpu_logical_map[num] = i;
- }
+ cpu_set(i, phys_cpu_present_map);
+ __cpu_number_map[i] = ++num;
+ __cpu_logical_map[num] = i;
}
/* disable multi-threading with TC's */
set_vi_handler (MIPS_CPU_IPI_RESCHED_IRQ, ipi_resched_dispatch);
set_vi_handler (MIPS_CPU_IPI_CALL_IRQ, ipi_call_dispatch);
}
+}
+void __init plat_prepare_cpus(unsigned int max_cpus)
+{
cpu_ipi_resched_irq = MIPSCPU_INT_BASE + MIPS_CPU_IPI_RESCHED_IRQ;
cpu_ipi_call_irq = MIPSCPU_INT_BASE + MIPS_CPU_IPI_CALL_IRQ;
* We don't want to start the secondary CPU yet nor do we have a nice probing
* feature in PMON so we just assume presence of the secondary core.
*/
-static char maxcpus_string[] __initdata =
- KERN_WARNING "max_cpus set to 0; using 1 instead\n";
-
-void __init prom_prepare_cpus(unsigned int max_cpus)
+void __init plat_smp_setup(void)
{
- int enabled = 0, i;
-
- if (max_cpus == 0) {
- printk(maxcpus_string);
- max_cpus = 1;
- }
+ int i;
cpus_clear(phys_cpu_present_map);
for (i = 0; i < 2; i++) {
- if (i == max_cpus)
- break;
-
- /*
- * The boot CPU
- */
cpu_set(i, phys_cpu_present_map);
__cpu_number_map[i] = i;
__cpu_logical_map[i] = i;
- enabled++;
}
+}
+void __init plat_prepare_cpus(unsigned int max_cpus)
+{
/*
* Be paranoid. Enable the IPI only if we're really about to go SMP.
*/
- if (enabled > 1)
+ if (cpus_weight(cpu_possible_map))
set_c0_status(STATUSF_IP5);
}
REMOTE_HUB_CLR_INTR(nasid, i);
}
-void __init prom_prepare_cpus(unsigned int max_cpus)
+void __init plat_smp_setup(void)
{
cnodeid_t cnode;
alloc_cpupda(0, 0);
}
+void __init plat_prepare_cpus(unsigned int max_cpus)
+{
+ /* We already did everything necessary earlier */
+}
+
/*
* Launch a slave into smp_bootstrap(). It doesn't take an argument, and we
* set sp to the kernel stack of the newly created idle process, gp to the proc
*
* Common setup before any secondaries are started
*/
-void __init prom_prepare_cpus(unsigned int max_cpus)
+void __init plat_smp_setup(void)
{
int i, num;
__cpu_number_map[0] = 0;
__cpu_logical_map[0] = 0;
- for (i=1, num=0; i<NR_CPUS; i++) {
+ for (i = 1, num = 0; i < NR_CPUS; i++) {
if (cfe_cpu_stop(i) == 0) {
cpu_set(i, phys_cpu_present_map);
__cpu_number_map[i] = ++num;
__cpu_logical_map[num] = i;
}
}
- printk("Detected %i available secondary CPU(s)\n", num);
+ printk(KERN_INFO "Detected %i available secondary CPU(s)\n", num);
+}
+
+void __init plat_prepare_cpus(unsigned int max_cpus)
+{
}
/*
return cpus_weight(cpu_callout_map);
}
-/* These are defined by the board-specific code. */
+/*
+ * These are defined by the board-specific code.
+ */
/*
* Cause the function described by call_data to be executed on the passed
extern void prom_init_secondary(void);
/*
- * Detect available CPUs, populate phys_cpu_present_map before smp_init
+ * Populate cpu_possible_map before smp_init, called from setup_arch.
+ */
+extern void plat_smp_setup(void);
+
+/*
+ * Called after init_IRQ but before __cpu_up.
*/
extern void prom_prepare_cpus(unsigned int max_cpus);