sh: MS7712SE01 board support.

Support the SH7712 (SH3-DSP) Solution Engine reference board.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>

diff --git a/arch/sh/Kconfig.debug b/arch/sh/Kconfig.debug
index 931c620dbc243b8a9acdf57504d68561c4be6b43..be60def6f3062574afaa755763a2a3bda56326f9 100644 (file)
--- a/arch/sh/Kconfig.debug
+++ b/arch/sh/Kconfig.debug
@@ -33,6 +33,7 @@ config EARLY_SCIF_CONSOLE_PORT
        default "0xffe00000" if CPU_SUBTYPE_SH7780
        default "0xfffe9800" if CPU_SUBTYPE_SH7206
        default "0xf8420000" if CPU_SUBTYPE_SH7619
+       default "0xa4400000" if CPU_SUBTYPE_SH7712
        default "0xffe80000" if CPU_SH4
 
 config EARLY_PRINTK

diff --git a/arch/sh/boards/se/770x/io.c b/arch/sh/boards/se/770x/io.c
index 9941949331abee325bea7f35f97a52b2673a6b01..c4550473d4c33f2dc4e4bac5371cd9ccf19c1fcf 100644 (file)
--- a/arch/sh/boards/se/770x/io.c
+++ b/arch/sh/boards/se/770x/io.c
@@ -27,6 +27,8 @@ int sh_pcic_io_dummy;
 static inline volatile __u16 *
 port2adr(unsigned int port)
 {
+       if (port & 0xff000000)
+               return ( volatile __u16 *) port;
        if (port >= 0x2000)
                return (volatile __u16 *) (PA_MRSHPC + (port - 0x2000));
        else if (port >= 0x1000)

diff --git a/arch/sh/boards/se/770x/irq.c b/arch/sh/boards/se/770x/irq.c
index 307ca5da6232c54b53821ff86bdddcc2944aab2a..59cdffa13964180135494c15e4f065e78bba5d3f 100644 (file)
--- a/arch/sh/boards/se/770x/irq.c
+++ b/arch/sh/boards/se/770x/irq.c
@@ -55,6 +55,17 @@ void make_se770x_irq(struct ipr_data *table, unsigned int nr_irqs)
 }
 
 static struct ipr_data se770x_ipr_map[] = {
+       /*
+       * Super I/O (Just mimic PC):
+       *  1: keyboard
+       *  3: serial 0
+       *  4: serial 1
+       *  5: printer
+       *  6: floppy
+       *  8: rtc
+       * 12: mouse
+       * 14: ide0
+        */
 #if defined(CONFIG_CPU_SUBTYPE_SH7705)
        /* This is default value */
        { 0xf-0x2, 0, 8,  0x2 , BCR_ILCRA},
@@ -81,8 +92,10 @@ static struct ipr_data se770x_ipr_map[] = {
        {  4, 0,  4, 0x0f- 4 ,BCR_ILCRC},
        {  3, 0,  0, 0x0f- 3 ,BCR_ILCRC},
        {  1, 0, 12, 0x0f- 1 ,BCR_ILCRD},
+#if defined(CONFIG_STNIC)
        /* ST NIC */
        { 10, 0,  4, 0x0f-10 ,BCR_ILCRD},       /* LAN */
+#endif
        /* MRSHPC IRQs setting */
        {  0, 0, 12, 0x0f- 0 ,BCR_ILCRE},       /* PCIRQ3 */
        { 11, 0,  8, 0x0f-11 ,BCR_ILCRE},       /* PCIRQ2 */
@@ -100,18 +113,6 @@ static struct ipr_data se770x_ipr_map[] = {
  */
 void __init init_se_IRQ(void)
 {
-        /*
-         * Super I/O (Just mimic PC):
-         *  1: keyboard
-         *  3: serial 0
-         *  4: serial 1
-         *  5: printer
-         *  6: floppy
-         *  8: rtc
-         * 12: mouse
-         * 14: ide0
-         */
-#if defined(CONFIG_CPU_SUBTYPE_SH7705)
        /* Disable all interrupts */
        ctrl_outw(0, BCR_ILCRA);
        ctrl_outw(0, BCR_ILCRB);
@@ -120,6 +121,6 @@ void __init init_se_IRQ(void)
        ctrl_outw(0, BCR_ILCRE);
        ctrl_outw(0, BCR_ILCRF);
        ctrl_outw(0, BCR_ILCRG);
-#endif
+
        make_se770x_irq(se770x_ipr_map, ARRAY_SIZE(se770x_ipr_map));
 }

diff --git a/arch/sh/boards/se/770x/setup.c b/arch/sh/boards/se/770x/setup.c
index dab5510699a0b08b3336a768a2b7d9ded680fe67..f1c7c8d9fdd27a388fcc6a084078f59b862e8d76 100644 (file)
--- a/arch/sh/boards/se/770x/setup.c
+++ b/arch/sh/boards/se/770x/setup.c
@@ -117,7 +117,7 @@ static int __init se_devices_setup(void)
 {
        return platform_add_devices(se_devices, ARRAY_SIZE(se_devices));
 }
-__initcall(se_devices_setup);
+device_initcall(se_devices_setup);
 
 /*
  * The Machine Vector
@@ -133,6 +133,8 @@ struct sh_machine_vector mv_se __initmv = {
        .mv_nr_irqs             = 61,
 #elif defined(CONFIG_CPU_SUBTYPE_SH7705)
        .mv_nr_irqs             = 86,
+#elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712)
+       .mv_nr_irqs             = 104,
 #endif
 
        .mv_inb                 = se_inb,

diff --git a/arch/sh/kernel/cpu/sh3/Makefile b/arch/sh/kernel/cpu/sh3/Makefile
index 83905e4e43872017ea905073f12410eca98e3a80..09faa056cd43b0eec5cc45673b9d1904142097e2 100644 (file)
--- a/arch/sh/kernel/cpu/sh3/Makefile
+++ b/arch/sh/kernel/cpu/sh3/Makefile
@@ -12,6 +12,7 @@ obj-$(CONFIG_CPU_SUBTYPE_SH7708)      += setup-sh7708.o
 obj-$(CONFIG_CPU_SUBTYPE_SH7709)       += setup-sh7709.o
 obj-$(CONFIG_CPU_SUBTYPE_SH7300)       += setup-sh7300.o
 obj-$(CONFIG_CPU_SUBTYPE_SH7710)       += setup-sh7710.o
+obj-$(CONFIG_CPU_SUBTYPE_SH7712)       += setup-sh7710.o
 
 # Primary on-chip clocks (common)
 clock-$(CONFIG_CPU_SH3)                        := clock-sh3.o

diff --git a/arch/sh/kernel/cpu/sh3/probe.c b/arch/sh/kernel/cpu/sh3/probe.c
index 821b0ab7b528226f6d3244a914b8164d1ead4532..647623b22edc81d3c2ae5ea0c75b4fd29b2ba9e1 100644 (file)
--- a/arch/sh/kernel/cpu/sh3/probe.c
+++ b/arch/sh/kernel/cpu/sh3/probe.c
@@ -78,6 +78,9 @@ int __init detect_cpu_and_cache_system(void)
 #if defined(CONFIG_CPU_SUBTYPE_SH7710)
                current_cpu_data.type = CPU_SH7710;
 #endif
+#if defined(CONFIG_CPU_SUBTYPE_SH7712)
+               current_cpu_data.type = CPU_SH7712;
+#endif
 #if defined(CONFIG_CPU_SUBTYPE_SH7705)
                current_cpu_data.type = CPU_SH7705;
 

diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7710.c b/arch/sh/kernel/cpu/sh3/setup-sh7710.c
index 895f99ee6a95101325f99595263ef533a7fc9599..51760a7e7f1c1a3703ad20c8ec7801fd971d7ab6 100644 (file)
--- a/arch/sh/kernel/cpu/sh3/setup-sh7710.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7710.c
@@ -2,6 +2,7 @@
  * SH7710 Setup
  *
  *  Copyright (C) 2006  Paul Mundt
+ *  Copyright (C) 2007  Nobuhiro Iwamatsu
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
@@ -19,6 +20,12 @@ static struct plat_sci_port sci_platform_data[] = {
                .type           = PORT_SCIF,
                .irqs           = { 52, 53, 55, 54 },
        }, {
+               .mapbase        = 0xa4420000,
+               .flags          = UPF_BOOT_AUTOCONF,
+               .type           = PORT_SCIF,
+               .irqs           = { 56, 57, 59, 58 },
+       }, {
+
                .flags = 0,
        }
 };
@@ -41,3 +48,56 @@ static int __init sh7710_devices_setup(void)
                                    ARRAY_SIZE(sh7710_devices));
 }
 __initcall(sh7710_devices_setup);
+
+static struct ipr_data sh7710_ipr_map[] = {
+       /* IRQ, IPR-idx, shift, priority */
+       { 16, 0, 12, 2 }, /* TMU0 TUNI*/
+       { 17, 0,  8, 2 }, /* TMU1 TUNI */
+       { 18, 0,  4, 2 }, /* TMU2 TUNI */
+       { 27, 1, 12, 2 }, /* WDT ITI */
+       { 20, 0,  0, 2 }, /* RTC ATI (alarm) */
+       { 21, 0,  0, 2 }, /* RTC PRI (period) */
+       { 22, 0,  0, 2 }, /* RTC CUI (carry) */
+       { 48, 4, 12, 7 }, /* DMAC DMTE0 */
+       { 49, 4, 12, 7 }, /* DMAC DMTE1 */
+       { 50, 4, 12, 7 }, /* DMAC DMTE2 */
+       { 51, 4, 12, 7 }, /* DMAC DMTE3 */
+       { 52, 4,  8, 3 }, /* SCIF0 ERI */
+       { 53, 4,  8, 3 }, /* SCIF0 RXI */
+       { 54, 4,  8, 3 }, /* SCIF0 BRI */
+       { 55, 4,  8, 3 }, /* SCIF0 TXI */
+       { 56, 4,  4, 3 }, /* SCIF1 ERI */
+       { 57, 4,  4, 3 }, /* SCIF1 RXI */
+       { 58, 4,  4, 3 }, /* SCIF1 BRI */
+       { 59, 4,  4, 3 }, /* SCIF1 TXI */
+       { 76, 5,  8, 7 }, /* DMAC DMTE4 */
+       { 77, 5,  8, 7 }, /* DMAC DMTE5 */
+       { 80, 6, 12, 5 }, /* EDMAC EINT0 */
+       { 81, 6,  8, 5 }, /* EDMAC EINT1 */
+       { 82, 6,  4, 5 }, /* EDMAC EINT2 */
+};
+
+static unsigned long ipr_offsets[] = {
+       0xA414FEE2      /* 0: IPRA */
+,      0xA414FEE4      /* 1: IPRB */
+,      0xA4140016      /* 2: IPRC */
+,      0xA4140018      /* 3: IPRD */
+,      0xA414001A      /* 4: IPRE */
+,      0xA4080000      /* 5: IPRF */
+,      0xA4080002      /* 6: IPRG */
+,      0xA4080004      /* 7: IPRH */
+,      0xA4080006      /* 8: IPRI */
+};
+
+/* given the IPR index return the address of the IPR register */
+unsigned int map_ipridx_to_addr(int idx)
+{
+       if (idx >= ARRAY_SIZE(ipr_offsets))
+               return 0;
+       return ipr_offsets[idx];
+}
+
+void __init init_IRQ_ipr()
+{
+       make_ipr_irq(sh7710_ipr_map, ARRAY_SIZE(sh7710_ipr_map));
+}

diff --git a/arch/sh/kernel/process.c b/arch/sh/kernel/process.c
index e7607366ac4e7e2a7998b9ad793ade86d4f08c56..286c80388bf591c09c8ffbdbfe5c75ae25f6adb6 100644 (file)
--- a/arch/sh/kernel/process.c
+++ b/arch/sh/kernel/process.c
@@ -299,7 +299,8 @@ static void ubc_set_tracing(int asid, unsigned long pc)
        ctrl_outl(0, UBC_BAMRA);
 
        if (current_cpu_data.type == CPU_SH7729 ||
-           current_cpu_data.type == CPU_SH7710) {
+           current_cpu_data.type == CPU_SH7710 || 
+           current_cpu_data.type == CPU_SH7712 ) {
                ctrl_outw(BBR_INST | BBR_READ | BBR_CPU, UBC_BBRA);
                ctrl_outl(BRCR_PCBA | BRCR_PCTE, UBC_BRCR);
        } else {

diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c
index f96490419768a72412dcc34abd2ace8f99c533c9..4d6d8911519421cc3e228e6ae4f10494c6b1e607 100644 (file)
--- a/arch/sh/kernel/setup.c
+++ b/arch/sh/kernel/setup.c
@@ -377,6 +377,7 @@ static const char *cpu_name[] = {
        [CPU_SH7705]    = "SH7705",     [CPU_SH7706]    = "SH7706",
        [CPU_SH7707]    = "SH7707",     [CPU_SH7708]    = "SH7708",
        [CPU_SH7709]    = "SH7709",     [CPU_SH7710]    = "SH7710",
+       [CPU_SH7712]    = "SH7712",
        [CPU_SH7729]    = "SH7729",     [CPU_SH7750]    = "SH7750",
        [CPU_SH7750S]   = "SH7750S",    [CPU_SH7750R]   = "SH7750R",
        [CPU_SH7751]    = "SH7751",     [CPU_SH7751R]   = "SH7751R",

diff --git a/arch/sh/mm/Kconfig b/arch/sh/mm/Kconfig
index 6b0d28ac9241cd20e91ac5474af7d221c8161854..3cac22f50e1569fd4d5d5e710d2db638918200cf 100644 (file)
--- a/arch/sh/mm/Kconfig
+++ b/arch/sh/mm/Kconfig
@@ -101,9 +101,17 @@ config CPU_SUBTYPE_SH7709
 config CPU_SUBTYPE_SH7710
        bool "Support SH7710 processor"
        select CPU_SH3
+       select CPU_HAS_IPR_IRQ
        help
          Select SH7710 if you have a SH3-DSP SH7710 CPU.
 
+config CPU_SUBTYPE_SH7712
+       bool "Support SH7712 processor"
+       select CPU_SH3
+       select CPU_HAS_IPR_IRQ
+       help
+         Select SH7712 if you have a SH3-DSP SH7712 CPU.
+
 comment "SH-4 Processor Support"
 
 config CPU_SUBTYPE_SH7750

diff --git a/drivers/serial/sh-sci.c b/drivers/serial/sh-sci.c
index 8f387219287fa6992a3b3d666e13d020f455ea3a..0a34fa9e07336082a2e8ce3f3924178ff256299b 100644 (file)
--- a/drivers/serial/sh-sci.c
+++ b/drivers/serial/sh-sci.c
@@ -284,12 +284,23 @@ static void sci_init_pins_irda(struct uart_port *port, unsigned int cflag)
 #endif
 
 #if defined(SCIF_ONLY) || defined(SCI_AND_SCIF)
-#if defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7710)
+#if defined(CONFIG_CPU_SUBTYPE_SH7300) 
 /* SH7300 doesn't use RTS/CTS */
 static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
 {
        sci_out(port, SCFCR, 0);
 }
+#elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712)
+static void sci_init_pins_scif(struct uart_port* port, unsigned int cflag)
+{
+       unsigned int fcr_val = 0;
+
+       set_sh771x_scif_pfc(port);
+       if (cflag & CRTSCTS) {
+               fcr_val |= SCFCR_MCE;
+       }
+       sci_out(port, SCFCR, fcr_val);
+}
 #elif defined(CONFIG_CPU_SH3)
 /* For SH7705, SH7706, SH7707, SH7709, SH7709A, SH7729 */
 static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)

diff --git a/drivers/serial/sh-sci.h b/drivers/serial/sh-sci.h
index 854153a1d60a4060dec28352f2e47665669392fe..fb04fb5f984309555ca89b0bf7d11047ccf4d2e8 100644 (file)
--- a/drivers/serial/sh-sci.h
+++ b/drivers/serial/sh-sci.h
@@ -73,9 +73,13 @@
 # define SCPDR  0xA4050136        /* 16 bit SCIF */
 # define SCSCR_INIT(port)  0x0030 /* TIE=0,RIE=0,TE=1,RE=1 */
 # define SCIF_ONLY
-#elif defined(CONFIG_CPU_SUBTYPE_SH7710)
+#elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712) 
 # define SCSPTR0 0xA4400000      /* 16 bit SCIF */
-# define SCSCR_INIT(port)  0x0030 /* TIE=0,RIE=0,TE=1,RE=1 */
+# define SCI_NPORTS 2
+# define SCIF_ORER 0x0001   /* overrun error bit */
+# define PACR 0xa4050100
+# define PBCR 0xa4050102
+# define SCSCR_INIT(port)          0x3B
 # define SCIF_ONLY
 #elif defined(CONFIG_CPU_SUBTYPE_SH73180)
 # define SCPDR  0xA4050138        /* 16 bit SCIF */
@@ -346,9 +350,15 @@
   }
 
 #ifdef CONFIG_CPU_SH3
-#if defined(CONFIG_CPU_SUBTYPE_SH7300) || \
-    defined(CONFIG_CPU_SUBTYPE_SH7705) || \
-    defined(CONFIG_CPU_SUBTYPE_SH7710)
+#if defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712)
+#define SCIx_FNS(name, sh3_sci_offset, sh3_sci_size, sh4_sci_offset, sh4_sci_size, \
+                               sh3_scif_offset, sh3_scif_size, sh4_scif_offset, sh4_scif_size, \
+                                h8_sci_offset, h8_sci_size) \
+  CPU_SCIx_FNS(name, sh4_sci_offset, sh4_sci_size, sh4_scif_offset, sh4_scif_size)
+#define SCIF_FNS(name, sh3_scif_offset, sh3_scif_size, sh4_scif_offset, sh4_scif_size) \
+         CPU_SCIF_FNS(name, sh4_scif_offset, sh4_scif_size)
+#elif defined(CONFIG_CPU_SUBTYPE_SH7300) || \
+    defined(CONFIG_CPU_SUBTYPE_SH7705) 
 #define SCIF_FNS(name, scif_offset, scif_size) \
   CPU_SCIF_FNS(name, scif_offset, scif_size)
 #else
@@ -375,8 +385,8 @@
 #endif
 
 #if defined(CONFIG_CPU_SUBTYPE_SH7300) || \
-    defined(CONFIG_CPU_SUBTYPE_SH7705) || \
-    defined(CONFIG_CPU_SUBTYPE_SH7710)
+    defined(CONFIG_CPU_SUBTYPE_SH7705) 
+
 SCIF_FNS(SCSMR,  0x00, 16)
 SCIF_FNS(SCBRR,  0x04,  8)
 SCIF_FNS(SCSCR,  0x08, 16)
@@ -486,13 +496,24 @@ static inline int sci_rxd_in(struct uart_port *port)
                return ctrl_inb(SCPDR)&0x10 ? 1 : 0; /* SCIF */
        return 1;
 }
-#elif defined(CONFIG_CPU_SUBTYPE_SH7710)
+#elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712)
 static inline int sci_rxd_in(struct uart_port *port)
 {
-       if (port->mapbase == SCSPTR0)
-               return ctrl_inw(SCSPTR0 + 0x10) & 0x01 ? 1 : 0;
-       return 1;
+         return sci_in(port,SCxSR)&0x0010 ? 1 : 0;
+}
+static inline void set_sh771x_scif_pfc(struct uart_port *port)
+{
+       if (port->mapbase == 0xA4400000){
+               ctrl_outw(ctrl_inw(PACR)&0xffc0,PACR);
+               ctrl_outw(ctrl_inw(PBCR)&0x0fff,PBCR);
+               return;
+       }
+       if (port->mapbase == 0xA4410000){
+               ctrl_outw(ctrl_inw(PBCR)&0xf003,PBCR);
+               return;
+       }
 }
+
 #elif defined(CONFIG_CPU_SUBTYPE_SH7750) || \
       defined(CONFIG_CPU_SUBTYPE_SH7751) || \
       defined(CONFIG_CPU_SUBTYPE_SH4_202)

diff --git a/include/asm-sh/cpu-sh3/mmu_context.h b/include/asm-sh/cpu-sh3/mmu_context.h
index bccb7ddb438b9ca10bbe7f3d86a9dc9fa3d69255..4704e86dff5b725f0d0a944f3be206091b916df7 100644 (file)
--- a/include/asm-sh/cpu-sh3/mmu_context.h
+++ b/include/asm-sh/cpu-sh3/mmu_context.h
@@ -32,6 +32,7 @@
     defined(CONFIG_CPU_SUBTYPE_SH7706) || \
     defined(CONFIG_CPU_SUBTYPE_SH7300) || \
     defined(CONFIG_CPU_SUBTYPE_SH7705) || \
+    defined(CONFIG_CPU_SUBTYPE_SH7712) || \
     defined(CONFIG_CPU_SUBTYPE_SH7710)
 #define INTEVT 0xa4000000      /* INTEVTE2(0xa4000000) */
 #else

diff --git a/include/asm-sh/processor.h b/include/asm-sh/processor.h
index 3e46a7afe764110ba68e8da824596f0f5359abea..d42f68e724fa3720d5c39ec5115c306e9db23442 100644 (file)
--- a/include/asm-sh/processor.h
+++ b/include/asm-sh/processor.h
@@ -44,7 +44,7 @@ enum cpu_type {
        /* SH-3 types */
        CPU_SH7705, CPU_SH7706, CPU_SH7707,
        CPU_SH7708, CPU_SH7708S, CPU_SH7708R,
-       CPU_SH7709, CPU_SH7709A, CPU_SH7710,
+       CPU_SH7709, CPU_SH7709A, CPU_SH7710, CPU_SH7712,
        CPU_SH7729, CPU_SH7300,
 
        /* SH-4 types */

diff --git a/include/asm-sh/se.h b/include/asm-sh/se.h
index a1832154a3aacf40400c2982e997bd2cc9e35f61..eeaf5c9124cc01c6a1cba1eabf7e6444e271af7f 100644 (file)
--- a/include/asm-sh/se.h
+++ b/include/asm-sh/se.h
@@ -73,6 +73,7 @@
 #else
 #define IRQ_STNIC      10
 #endif
+#define IRQ_CFCARD    7
 
 #define __IO_PREFIX    se
 #include <asm/io_generic.h>