Sync c-tx39.c with c-r4k.c.

tx39_flush_cache_range() does nothing if !cpu_has_dc_aliases.  It should
flush d-cache and invalidate i-cache since the TX39(H2) has separate I/D
cache.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --git a/arch/mips/mm/c-tx39.c b/arch/mips/mm/c-tx39.c
index 56c3fcdd282296b38b806d5d8404633dd0b1ab01..c3ba81dab31d496216fcdd58f662e14ee8ea5d08 100644 (file)
--- a/arch/mips/mm/c-tx39.c
+++ b/arch/mips/mm/c-tx39.c
@@ -167,15 +167,16 @@ static void tx39_flush_cache_mm(struct mm_struct *mm)
 static void tx39_flush_cache_range(struct vm_area_struct *vma,
        unsigned long start, unsigned long end)
 {
-       struct mm_struct *mm = vma->vm_mm;
+       int exec;
 
-       if (!cpu_has_dc_aliases)
+       if (!(cpu_context(smp_processor_id(), vma->vm_mm)))
                return;
 
-       if (cpu_context(smp_processor_id(), mm) != 0) {
+       exec = vma->vm_flags & VM_EXEC;
+       if (cpu_has_dc_aliases || exec)
                tx39_blast_dcache();
+       if (exec)
                tx39_blast_icache();
-       }
 }
 
 static void tx39_flush_cache_page(struct vm_area_struct *vma, unsigned long page, unsigned long pfn)