x86 setup: initialize LDTR and TR to make life easier to Intel VT

Intel VT doesn't like to engage when the protected-mode state isn't
fully initialized.  Make life easier for it by initializing LDTR (to
null) and TR (to a dummy hunk of low memory which will never actually
be touched.)

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>

diff --git a/arch/x86/boot/pm.c b/arch/x86/boot/pm.c
index 09fb342cc62e1965a4edf12fa73e19589d6b7ab0..b23cbdc7d547befb295a073d5c7ebe6bedfce344 100644 (file)
--- a/arch/x86/boot/pm.c
+++ b/arch/x86/boot/pm.c
@@ -121,6 +121,10 @@ static void setup_gdt(void)
                [GDT_ENTRY_BOOT_CS] = GDT_ENTRY(0xc09b, 0, 0xfffff),
                /* DS: data, read/write, 4 GB, base 0 */
                [GDT_ENTRY_BOOT_DS] = GDT_ENTRY(0xc093, 0, 0xfffff),
+               /* TSS: 32-bit tss, 104 bytes, base 4096 */
+               /* We only have a TSS here to keep Intel VT happy;
+                  we don't actually use it for anything. */
+               [GDT_ENTRY_BOOT_TSS] = GDT_ENTRY(0x0089, 4096, 103),
        };
        /* Xen HVM incorrectly stores a pointer to the gdt_ptr, instead
           of the gdt_ptr contents.  Thus, make it static so it will

diff --git a/arch/x86/boot/pmjump.S b/arch/x86/boot/pmjump.S
index ef0da1f2c7fde7b74dc0304457cf7c9175603f45..f7153d0d476e8beb8d38c1a8bfe3d0088968a5b0 100644 (file)
--- a/arch/x86/boot/pmjump.S
+++ b/arch/x86/boot/pmjump.S
@@ -36,6 +36,7 @@ protected_mode_jump:
        addl    %ebx, 2f
 
        movw    $__BOOT_DS, %cx
+       movw    $__BOOT_TSS, %di
 
        movl    %cr0, %edx
        orb     $1, %dl                 # Protected mode (PE) bit
@@ -63,6 +64,9 @@ in_pm32:
        # a valid stack if some debugging hack wants to use it.
        addl    %ebx, %esp
 
+       # Set up TR to make Intel VT happy
+       ltr     %di
+
        # Clear registers to allow for future extensions to the
        # 32-bit boot protocol
        xorl    %ecx, %ecx
@@ -71,6 +75,9 @@ in_pm32:
        xorl    %ebp, %ebp
        xorl    %edi, %edi
 
+       # Set up LDTR to make Intel VT happy
+       lldt    %cx
+
        jmpl    *%eax                   # Jump to the 32-bit entrypoint
 
        .size   in_pm32, .-in_pm32

diff --git a/include/asm-x86/segment.h b/include/asm-x86/segment.h
index 1ff05a9f55130af956bf800e65c30df8fa0b08a5..57c8d37238366eac1304af89e4ca7c64d9af38fa 100644 (file)
--- a/include/asm-x86/segment.h
+++ b/include/asm-x86/segment.h
@@ -9,6 +9,9 @@
 #define GDT_ENTRY_BOOT_DS      (GDT_ENTRY_BOOT_CS + 1)
 #define __BOOT_DS              (GDT_ENTRY_BOOT_DS * 8)
 
+#define GDT_ENTRY_BOOT_TSS     (GDT_ENTRY_BOOT_CS + 2)
+#define __BOOT_TSS             (GDT_ENTRY_BOOT_TSS * 8)
+
 #ifdef CONFIG_X86_32
 /*
  * The layout of the per-CPU GDT under Linux: