spin_lock_irqsave(&list->lock, flags);
while (instr->use) {
spin_unlock_irqrestore(&list->lock, flags);
- set_current_state(TASK_INTERRUPTIBLE);
- schedule_timeout(1);
+ schedule_timeout_interruptible(1);
spin_lock_irqsave(&list->lock, flags);
}
spin_unlock_irqrestore(&list->lock, flags);
while (flist) {
instr = flist;
flist = instr->next;
- while (instr->use) {
- set_current_state(TASK_INTERRUPTIBLE);
- schedule_timeout(1);
- }
+ while (instr->use)
+ schedule_timeout_interruptible(1);
if (snd_seq_instr_free(instr, atomic)<0)
snd_printk(KERN_WARNING "instrument free problem\n");
instr = next;
instr->ops->notify(instr->ops->private_data, instr, SNDRV_SEQ_INSTR_NOTIFY_REMOVE);
while (instr->use) {
spin_unlock_irqrestore(&list->lock, flags);
- set_current_state(TASK_INTERRUPTIBLE);
- schedule_timeout(1);
+ schedule_timeout_interruptible(1);
spin_lock_irqsave(&list->lock, flags);
}
spin_unlock_irqrestore(&list->lock, flags);
snd_printk(KERN_WARNING "seq_lock: timeout [%d left] in %s:%d\n", atomic_read(lockp), file, line);
break;
}
- set_current_state(TASK_UNINTERRUPTIBLE);
- schedule_timeout(1);
+ schedule_timeout_uninterruptible(1);
max_count--;
}
}
snd_printk(KERN_WARNING "snd_seq_pool_done timeout: %d cells remain\n", atomic_read(&pool->counter));
break;
}
- set_current_state(TASK_UNINTERRUPTIBLE);
- schedule_timeout(1);
+ schedule_timeout_uninterruptible(1);
max_count--;
}
snd_i2c_unlock(cs8427->bus);
if (!(data & CS8427_UNLOCK))
break;
- set_current_state(TASK_UNINTERRUPTIBLE);
- schedule_timeout(1);
+ schedule_timeout_uninterruptible(1);
}
snd_i2c_lock(cs8427->bus);
chip->regmap[CS8427_REG_CLOCKSOURCE] &= ~CS8427_RXDMASK;
snd_printk(KERN_ERR "mce_down - auto calibration time out (2)\n");
return;
}
- set_current_state(TASK_INTERRUPTIBLE);
- time = schedule_timeout(time);
+ time = schedule_timeout_interruptible(time);
spin_lock_irqsave(&chip->reg_lock, flags);
}
#if 0
snd_printk(KERN_ERR "mce_down - auto calibration time out (3)\n");
return;
}
- set_current_state(TASK_INTERRUPTIBLE);
- time = schedule_timeout(time);
+ time = schedule_timeout_interruptible(time);
spin_lock_irqsave(&chip->reg_lock, flags);
}
spin_unlock_irqrestore(&chip->reg_lock, flags);
}
}
if (count > 0 && !in_interrupt()) {
- set_current_state(TASK_INTERRUPTIBLE);
- schedule_timeout(1);
+ schedule_timeout_interruptible(1);
if (signal_pending(current))
return -EAGAIN;
}
snd_emu8000_read_wait(emu8000_t *emu)
{
while ((EMU8000_SMALR_READ(emu) & 0x80000000) != 0) {
- set_current_state(TASK_INTERRUPTIBLE);
- schedule_timeout(1);
+ schedule_timeout_interruptible(1);
if (signal_pending(current))
break;
}
snd_emu8000_write_wait(emu8000_t *emu)
{
while ((EMU8000_SMALW_READ(emu) & 0x80000000) != 0) {
- set_current_state(TASK_INTERRUPTIBLE);
- schedule_timeout(1);
+ schedule_timeout_interruptible(1);
if (signal_pending(current))
break;
}
for (i = 0; i < 10000; i++) {
if ((EMU8000_SMALW_READ(emu) & 0x80000000) == 0)
break;
- set_current_state(TASK_INTERRUPTIBLE);
- schedule_timeout(1);
+ schedule_timeout_interruptible(1);
if (signal_pending(current))
break;
}
snd_emu8000_write_wait(emu8000_t *emu)
{
while ((EMU8000_SMALW_READ(emu) & 0x80000000) != 0) {
- set_current_state(TASK_INTERRUPTIBLE);
- schedule_timeout(1);
+ schedule_timeout_interruptible(1);
if (signal_pending(current))
break;
}
{
while ((EMU8000_SMALW_READ(emu) & 0x80000000) != 0) {
if (can_schedule) {
- set_current_state(TASK_INTERRUPTIBLE);
- schedule_timeout(1);
+ schedule_timeout_interruptible(1);
if (signal_pending(current))
break;
}
free_dma(sscape->chip->dma1);
}
-/*
- * Put this process into an idle wait-state for a certain number
- * of "jiffies". The process can almost certainly be rescheduled
- * while we're waiting, and so we must NOT be holding any spinlocks
- * when we call this function. If we are then we risk DEADLOCK in
- * SMP (Ha!) or pre-emptible kernels.
- */
-static inline void sleep(long jiffs, int state)
-{
- set_current_state(state);
- schedule_timeout(jiffs);
-}
-
/*
* Tell the SoundScape to begin a DMA tranfer using the given channel.
* All locking issues are left to the caller.
unsigned long flags;
unsigned char x;
- sleep(1, TASK_INTERRUPTIBLE);
+ schedule_timeout_interruptible(1);
spin_lock_irqsave(&s->lock, flags);
x = inb(HOST_DATA_IO(s->io_base));
unsigned long flags;
unsigned char x;
- sleep(1, TASK_INTERRUPTIBLE);
+ schedule_timeout_interruptible(1);
spin_lock_irqsave(&s->lock, flags);
x = inb(HOST_DATA_IO(s->io_base));
wavefront_sleep (int limit)
{
- set_current_state(TASK_INTERRUPTIBLE);
- schedule_timeout(limit);
+ schedule_timeout_interruptible(limit);
return signal_pending(current);
}
outb (val,port);
spin_unlock_irq(&dev->irq_lock);
while (1) {
- set_current_state(TASK_INTERRUPTIBLE);
- if ((timeout = schedule_timeout(timeout)) == 0)
+ if ((timeout = schedule_timeout_interruptible(timeout)) == 0)
return;
if (dev->irq_ok)
return;
if ((snd_ac97_read(ac97, AC97_REC_GAIN) & 0x7fff) == 0x0a05)
return 0;
}
- set_current_state(TASK_UNINTERRUPTIBLE);
- schedule_timeout(1);
+ schedule_timeout_uninterruptible(1);
} while (time_after_eq(end_time, jiffies));
return -ENODEV;
}
do {
if ((snd_ac97_read(ac97, AC97_POWERDOWN) & 0x0f) == 0x0f)
goto __ready_ok;
- set_current_state(TASK_UNINTERRUPTIBLE);
- schedule_timeout(1);
+ schedule_timeout_uninterruptible(1);
} while (time_after_eq(end_time, jiffies));
snd_printk(KERN_WARNING "AC'97 %d analog subsections not ready\n", ac97->num);
}
do {
if ((snd_ac97_read(ac97, AC97_EXTENDED_MSTATUS) & tmp) == tmp)
goto __ready_ok;
- set_current_state(TASK_UNINTERRUPTIBLE);
- schedule_timeout(1);
+ schedule_timeout_uninterruptible(1);
} while (time_after_eq(end_time, jiffies));
snd_printk(KERN_WARNING "MC'97 %d converters and GPIO not ready (0x%x)\n", ac97->num, snd_ac97_read(ac97, AC97_EXTENDED_MSTATUS));
}
do {
if (snd_ac97_read(ac97, AC97_MASTER) == 0x8101)
break;
- set_current_state(TASK_UNINTERRUPTIBLE);
- schedule_timeout(1);
+ schedule_timeout_uninterruptible(1);
} while (time_after_eq(end_time, jiffies));
/* FIXME: extra delay */
ac97->bus->ops->write(ac97, AC97_MASTER, 0x8000);
unsigned short val = snd_ac97_read(ac97, AC97_EXTENDED_MID);
if (val != 0xffff && (val & 1) != 0)
break;
- set_current_state(TASK_UNINTERRUPTIBLE);
- schedule_timeout(1);
+ schedule_timeout_uninterruptible(1);
} while (time_after_eq(end_time, jiffies));
}
__reset_ready:
res = snd_ali_5451_peek(codec,port);
if (! (res & 0x8000))
return 0;
- if (sched) {
- set_current_state(TASK_UNINTERRUPTIBLE);
- schedule_timeout(1);
- }
+ if (sched)
+ schedule_timeout_uninterruptible(1);
} while (time_after_eq(end_time, jiffies));
snd_ali_5451_poke(codec, port, res & ~0x8000);
snd_printdd("ali_codec_ready: codec is not ready.\n ");
dwChk2 = snd_ali_5451_peek(codec, ALI_STIMER);
if (dwChk2 != dwChk1)
return 0;
- if (sched) {
- set_current_state(TASK_UNINTERRUPTIBLE);
- schedule_timeout(1);
- }
+ if (sched)
+ schedule_timeout_uninterruptible(1);
} while (time_after_eq(end_time, jiffies));
snd_printk(KERN_ERR "ali_stimer_read: stimer is not ready.\n");
return -EIO;
/* delay for one tick */
#define do_delay() do { \
- set_current_state(TASK_UNINTERRUPTIBLE); \
- schedule_timeout(1); \
+ schedule_timeout_uninterruptible(1); \
} while (0)
/* delay for one tick */
#define do_delay() do { \
- set_current_state(TASK_UNINTERRUPTIBLE); \
- schedule_timeout(1); \
+ schedule_timeout_uninterruptible(1); \
} while (0)
delay = 1;
end_time = jiffies + delay;
do {
- set_current_state(TASK_UNINTERRUPTIBLE);
- schedule_timeout(1);
+ schedule_timeout_uninterruptible(1);
} while (time_after_eq(end_time, jiffies));
} else {
udelay(delay);
static inline void snd_cs4281_delay_long(void)
{
- set_current_state(TASK_UNINTERRUPTIBLE);
- schedule_timeout(1);
+ schedule_timeout_uninterruptible(1);
}
static inline void snd_cs4281_pokeBA0(cs4281_t *chip, unsigned long offset, unsigned int val)
outw(ES_1370_CODEC_WRITE(reg, val), ES_REG(ensoniq, 1370_CODEC));
return;
}
- set_current_state(TASK_UNINTERRUPTIBLE);
- schedule_timeout(1);
+ schedule_timeout_uninterruptible(1);
} while (time_after(end_time, jiffies));
snd_printk(KERN_ERR "codec write timeout, status = 0x%x\n", inl(ES_REG(ensoniq, STATUS)));
}
do {
if ((inw(FM801_REG(chip, AC97_CMD)) & (3<<8)) == (1<<8))
goto __ac97_secondary;
- set_current_state(TASK_UNINTERRUPTIBLE);
- schedule_timeout(1);
+ schedule_timeout_uninterruptible(1);
} while (time_after(timeout, jiffies));
snd_printk(KERN_ERR "Primary AC'97 codec not found\n");
snd_fm801_free(chip);
goto __ac97_ok;
}
}
- set_current_state(TASK_UNINTERRUPTIBLE);
- schedule_timeout(1);
+ schedule_timeout_uninterruptible(1);
} while (time_after(timeout, jiffies));
}
do {
if ((inw(FM801_REG(chip, AC97_CMD)) & (3<<8)) == (1<<8))
goto __ac97_ok;
- set_current_state(TASK_UNINTERRUPTIBLE);
- schedule_timeout(1);
+ schedule_timeout_uninterruptible(1);
} while (time_after(timeout, jiffies));
snd_printk(KERN_ERR "Primary AC'97 codec not responding\n");
snd_fm801_free(chip);
/* initialize WM8776 codec */
for (i = 0; i < ARRAY_SIZE(wm_inits); i += 2)
wm_put(ice, wm_inits[i], wm_inits[i+1]);
- set_current_state(TASK_UNINTERRUPTIBLE);
- schedule_timeout(1);
+ schedule_timeout_uninterruptible(1);
for (i = 0; i < ARRAY_SIZE(wm_inits2); i += 2)
wm_put(ice, wm_inits2[i], wm_inits2[i+1]);
}
#define do_delay(chip) do {\
- set_current_state(TASK_UNINTERRUPTIBLE);\
- schedule_timeout(1);\
+ schedule_timeout_uninterruptible(1);\
} while (0)
static int snd_intel8x0_ich_chip_init(intel8x0_t *chip, int probing)
*/
#define do_delay(chip) do {\
- set_current_state(TASK_UNINTERRUPTIBLE);\
- schedule_timeout(1);\
+ schedule_timeout_uninterruptible(1);\
} while (0)
static int snd_intel8x0m_ich_chip_init(intel8x0_t *chip, int probing)
outw(0, io + GPIO_DATA);
outw(dir | GPO_PRIMARY_AC97, io + GPIO_DIRECTION);
- set_current_state(TASK_UNINTERRUPTIBLE);
- schedule_timeout((delay1 * HZ) / 1000);
+ schedule_timeout_uninterruptible(msecs_to_jiffies(delay1));
outw(GPO_PRIMARY_AC97, io + GPIO_DATA);
udelay(5);
outw(IO_SRAM_ENABLE | SERIAL_AC_LINK_ENABLE, io + RING_BUS_CTRL_A);
outw(~0, io + GPIO_MASK);
- set_current_state(TASK_UNINTERRUPTIBLE);
- schedule_timeout((delay2 * HZ) / 1000);
+ schedule_timeout_uninterruptible(msecs_to_jiffies(delay2));
if (! snd_m3_try_read_vendor(chip))
break;
/* seems ac97 PCM needs initialization.. hack hack.. */
snd_ac97_write(chip->ac97, AC97_PCM, 0x8000 | (15 << 8) | 15);
- set_current_state(TASK_UNINTERRUPTIBLE);
- schedule_timeout(HZ / 10);
+ schedule_timeout_uninterruptible(msecs_to_jiffies(100));
snd_ac97_write(chip->ac97, AC97_PCM, 0);
memset(&id, 0, sizeof(id));
snd_printk(KERN_ERR "mixart: cannot process nonblock events!\n");
return -EBUSY;
}
- set_current_state(TASK_UNINTERRUPTIBLE);
- schedule_timeout(1);
+ schedule_timeout_uninterruptible(1);
}
return 0;
}
*/
static inline void do_delay(trident_t *chip)
{
- set_current_state(TASK_UNINTERRUPTIBLE);
- schedule_timeout(1);
+ schedule_timeout_uninterruptible(1);
}
/*
pci_read_config_byte(chip->pci, VIA_ACLINK_STAT, &pval);
if (pval & VIA_ACLINK_C00_READY) /* primary codec ready */
break;
- set_current_state(TASK_UNINTERRUPTIBLE);
- schedule_timeout(1);
+ schedule_timeout_uninterruptible(1);
} while (time_before(jiffies, end_time));
if ((val = snd_via82xx_codec_xread(chip)) & VIA_REG_AC97_BUSY)
chip->ac97_secondary = 1;
goto __ac97_ok2;
}
- set_current_state(TASK_INTERRUPTIBLE);
- schedule_timeout(1);
+ schedule_timeout_interruptible(1);
} while (time_before(jiffies, end_time));
/* This is ok, the most of motherboards have only one codec */
pci_read_config_byte(chip->pci, VIA_ACLINK_STAT, &pval);
if (pval & VIA_ACLINK_C00_READY) /* primary codec ready */
break;
- set_current_state(TASK_UNINTERRUPTIBLE);
- schedule_timeout(1);
+ schedule_timeout_uninterruptible(1);
} while (time_before(jiffies, end_time));
if ((val = snd_via82xx_codec_xread(chip)) & VIA_REG_AC97_BUSY)
chip->ac97_secondary = 1;
goto __ac97_ok2;
}
- set_current_state(TASK_INTERRUPTIBLE);
- schedule_timeout(1);
+ schedule_timeout_interruptible(1);
} while (time_before(jiffies, end_time));
/* This is ok, the most of motherboards have only one codec */
if ((snd_ymfpci_readw(chip, reg) & 0x8000) == 0)
return 0;
set_current_state(TASK_UNINTERRUPTIBLE);
- schedule_timeout(1);
+ schedule_timeout_uninterruptible(1);
} while (time_before(jiffies, end_time));
snd_printk(KERN_ERR "codec_ready: codec %i is not ready [0x%x]\n", secondary, snd_ymfpci_readw(chip, reg));
return -EBUSY;
init_waitqueue_entry(&wait, current);
add_wait_queue(&chip->interrupt_sleep, &wait);
atomic_inc(&chip->interrupt_sleep_count);
- set_current_state(TASK_UNINTERRUPTIBLE);
- schedule_timeout(HZ/20);
+ schedule_timeout_uninterruptible(msecs_to_jiffies(50));
remove_wait_queue(&chip->interrupt_sleep, &wait);
}
}
}
if (! alive)
break;
- set_current_state(TASK_UNINTERRUPTIBLE);
- schedule_timeout(1);
+ schedule_timeout_uninterruptible(1);
} while (time_before(jiffies, end_time));
if (alive)
snd_printk(KERN_ERR "timeout: still %d active urbs..\n", alive);