return -1;
}
- for (i = 0; i < 3; i++) {
- if (i2c_smbus_write_byte_data(client, (reg << 1) |
- (val >> 8), val & 0xff) == 0) {
+ for (i = 0; i < 3; i++)
+ if (i2c_smbus_write_byte_data(client,
+ (reg << 1) | (val >> 8), val & 0xff) == 0)
return 0;
- }
- }
v4l_err(client, "I2C: cannot write %03x to register R%d\n", val, reg);
return -1;
}
-static int wm8775_command(struct i2c_client *client, unsigned int cmd, void *arg)
+static int wm8775_command(struct i2c_client *client, unsigned cmd, void *arg)
{
struct wm8775_state *state = i2c_get_clientdata(client);
struct v4l2_routing *route = arg;
break;
case VIDIOC_G_CHIP_IDENT:
- return v4l2_chip_ident_i2c_client(client, arg, V4L2_IDENT_WM8775, 0);
+ return v4l2_chip_ident_i2c_client(client,
+ arg, V4L2_IDENT_WM8775, 0);
case VIDIOC_LOG_STATUS:
v4l_info(client, "Input: %d%s\n", state->input,
if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
return -EIO;
- v4l_info(client, "chip found @ 0x%x (%s)\n", client->addr << 1, client->adapter->name);
+ v4l_info(client, "chip found @ 0x%x (%s)\n",
+ client->addr << 1, client->adapter->name);
state = kmalloc(sizeof(struct wm8775_state), GFP_KERNEL);
- if (state == NULL) {
+ if (state == NULL)
return -ENOMEM;
- }
state->input = 2;
state->muted = 0;
i2c_set_clientdata(client, state);
- /* initialize wm8775 */
- wm8775_write(client, R23, 0x000); /* RESET */
- wm8775_write(client, R7, 0x000); /* Disable zero cross detect timeout */
- wm8775_write(client, R11, 0x021); /* Left justified, 24-bit mode */
- wm8775_write(client, R12, 0x102); /* Master mode, clock ratio 256fs */
- wm8775_write(client, R13, 0x000); /* Powered up */
- wm8775_write(client, R14, 0x1d4); /* ADC gain +2.5dB, enable zero cross */
- wm8775_write(client, R15, 0x1d4); /* ADC gain +2.5dB, enable zero cross */
- wm8775_write(client, R16, 0x1bf); /* ALC Stereo, ALC target level -1dB FS */
- /* max gain +8dB */
- wm8775_write(client, R17, 0x185); /* Enable gain control, use zero cross */
- /* detection, ALC hold time 42.6 ms */
- wm8775_write(client, R18, 0x0a2); /* ALC gain ramp up delay 34 s, */
- /* ALC gain ramp down delay 33 ms */
- wm8775_write(client, R19, 0x005); /* Enable noise gate, threshold -72dBfs */
- wm8775_write(client, R20, 0x07a); /* Transient window 4ms, lower PGA gain */
- /* limit -1dB */
- wm8775_write(client, R21, 0x102); /* LRBOTH = 1, use input 2. */
+ /* Initialize wm8775 */
+
+ /* RESET */
+ wm8775_write(client, R23, 0x000);
+ /* Disable zero cross detect timeout */
+ wm8775_write(client, R7, 0x000);
+ /* Left justified, 24-bit mode */
+ wm8775_write(client, R11, 0x021);
+ /* Master mode, clock ratio 256fs */
+ wm8775_write(client, R12, 0x102);
+ /* Powered up */
+ wm8775_write(client, R13, 0x000);
+ /* ADC gain +2.5dB, enable zero cross */
+ wm8775_write(client, R14, 0x1d4);
+ /* ADC gain +2.5dB, enable zero cross */
+ wm8775_write(client, R15, 0x1d4);
+ /* ALC Stereo, ALC target level -1dB FS max gain +8dB */
+ wm8775_write(client, R16, 0x1bf);
+ /* Enable gain control, use zero cross detection,
+ ALC hold time 42.6 ms */
+ wm8775_write(client, R17, 0x185);
+ /* ALC gain ramp up delay 34 s, ALC gain ramp down delay 33 ms */
+ wm8775_write(client, R18, 0x0a2);
+ /* Enable noise gate, threshold -72dBfs */
+ wm8775_write(client, R19, 0x005);
+ /* Transient window 4ms, lower PGA gain limit -1dB */
+ wm8775_write(client, R20, 0x07a);
+ /* LRBOTH = 1, use input 2. */
+ wm8775_write(client, R21, 0x102);
return 0;
}