const struct firmware *fw_entry = NULL;
__le32 reg;
int err;
- u32 *data;
+ __le32 *data;
u32 remains, left, device_addr;
- P54P_WRITE(int_enable, 0);
+ P54P_WRITE(int_enable, cpu_to_le32(0));
P54P_READ(int_enable);
udelay(10);
p54_parse_firmware(dev, fw_entry);
- data = (u32 *) fw_entry->data;
+ data = (__le32 *) fw_entry->data;
remains = fw_entry->size;
device_addr = ISL38XX_DEV_FIRMWARE_ADDR;
while (remains) {
}
memset(ring_control, 0, sizeof(*ring_control));
- P54P_WRITE(ring_control_base, priv->ring_control_dma);
+ P54P_WRITE(ring_control_base, cpu_to_le32(priv->ring_control_dma));
P54P_READ(ring_control_base);
udelay(10);
out:
kfree(eeprom);
- P54P_WRITE(int_enable, 0);
+ P54P_WRITE(int_enable, cpu_to_le32(0));
P54P_READ(int_enable);
udelay(10);
free_irq(priv->pdev->irq, priv);
spin_lock(&priv->lock);
reg = P54P_READ(int_ident);
- if (unlikely(reg == 0xFFFFFFFF)) {
+ if (unlikely(reg == cpu_to_le32(0xFFFFFFFF))) {
spin_unlock(&priv->lock);
return IRQ_HANDLED;
}
p54p_upload_firmware(dev);
- P54P_WRITE(ring_control_base, priv->ring_control_dma);
+ P54P_WRITE(ring_control_base, cpu_to_le32(priv->ring_control_dma));
P54P_READ(ring_control_base);
wmb();
udelay(10);
unsigned int i;
struct p54p_desc *desc;
- P54P_WRITE(int_enable, 0);
+ P54P_WRITE(int_enable, cpu_to_le32(0));
P54P_READ(int_enable);
udelay(10);
struct p54p_desc tx_mgmt[4];
} __attribute__ ((packed));
-#define P54P_READ(r) __raw_readl(&priv->map->r)
-#define P54P_WRITE(r, val) __raw_writel((__force u32)(val), &priv->map->r)
+#define P54P_READ(r) (__force __le32)__raw_readl(&priv->map->r)
+#define P54P_WRITE(r, val) __raw_writel((__force u32)(__le32)(val), &priv->map->r)
struct p54p_priv {
struct p54_common common;