[PATCH] ppc32: fix PQ2 PCI DMA interrupt handling

The bit position in the status register corresponding to the
PCI DMA interrupt was incorrect.  Additionally, we did not
have a define for the PCI DMA interrupt.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>

diff --git a/arch/ppc/syslib/cpm2_pic.c b/arch/ppc/syslib/cpm2_pic.c
index c867be6981cb34f615755c888d6212737eb53cbf..29d95d415ceb7f70accd8c8381f9666f748be467 100644 (file)
--- a/arch/ppc/syslib/cpm2_pic.c
+++ b/arch/ppc/syslib/cpm2_pic.c
@@ -37,7 +37,7 @@ static        u_char  irq_to_siureg[] = {
 static u_char  irq_to_siubit[] = {
         0, 15, 14, 13, 12, 11, 10,  9,
         8,  7,  6,  5,  4,  3,  2,  1,
-        2,  1, 15, 14, 13, 12, 11, 10,
+        2,  1,  0, 14, 13, 12, 11, 10,
         9,  8,  7,  6,  5,  4,  3,  0,
        31, 30, 29, 28, 27, 26, 25, 24,
        23, 22, 21, 20, 19, 18, 17, 16,

diff --git a/include/asm-powerpc/irq.h b/include/asm-powerpc/irq.h
index c9fbcede0ef9faf5773db4d69663e8b7c3661d52..8eb7e857ec4cd167176c78b644ee046a6fbe09b5 100644 (file)
--- a/include/asm-powerpc/irq.h
+++ b/include/asm-powerpc/irq.h
@@ -389,6 +389,7 @@ extern u64 ppc64_interrupt_controller;
 #define        SIU_INT_TIMER4          ((uint)0x0f + CPM_IRQ_OFFSET)
 #define        SIU_INT_TMCNT           ((uint)0x10 + CPM_IRQ_OFFSET)
 #define        SIU_INT_PIT             ((uint)0x11 + CPM_IRQ_OFFSET)
+#define        SIU_INT_PCI             ((uint)0x12 + CPM_IRQ_OFFSET)
 #define        SIU_INT_IRQ1            ((uint)0x13 + CPM_IRQ_OFFSET)
 #define        SIU_INT_IRQ2            ((uint)0x14 + CPM_IRQ_OFFSET)
 #define        SIU_INT_IRQ3            ((uint)0x15 + CPM_IRQ_OFFSET)