Lemote Fulong mini-PC board based on the Chinese Loongson-2E CPU and
an FPGA northbridge
-config MIPS_ATLAS
- bool "MIPS Atlas board"
- select BOOT_ELF32
- select BOOT_RAW
- select CEVT_R4K
- select CSRC_R4K
- select DMA_NONCOHERENT
- select SYS_HAS_EARLY_PRINTK
- select IRQ_CPU
- select HW_HAS_PCI
- select MIPS_BOARDS_GEN
- select MIPS_BONITO64
- select PCI_GT64XXX_PCI0
- select MIPS_MSC
- select RM7000_CPU_SCACHE
- select SWAP_IO_SPACE
- select SYS_HAS_CPU_MIPS32_R1
- select SYS_HAS_CPU_MIPS32_R2
- select SYS_HAS_CPU_MIPS64_R1
- select SYS_HAS_CPU_NEVADA
- select SYS_HAS_CPU_RM7000
- select SYS_SUPPORTS_32BIT_KERNEL
- select SYS_SUPPORTS_64BIT_KERNEL
- select SYS_SUPPORTS_BIG_ENDIAN
- select SYS_SUPPORTS_LITTLE_ENDIAN
- select SYS_SUPPORTS_MULTITHREADING if EXPERIMENTAL
- select SYS_SUPPORTS_SMARTMIPS
- select GENERIC_HARDIRQS_NO__DO_IRQ
- help
- This enables support for the MIPS Technologies Atlas evaluation
- board.
-
config MIPS_MALTA
bool "MIPS Malta board"
select ARCH_MAY_HAVE_PC_FDC
This enables support for the MIPS Technologies Malta evaluation
board.
-config MIPS_SEAD
- bool "MIPS SEAD board"
- select CEVT_R4K
- select CSRC_R4K
- select IRQ_CPU
- select DMA_NONCOHERENT
- select SYS_HAS_EARLY_PRINTK
- select MIPS_BOARDS_GEN
- select SYS_HAS_CPU_MIPS32_R1
- select SYS_HAS_CPU_MIPS32_R2
- select SYS_HAS_CPU_MIPS64_R1
- select SYS_SUPPORTS_32BIT_KERNEL
- select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
- select SYS_SUPPORTS_BIG_ENDIAN
- select SYS_SUPPORTS_LITTLE_ENDIAN
- select SYS_SUPPORTS_SMARTMIPS
- help
- This enables support for the MIPS Technologies SEAD evaluation
- board.
-
config MIPS_SIM
bool 'MIPS simulator (MIPSsim)'
select CEVT_R4K
select SGI_HAS_DS1286
select SGI_HAS_I8042
select SGI_HAS_INDYDOG
+ select SGI_HAS_HAL2
+ select SGI_HAS_HAL2
select SGI_HAS_SEEQ
select SGI_HAS_WD93
select SGI_HAS_ZILOG
Technology and now in turn merged with Fujitsu. Say Y here to
support this machine type.
-config TOSHIBA_JMR3927
- bool "Toshiba JMR-TX3927 board"
- select CEVT_TXX9
- select DMA_NONCOHERENT
- select HW_HAS_PCI
- select MIPS_TX3927
- select IRQ_TXX9
- select SWAP_IO_SPACE
- select SYS_HAS_CPU_TX39XX
- select SYS_SUPPORTS_32BIT_KERNEL
- select SYS_SUPPORTS_LITTLE_ENDIAN
- select SYS_SUPPORTS_BIG_ENDIAN
- select GENERIC_HARDIRQS_NO__DO_IRQ
- select GPIO_TXX9
+config MACH_TX39XX
+ bool "Toshiba TX39 series based machines"
-config TOSHIBA_RBTX4927
- bool "Toshiba RBTX49[23]7 board"
- select CEVT_R4K
- select CSRC_R4K
- select CEVT_TXX9
- select DMA_NONCOHERENT
- select HAS_TXX9_SERIAL
- select HW_HAS_PCI
- select IRQ_CPU
- select IRQ_TXX9
- select I8259 if TOSHIBA_FPCIB0
- select SWAP_IO_SPACE
- select SYS_HAS_CPU_TX49XX
- select SYS_SUPPORTS_32BIT_KERNEL
- select SYS_SUPPORTS_64BIT_KERNEL
- select SYS_SUPPORTS_LITTLE_ENDIAN
- select SYS_SUPPORTS_BIG_ENDIAN
- select SYS_SUPPORTS_KGDB
- select GENERIC_HARDIRQS_NO__DO_IRQ
- help
- This Toshiba board is based on the TX4927 processor. Say Y here to
- support this machine type
-
-config TOSHIBA_RBTX4938
- bool "Toshiba RBTX4938 board"
- select CEVT_R4K
- select CSRC_R4K
- select CEVT_TXX9
- select DMA_NONCOHERENT
- select HAS_TXX9_SERIAL
- select HW_HAS_PCI
- select IRQ_CPU
- select IRQ_TXX9
- select SWAP_IO_SPACE
- select SYS_HAS_CPU_TX49XX
- select SYS_SUPPORTS_32BIT_KERNEL
- select SYS_SUPPORTS_LITTLE_ENDIAN
- select SYS_SUPPORTS_BIG_ENDIAN
- select SYS_SUPPORTS_KGDB
- select GENERIC_HARDIRQS_NO__DO_IRQ
- select GPIO_TXX9
- help
- This Toshiba board is based on the TX4938 processor. Say Y here to
- support this machine type
+config MACH_TX49XX
+ bool "Toshiba TX49 series based machines"
config WR_PPMC
bool "Wind River PPMC board"
source "arch/mips/pmc-sierra/Kconfig"
source "arch/mips/sgi-ip27/Kconfig"
source "arch/mips/sibyte/Kconfig"
-source "arch/mips/tx4927/Kconfig"
-source "arch/mips/tx4938/Kconfig"
+source "arch/mips/txx9/Kconfig"
source "arch/mips/vr41xx/Kconfig"
endmenu
config NO_EXCEPT_FILL
bool
-config MIPS_TX3927
- bool
- select HAS_TXX9_SERIAL
-
config MIPS_RM9122
bool
select SERIAL_RM9000
config SGI_HAS_INDYDOG
bool
+config SGI_HAS_HAL2
+ bool
+
config SGI_HAS_SEEQ
bool
config TRAD_SIGNALS
bool
-config BINFMT_IRIX
- bool "Include IRIX binary compatibility"
- depends on CPU_BIG_ENDIAN && 32BIT && BROKEN
-
config MIPS32_COMPAT
bool "Kernel support for Linux/MIPS 32-bit binary compatibility"
depends on 64BIT
KBUILD_DEFCONFIG := ip22_defconfig
-cflags-y :=
+cflags-y := -ffunction-sections
#
# Select the object file format to substitute into the linker script.
load-$(CONFIG_LEMOTE_FULONG) +=0xffffffff80100000
cflags-$(CONFIG_LEMOTE_FULONG) += -Iinclude/asm-mips/mach-lemote
-#
-# For all MIPS, Inc. eval boards
-#
-core-$(CONFIG_MIPS_BOARDS_GEN) += arch/mips/mips-boards/generic/
-
-#
-# MIPS Atlas board
-#
-core-$(CONFIG_MIPS_ATLAS) += arch/mips/mips-boards/atlas/
-cflags-$(CONFIG_MIPS_ATLAS) += -Iinclude/asm-mips/mach-atlas
-cflags-$(CONFIG_MIPS_ATLAS) += -Iinclude/asm-mips/mach-mips
-load-$(CONFIG_MIPS_ATLAS) += 0xffffffff80100000
-all-$(CONFIG_MIPS_ATLAS) := vmlinux.bin
-
#
# MIPS Malta board
#
-core-$(CONFIG_MIPS_MALTA) += arch/mips/mips-boards/malta/
-cflags-$(CONFIG_MIPS_MALTA) += -Iinclude/asm-mips/mach-mips
+core-$(CONFIG_MIPS_MALTA) += arch/mips/mti-malta/
+cflags-$(CONFIG_MIPS_MALTA) += -Iinclude/asm-mips/mach-malta
load-$(CONFIG_MIPS_MALTA) += 0xffffffff80100000
all-$(CONFIG_MIPS_MALTA) := vmlinux.bin
-#
-# MIPS SEAD board
-#
-core-$(CONFIG_MIPS_SEAD) += arch/mips/mips-boards/sead/
-cflags-$(CONFIG_MIPS_SEAD) += -Iinclude/asm-mips/mach-mips
-load-$(CONFIG_MIPS_SEAD) += 0xffffffff80100000
-all-$(CONFIG_MIPS_SEAD) := vmlinux.srec
-
#
# MIPS SIM
#
core-$(CONFIG_MACH_VR41XX) += arch/mips/vr41xx/common/
cflags-$(CONFIG_MACH_VR41XX) += -Iinclude/asm-mips/mach-vr41xx
-#
-# NEC VR4133
-#
-core-$(CONFIG_NEC_CMBVR4133) += arch/mips/vr41xx/nec-cmbvr4133/
-load-$(CONFIG_NEC_CMBVR4133) += 0xffffffff80100000
-
#
# ZAO Networks Capcella (VR4131)
#
endif
all-$(CONFIG_SNI_RM) := vmlinux.ecoff
+#
+# Common TXx9
+#
+core-$(CONFIG_MACH_TX39XX) += arch/mips/txx9/generic/
+cflags-$(CONFIG_MACH_TX39XX) += -Iinclude/asm-mips/mach-tx39xx
+load-$(CONFIG_MACH_TX39XX) += 0xffffffff80050000
+core-$(CONFIG_MACH_TX49XX) += arch/mips/txx9/generic/
+cflags-$(CONFIG_MACH_TX49XX) += -Iinclude/asm-mips/mach-tx49xx
+load-$(CONFIG_MACH_TX49XX) += 0xffffffff80100000
+
#
# Toshiba JMR-TX3927 board
#
-core-$(CONFIG_TOSHIBA_JMR3927) += arch/mips/jmr3927/rbhma3100/ \
- arch/mips/jmr3927/common/
-cflags-$(CONFIG_TOSHIBA_JMR3927) += -Iinclude/asm-mips/mach-jmr3927
-load-$(CONFIG_TOSHIBA_JMR3927) += 0xffffffff80050000
+core-$(CONFIG_TOSHIBA_JMR3927) += arch/mips/txx9/jmr3927/
#
# Toshiba RBTX4927 board or
# Toshiba RBTX4937 board
#
-core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/tx4927/toshiba_rbtx4927/
-core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/tx4927/common/
-cflags-$(CONFIG_TOSHIBA_RBTX4927) += -Iinclude/asm-mips/mach-tx49xx
-load-$(CONFIG_TOSHIBA_RBTX4927) += 0xffffffff80020000
+core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/txx9/rbtx4927/
#
# Toshiba RBTX4938 board
#
-core-$(CONFIG_TOSHIBA_RBTX4938) += arch/mips/tx4938/toshiba_rbtx4938/
-core-$(CONFIG_TOSHIBA_RBTX4938) += arch/mips/tx4938/common/
-cflags-$(CONFIG_TOSHIBA_RBTX4938) += -Iinclude/asm-mips/mach-tx49xx
-load-$(CONFIG_TOSHIBA_RBTX4938) += 0xffffffff80100000
+core-$(CONFIG_TOSHIBA_RBTX4938) += arch/mips/txx9/rbtx4938/
cflags-y += -Iinclude/asm-mips/mach-generic
drivers-$(CONFIG_PCI) += arch/mips/pci/
* warranty of any kind, whether express or implied.
*/
+#include <linux/dma-mapping.h>
#include <linux/platform_device.h>
#include <linux/serial_8250.h>
#include <linux/init.h>
};
/* The dmamask must be set for OHCI to work */
-static u64 ohci_dmamask = ~(u32)0;
+static u64 ohci_dmamask = DMA_32BIT_MASK;
static struct platform_device au1xxx_usb_ohci_device = {
.name = "au1xxx-ohci",
.id = 0,
.dev = {
.dma_mask = &ohci_dmamask,
- .coherent_dma_mask = 0xffffffff,
+ .coherent_dma_mask = DMA_32BIT_MASK,
},
.num_resources = ARRAY_SIZE(au1xxx_usb_ohci_resources),
.resource = au1xxx_usb_ohci_resources,
}
};
-static u64 au1100_lcd_dmamask = ~(u32)0;
+static u64 au1100_lcd_dmamask = DMA_32BIT_MASK;
static struct platform_device au1100_lcd_device = {
.name = "au1100-lcd",
.id = 0,
.dev = {
.dma_mask = &au1100_lcd_dmamask,
- .coherent_dma_mask = 0xffffffff,
+ .coherent_dma_mask = DMA_32BIT_MASK,
},
.num_resources = ARRAY_SIZE(au1100_lcd_resources),
.resource = au1100_lcd_resources,
},
};
-static u64 ehci_dmamask = ~(u32)0;
+static u64 ehci_dmamask = DMA_32BIT_MASK;
static struct platform_device au1xxx_usb_ehci_device = {
.name = "au1xxx-ehci",
.id = 0,
.dev = {
.dma_mask = &ehci_dmamask,
- .coherent_dma_mask = 0xffffffff,
+ .coherent_dma_mask = DMA_32BIT_MASK,
},
.num_resources = ARRAY_SIZE(au1xxx_usb_ehci_resources),
.resource = au1xxx_usb_ehci_resources,
}
};
-static u64 udc_dmamask = ~(u32)0;
+static u64 udc_dmamask = DMA_32BIT_MASK;
static struct platform_device au1xxx_usb_gdt_device = {
.name = "au1xxx-udc",
.id = 0,
.dev = {
.dma_mask = &udc_dmamask,
- .coherent_dma_mask = 0xffffffff,
+ .coherent_dma_mask = DMA_32BIT_MASK,
},
.num_resources = ARRAY_SIZE(au1xxx_usb_gdt_resources),
.resource = au1xxx_usb_gdt_resources,
},
};
-static u64 uoc_dmamask = ~(u32)0;
+static u64 uoc_dmamask = DMA_32BIT_MASK;
static struct platform_device au1xxx_usb_otg_device = {
.name = "au1xxx-uoc",
.id = 0,
.dev = {
.dma_mask = &uoc_dmamask,
- .coherent_dma_mask = 0xffffffff,
+ .coherent_dma_mask = DMA_32BIT_MASK,
},
.num_resources = ARRAY_SIZE(au1xxx_usb_otg_resources),
.resource = au1xxx_usb_otg_resources,
}
};
-static u64 au1200_lcd_dmamask = ~(u32)0;
+static u64 au1200_lcd_dmamask = DMA_32BIT_MASK;
static struct platform_device au1200_lcd_device = {
.name = "au1200-lcd",
.id = 0,
.dev = {
.dma_mask = &au1200_lcd_dmamask,
- .coherent_dma_mask = 0xffffffff,
+ .coherent_dma_mask = DMA_32BIT_MASK,
},
.num_resources = ARRAY_SIZE(au1200_lcd_resources),
.resource = au1200_lcd_resources,
};
-static u64 au1xxx_mmc_dmamask = ~(u32)0;
+static u64 au1xxx_mmc_dmamask = DMA_32BIT_MASK;
static struct platform_device au1xxx_mmc_device = {
.name = "au1xxx-mmc",
.id = 0,
.dev = {
.dma_mask = &au1xxx_mmc_dmamask,
- .coherent_dma_mask = 0xffffffff,
+ .coherent_dma_mask = DMA_32BIT_MASK,
},
.num_resources = ARRAY_SIZE(au1xxx_mmc_resources),
.resource = au1xxx_mmc_resources,
#include <linux/gpio.h>
#include <linux/gpio_keys.h>
#include <linux/input.h>
+#include <linux/mtd/partitions.h>
+#include <linux/mtd/physmap.h>
+#include <mtd/mtd-abi.h>
static struct gpio_keys_button mtx1_gpio_button[] = {
{
}
};
+static struct mtd_partition mtx1_mtd_partitions[] = {
+ {
+ .name = "filesystem",
+ .size = 0x01C00000,
+ .offset = 0,
+ },
+ {
+ .name = "yamon",
+ .size = 0x00100000,
+ .offset = MTDPART_OFS_APPEND,
+ .mask_flags = MTD_WRITEABLE,
+ },
+ {
+ .name = "kernel",
+ .size = 0x002c0000,
+ .offset = MTDPART_OFS_APPEND,
+ },
+ {
+ .name = "yamon env",
+ .size = 0x00040000,
+ .offset = MTDPART_OFS_APPEND,
+ },
+};
+
+static struct physmap_flash_data mtx1_flash_data = {
+ .width = 4,
+ .nr_parts = 4,
+ .parts = mtx1_mtd_partitions,
+};
+
+static struct resource mtx1_mtd_resource = {
+ .start = 0x1e000000,
+ .end = 0x1fffffff,
+ .flags = IORESOURCE_MEM,
+};
+
+static struct platform_device mtx1_mtd = {
+ .name = "physmap-flash",
+ .dev = {
+ .platform_data = &mtx1_flash_data,
+ },
+ .num_resources = 1,
+ .resource = &mtx1_mtd_resource,
+};
+
static struct __initdata platform_device * mtx1_devs[] = {
&mtx1_gpio_leds,
&mtx1_wdt,
- &mtx1_button
+ &mtx1_button,
+ &mtx1_mtd,
};
static int __init mtx1_register_devices(void)
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
+#include <linux/dma-mapping.h>
#include <linux/init.h>
#include <linux/platform_device.h>
}
};
-static u64 ide_dmamask = ~(u32)0;
+static u64 ide_dmamask = DMA_32BIT_MASK;
static struct platform_device ide_device = {
.name = "au1200-ide",
.id = 0,
.dev = {
.dma_mask = &ide_dmamask,
- .coherent_dma_mask = 0xffffffff,
+ .coherent_dma_mask = DMA_32BIT_MASK,
},
.num_resources = ARRAY_SIZE(ide_resources),
.resource = ide_resources
# Makefile for the Cobalt micro systems family specific parts of the kernel
#
-obj-y := buttons.o irq.o led.o reset.o rtc.o serial.o setup.o time.o
+obj-y := buttons.o irq.o lcd.o led.o reset.o rtc.o serial.o setup.o time.o
obj-$(CONFIG_PCI) += pci.o
obj-$(CONFIG_EARLY_PRINTK) += console.o
--- /dev/null
+/*
+ * Registration of Cobalt LCD platform device.
+ *
+ * Copyright (C) 2008 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+#include <linux/errno.h>
+#include <linux/init.h>
+#include <linux/ioport.h>
+#include <linux/platform_device.h>
+
+static struct resource cobalt_lcd_resource __initdata = {
+ .start = 0x1f000000,
+ .end = 0x1f00001f,
+ .flags = IORESOURCE_MEM,
+};
+
+static __init int cobalt_lcd_add(void)
+{
+ struct platform_device *pdev;
+ int retval;
+
+ pdev = platform_device_alloc("cobalt-lcd", -1);
+ if (!pdev)
+ return -ENOMEM;
+
+ retval = platform_device_add_resources(pdev, &cobalt_lcd_resource, 1);
+ if (retval)
+ goto err_free_device;
+
+ retval = platform_device_add(pdev);
+ if (retval)
+ goto err_free_device;
+
+ return 0;
+
+err_free_device:
+ platform_device_put(pdev);
+
+ return retval;
+}
+device_initcall(cobalt_lcd_add);
+++ /dev/null
-#
-# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.20
-# Sun Feb 18 21:27:35 2007
-#
-CONFIG_MIPS=y
-
-#
-# Machine selection
-#
-CONFIG_ZONE_DMA=y
-# CONFIG_MIPS_MTX1 is not set
-# CONFIG_MIPS_BOSPORUS is not set
-# CONFIG_MIPS_PB1000 is not set
-# CONFIG_MIPS_PB1100 is not set
-# CONFIG_MIPS_PB1500 is not set
-# CONFIG_MIPS_PB1550 is not set
-# CONFIG_MIPS_PB1200 is not set
-# CONFIG_MIPS_DB1000 is not set
-# CONFIG_MIPS_DB1100 is not set
-# CONFIG_MIPS_DB1500 is not set
-# CONFIG_MIPS_DB1550 is not set
-# CONFIG_MIPS_DB1200 is not set
-# CONFIG_MIPS_MIRAGE is not set
-# CONFIG_BASLER_EXCITE is not set
-# CONFIG_MIPS_COBALT is not set
-# CONFIG_MACH_DECSTATION is not set
-# CONFIG_MACH_JAZZ is not set
-CONFIG_MIPS_ATLAS=y
-# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
-# CONFIG_WR_PPMC is not set
-# CONFIG_MIPS_SIM is not set
-# CONFIG_MOMENCO_JAGUAR_ATX is not set
-# CONFIG_MIPS_XXS1500 is not set
-# CONFIG_PNX8550_JBS is not set
-# CONFIG_PNX8550_STB810 is not set
-# CONFIG_MACH_VR41XX is not set
-# CONFIG_PMC_YOSEMITE is not set
-# CONFIG_MARKEINS is not set
-# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP27 is not set
-# CONFIG_SGI_IP32 is not set
-# CONFIG_SIBYTE_BIGSUR is not set
-# CONFIG_SIBYTE_SWARM is not set
-# CONFIG_SIBYTE_SENTOSA is not set
-# CONFIG_SIBYTE_RHONE is not set
-# CONFIG_SIBYTE_CARMEL is not set
-# CONFIG_SIBYTE_LITTLESUR is not set
-# CONFIG_SIBYTE_CRHINE is not set
-# CONFIG_SIBYTE_CRHONE is not set
-# CONFIG_SNI_RM is not set
-# CONFIG_TOSHIBA_JMR3927 is not set
-# CONFIG_TOSHIBA_RBTX4927 is not set
-# CONFIG_TOSHIBA_RBTX4938 is not set
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-# CONFIG_ARCH_HAS_ILOG2_U32 is not set
-# CONFIG_ARCH_HAS_ILOG2_U64 is not set
-CONFIG_GENERIC_FIND_NEXT_BIT=y
-CONFIG_GENERIC_HWEIGHT=y
-CONFIG_GENERIC_CALIBRATE_DELAY=y
-CONFIG_GENERIC_TIME=y
-CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
-CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
-CONFIG_DMA_NONCOHERENT=y
-CONFIG_DMA_NEED_PCI_MAP_STATE=y
-CONFIG_MIPS_BONITO64=y
-CONFIG_MIPS_MSC=y
-# CONFIG_CPU_BIG_ENDIAN is not set
-CONFIG_CPU_LITTLE_ENDIAN=y
-CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
-CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
-CONFIG_IRQ_CPU=y
-CONFIG_MIPS_BOARDS_GEN=y
-CONFIG_MIPS_GT64120=y
-CONFIG_SWAP_IO_SPACE=y
-CONFIG_BOOT_ELF32=y
-CONFIG_MIPS_L1_CACHE_SHIFT=5
-
-#
-# CPU selection
-#
-CONFIG_CPU_MIPS32_R1=y
-# CONFIG_CPU_MIPS32_R2 is not set
-# CONFIG_CPU_MIPS64_R1 is not set
-# CONFIG_CPU_MIPS64_R2 is not set
-# CONFIG_CPU_R3000 is not set
-# CONFIG_CPU_TX39XX is not set
-# CONFIG_CPU_VR41XX is not set
-# CONFIG_CPU_R4300 is not set
-# CONFIG_CPU_R4X00 is not set
-# CONFIG_CPU_TX49XX is not set
-# CONFIG_CPU_R5000 is not set
-# CONFIG_CPU_R5432 is not set
-# CONFIG_CPU_R6000 is not set
-# CONFIG_CPU_NEVADA is not set
-# CONFIG_CPU_R8000 is not set
-# CONFIG_CPU_R10000 is not set
-# CONFIG_CPU_RM7000 is not set
-# CONFIG_CPU_RM9000 is not set
-# CONFIG_CPU_SB1 is not set
-CONFIG_SYS_HAS_CPU_MIPS32_R1=y
-CONFIG_SYS_HAS_CPU_MIPS32_R2=y
-CONFIG_SYS_HAS_CPU_MIPS64_R1=y
-CONFIG_SYS_HAS_CPU_NEVADA=y
-CONFIG_SYS_HAS_CPU_RM7000=y
-CONFIG_CPU_MIPS32=y
-CONFIG_CPU_MIPSR1=y
-CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
-CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
-CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
-
-#
-# Kernel type
-#
-CONFIG_32BIT=y
-# CONFIG_64BIT is not set
-CONFIG_PAGE_SIZE_4KB=y
-# CONFIG_PAGE_SIZE_8KB is not set
-# CONFIG_PAGE_SIZE_16KB is not set
-# CONFIG_PAGE_SIZE_64KB is not set
-CONFIG_BOARD_SCACHE=y
-CONFIG_RM7000_CPU_SCACHE=y
-CONFIG_CPU_HAS_PREFETCH=y
-CONFIG_MIPS_MT_DISABLED=y
-# CONFIG_MIPS_MT_SMP is not set
-# CONFIG_MIPS_MT_SMTC is not set
-# CONFIG_MIPS_VPE_LOADER is not set
-CONFIG_SYS_SUPPORTS_MULTITHREADING=y
-# CONFIG_64BIT_PHYS_ADDR is not set
-CONFIG_CPU_HAS_LLSC=y
-# CONFIG_CPU_HAS_SMARTMIPS is not set
-CONFIG_CPU_HAS_SYNC=y
-CONFIG_GENERIC_HARDIRQS=y
-CONFIG_GENERIC_IRQ_PROBE=y
-CONFIG_CPU_SUPPORTS_HIGHMEM=y
-CONFIG_SYS_SUPPORTS_SMARTMIPS=y
-CONFIG_ARCH_FLATMEM_ENABLE=y
-CONFIG_SELECT_MEMORY_MODEL=y
-CONFIG_FLATMEM_MANUAL=y
-# CONFIG_DISCONTIGMEM_MANUAL is not set
-# CONFIG_SPARSEMEM_MANUAL is not set
-CONFIG_FLATMEM=y
-CONFIG_FLAT_NODE_MEM_MAP=y
-# CONFIG_SPARSEMEM_STATIC is not set
-CONFIG_SPLIT_PTLOCK_CPUS=4
-# CONFIG_RESOURCES_64BIT is not set
-CONFIG_ZONE_DMA_FLAG=1
-# CONFIG_HZ_48 is not set
-CONFIG_HZ_100=y
-# CONFIG_HZ_128 is not set
-# CONFIG_HZ_250 is not set
-# CONFIG_HZ_256 is not set
-# CONFIG_HZ_1000 is not set
-# CONFIG_HZ_1024 is not set
-CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
-CONFIG_HZ=100
-CONFIG_PREEMPT_NONE=y
-# CONFIG_PREEMPT_VOLUNTARY is not set
-# CONFIG_PREEMPT is not set
-# CONFIG_KEXEC is not set
-CONFIG_LOCKDEP_SUPPORT=y
-CONFIG_STACKTRACE_SUPPORT=y
-CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-CONFIG_BROKEN_ON_SMP=y
-CONFIG_INIT_ENV_ARG_LIMIT=32
-
-#
-# General setup
-#
-CONFIG_LOCALVERSION=""
-CONFIG_LOCALVERSION_AUTO=y
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_IPC_NS is not set
-CONFIG_SYSVIPC_SYSCTL=y
-# CONFIG_POSIX_MQUEUE is not set
-# CONFIG_BSD_PROCESS_ACCT is not set
-# CONFIG_TASKSTATS is not set
-# CONFIG_UTS_NS is not set
-# CONFIG_AUDIT is not set
-# CONFIG_IKCONFIG is not set
-CONFIG_SYSFS_DEPRECATED=y
-CONFIG_RELAY=y
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_SYSCTL=y
-CONFIG_EMBEDDED=y
-CONFIG_SYSCTL_SYSCALL=y
-CONFIG_KALLSYMS=y
-# CONFIG_KALLSYMS_EXTRA_PASS is not set
-CONFIG_HOTPLUG=y
-CONFIG_PRINTK=y
-CONFIG_BUG=y
-CONFIG_ELF_CORE=y
-CONFIG_BASE_FULL=y
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-CONFIG_SHMEM=y
-CONFIG_SLAB=y
-CONFIG_VM_EVENT_COUNTERS=y
-CONFIG_RT_MUTEXES=y
-# CONFIG_TINY_SHMEM is not set
-CONFIG_BASE_SMALL=0
-# CONFIG_SLOB is not set
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-CONFIG_MODVERSIONS=y
-CONFIG_MODULE_SRCVERSION_ALL=y
-CONFIG_KMOD=y
-
-#
-# Block layer
-#
-CONFIG_BLOCK=y
-# CONFIG_LBD is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
-# CONFIG_LSF is not set
-
-#
-# IO Schedulers
-#
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
-CONFIG_DEFAULT_AS=y
-# CONFIG_DEFAULT_DEADLINE is not set
-# CONFIG_DEFAULT_CFQ is not set
-# CONFIG_DEFAULT_NOOP is not set
-CONFIG_DEFAULT_IOSCHED="anticipatory"
-
-#
-# Bus options (PCI, PCMCIA, EISA, ISA, TC)
-#
-CONFIG_HW_HAS_PCI=y
-CONFIG_PCI=y
-CONFIG_MMU=y
-
-#
-# PCCARD (PCMCIA/CardBus) support
-#
-# CONFIG_PCCARD is not set
-
-#
-# PCI Hotplug Support
-#
-# CONFIG_HOTPLUG_PCI is not set
-
-#
-# Executable file formats
-#
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_TRAD_SIGNALS=y
-
-#
-# Power management options
-#
-CONFIG_PM=y
-# CONFIG_PM_LEGACY is not set
-# CONFIG_PM_DEBUG is not set
-# CONFIG_PM_SYSFS_DEPRECATED is not set
-
-#
-# Networking
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-# CONFIG_NETDEBUG is not set
-CONFIG_PACKET=y
-CONFIG_PACKET_MMAP=y
-CONFIG_UNIX=y
-CONFIG_XFRM=y
-CONFIG_XFRM_USER=m
-# CONFIG_XFRM_SUB_POLICY is not set
-CONFIG_XFRM_MIGRATE=y
-CONFIG_NET_KEY=y
-CONFIG_NET_KEY_MIGRATE=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_ADVANCED_ROUTER=y
-CONFIG_ASK_IP_FIB_HASH=y
-# CONFIG_IP_FIB_TRIE is not set
-CONFIG_IP_FIB_HASH=y
-CONFIG_IP_MULTIPLE_TABLES=y
-CONFIG_IP_ROUTE_MULTIPATH=y
-# CONFIG_IP_ROUTE_MULTIPATH_CACHED is not set
-CONFIG_IP_ROUTE_VERBOSE=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-CONFIG_NET_IPIP=m
-CONFIG_NET_IPGRE=m
-CONFIG_NET_IPGRE_BROADCAST=y
-CONFIG_IP_MROUTE=y
-CONFIG_IP_PIMSM_V1=y
-CONFIG_IP_PIMSM_V2=y
-# CONFIG_ARPD is not set
-CONFIG_SYN_COOKIES=y
-CONFIG_INET_AH=m
-CONFIG_INET_ESP=m
-CONFIG_INET_IPCOMP=m
-CONFIG_INET_XFRM_TUNNEL=m
-CONFIG_INET_TUNNEL=m
-CONFIG_INET_XFRM_MODE_TRANSPORT=m
-CONFIG_INET_XFRM_MODE_TUNNEL=m
-CONFIG_INET_XFRM_MODE_BEET=m
-CONFIG_INET_DIAG=y
-CONFIG_INET_TCP_DIAG=y
-# CONFIG_TCP_CONG_ADVANCED is not set
-CONFIG_TCP_CONG_CUBIC=y
-CONFIG_DEFAULT_TCP_CONG="cubic"
-CONFIG_TCP_MD5SIG=y
-
-#
-# IP: Virtual Server Configuration
-#
-CONFIG_IP_VS=m
-# CONFIG_IP_VS_DEBUG is not set
-CONFIG_IP_VS_TAB_BITS=12
-
-#
-# IPVS transport protocol load balancing support
-#
-CONFIG_IP_VS_PROTO_TCP=y
-CONFIG_IP_VS_PROTO_UDP=y
-CONFIG_IP_VS_PROTO_ESP=y
-CONFIG_IP_VS_PROTO_AH=y
-
-#
-# IPVS scheduler
-#
-CONFIG_IP_VS_RR=m
-CONFIG_IP_VS_WRR=m
-CONFIG_IP_VS_LC=m
-CONFIG_IP_VS_WLC=m
-CONFIG_IP_VS_LBLC=m
-CONFIG_IP_VS_LBLCR=m
-CONFIG_IP_VS_DH=m
-CONFIG_IP_VS_SH=m
-CONFIG_IP_VS_SED=m
-CONFIG_IP_VS_NQ=m
-
-#
-# IPVS application helper
-#
-CONFIG_IP_VS_FTP=m
-CONFIG_IPV6=m
-CONFIG_IPV6_PRIVACY=y
-CONFIG_IPV6_ROUTER_PREF=y
-CONFIG_IPV6_ROUTE_INFO=y
-CONFIG_INET6_AH=m
-CONFIG_INET6_ESP=m
-CONFIG_INET6_IPCOMP=m
-CONFIG_IPV6_MIP6=y
-CONFIG_INET6_XFRM_TUNNEL=m
-CONFIG_INET6_TUNNEL=m
-CONFIG_INET6_XFRM_MODE_TRANSPORT=m
-CONFIG_INET6_XFRM_MODE_TUNNEL=m
-CONFIG_INET6_XFRM_MODE_BEET=m
-CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m
-CONFIG_IPV6_SIT=m
-CONFIG_IPV6_TUNNEL=m
-CONFIG_IPV6_MULTIPLE_TABLES=y
-CONFIG_IPV6_SUBTREES=y
-CONFIG_NETWORK_SECMARK=y
-CONFIG_NETFILTER=y
-# CONFIG_NETFILTER_DEBUG is not set
-CONFIG_BRIDGE_NETFILTER=y
-
-#
-# Core Netfilter Configuration
-#
-CONFIG_NETFILTER_NETLINK=m
-CONFIG_NETFILTER_NETLINK_QUEUE=m
-CONFIG_NETFILTER_NETLINK_LOG=m
-CONFIG_NF_CONNTRACK_ENABLED=m
-CONFIG_NF_CONNTRACK_SUPPORT=y
-# CONFIG_IP_NF_CONNTRACK_SUPPORT is not set
-CONFIG_NF_CONNTRACK=m
-CONFIG_NF_CT_ACCT=y
-CONFIG_NF_CONNTRACK_MARK=y
-CONFIG_NF_CONNTRACK_SECMARK=y
-CONFIG_NF_CONNTRACK_EVENTS=y
-CONFIG_NF_CT_PROTO_GRE=m
-CONFIG_NF_CT_PROTO_SCTP=m
-CONFIG_NF_CONNTRACK_AMANDA=m
-CONFIG_NF_CONNTRACK_FTP=m
-CONFIG_NF_CONNTRACK_H323=m
-CONFIG_NF_CONNTRACK_IRC=m
-# CONFIG_NF_CONNTRACK_NETBIOS_NS is not set
-CONFIG_NF_CONNTRACK_PPTP=m
-CONFIG_NF_CONNTRACK_SANE=m
-CONFIG_NF_CONNTRACK_SIP=m
-CONFIG_NF_CONNTRACK_TFTP=m
-CONFIG_NF_CT_NETLINK=m
-CONFIG_NETFILTER_XTABLES=m
-CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
-CONFIG_NETFILTER_XT_TARGET_CONNMARK=m
-CONFIG_NETFILTER_XT_TARGET_DSCP=m
-CONFIG_NETFILTER_XT_TARGET_MARK=m
-CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
-CONFIG_NETFILTER_XT_TARGET_NFLOG=m
-CONFIG_NETFILTER_XT_TARGET_NOTRACK=m
-CONFIG_NETFILTER_XT_TARGET_SECMARK=m
-CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=m
-CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
-CONFIG_NETFILTER_XT_MATCH_COMMENT=m
-CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m
-CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
-CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
-CONFIG_NETFILTER_XT_MATCH_DCCP=m
-CONFIG_NETFILTER_XT_MATCH_DSCP=m
-CONFIG_NETFILTER_XT_MATCH_ESP=m
-CONFIG_NETFILTER_XT_MATCH_HELPER=m
-CONFIG_NETFILTER_XT_MATCH_LENGTH=m
-CONFIG_NETFILTER_XT_MATCH_LIMIT=m
-CONFIG_NETFILTER_XT_MATCH_MAC=m
-CONFIG_NETFILTER_XT_MATCH_MARK=m
-CONFIG_NETFILTER_XT_MATCH_POLICY=m
-CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
-CONFIG_NETFILTER_XT_MATCH_PHYSDEV=m
-CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
-CONFIG_NETFILTER_XT_MATCH_QUOTA=m
-CONFIG_NETFILTER_XT_MATCH_REALM=m
-CONFIG_NETFILTER_XT_MATCH_SCTP=m
-CONFIG_NETFILTER_XT_MATCH_STATE=m
-CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
-CONFIG_NETFILTER_XT_MATCH_STRING=m
-CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
-CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m
-
-#
-# IP: Netfilter Configuration
-#
-CONFIG_NF_CONNTRACK_IPV4=m
-CONFIG_NF_CONNTRACK_PROC_COMPAT=y
-CONFIG_IP_NF_QUEUE=m
-CONFIG_IP_NF_IPTABLES=m
-CONFIG_IP_NF_MATCH_IPRANGE=m
-CONFIG_IP_NF_MATCH_TOS=m
-CONFIG_IP_NF_MATCH_RECENT=m
-CONFIG_IP_NF_MATCH_ECN=m
-CONFIG_IP_NF_MATCH_AH=m
-CONFIG_IP_NF_MATCH_TTL=m
-CONFIG_IP_NF_MATCH_OWNER=m
-CONFIG_IP_NF_MATCH_ADDRTYPE=m
-CONFIG_IP_NF_FILTER=m
-CONFIG_IP_NF_TARGET_REJECT=m
-CONFIG_IP_NF_TARGET_LOG=m
-CONFIG_IP_NF_TARGET_ULOG=m
-CONFIG_NF_NAT=m
-CONFIG_NF_NAT_NEEDED=y
-CONFIG_IP_NF_TARGET_MASQUERADE=m
-CONFIG_IP_NF_TARGET_REDIRECT=m
-CONFIG_IP_NF_TARGET_NETMAP=m
-CONFIG_IP_NF_TARGET_SAME=m
-CONFIG_NF_NAT_SNMP_BASIC=m
-CONFIG_NF_NAT_PROTO_GRE=m
-CONFIG_NF_NAT_FTP=m
-CONFIG_NF_NAT_IRC=m
-CONFIG_NF_NAT_TFTP=m
-CONFIG_NF_NAT_AMANDA=m
-CONFIG_NF_NAT_PPTP=m
-CONFIG_NF_NAT_H323=m
-CONFIG_NF_NAT_SIP=m
-CONFIG_IP_NF_MANGLE=m
-CONFIG_IP_NF_TARGET_TOS=m
-CONFIG_IP_NF_TARGET_ECN=m
-CONFIG_IP_NF_TARGET_TTL=m
-# CONFIG_IP_NF_TARGET_CLUSTERIP is not set
-CONFIG_IP_NF_RAW=m
-CONFIG_IP_NF_ARPTABLES=m
-CONFIG_IP_NF_ARPFILTER=m
-CONFIG_IP_NF_ARP_MANGLE=m
-
-#
-# IPv6: Netfilter Configuration (EXPERIMENTAL)
-#
-CONFIG_NF_CONNTRACK_IPV6=m
-CONFIG_IP6_NF_QUEUE=m
-CONFIG_IP6_NF_IPTABLES=m
-CONFIG_IP6_NF_MATCH_RT=m
-CONFIG_IP6_NF_MATCH_OPTS=m
-CONFIG_IP6_NF_MATCH_FRAG=m
-CONFIG_IP6_NF_MATCH_HL=m
-CONFIG_IP6_NF_MATCH_OWNER=m
-CONFIG_IP6_NF_MATCH_IPV6HEADER=m
-CONFIG_IP6_NF_MATCH_AH=m
-CONFIG_IP6_NF_MATCH_MH=m
-CONFIG_IP6_NF_MATCH_EUI64=m
-CONFIG_IP6_NF_FILTER=m
-CONFIG_IP6_NF_TARGET_LOG=m
-CONFIG_IP6_NF_TARGET_REJECT=m
-CONFIG_IP6_NF_MANGLE=m
-CONFIG_IP6_NF_TARGET_HL=m
-CONFIG_IP6_NF_RAW=m
-
-#
-# Bridge: Netfilter Configuration
-#
-CONFIG_BRIDGE_NF_EBTABLES=m
-CONFIG_BRIDGE_EBT_BROUTE=m
-CONFIG_BRIDGE_EBT_T_FILTER=m
-CONFIG_BRIDGE_EBT_T_NAT=m
-CONFIG_BRIDGE_EBT_802_3=m
-CONFIG_BRIDGE_EBT_AMONG=m
-CONFIG_BRIDGE_EBT_ARP=m
-CONFIG_BRIDGE_EBT_IP=m
-CONFIG_BRIDGE_EBT_LIMIT=m
-CONFIG_BRIDGE_EBT_MARK=m
-CONFIG_BRIDGE_EBT_PKTTYPE=m
-CONFIG_BRIDGE_EBT_STP=m
-CONFIG_BRIDGE_EBT_VLAN=m
-CONFIG_BRIDGE_EBT_ARPREPLY=m
-CONFIG_BRIDGE_EBT_DNAT=m
-CONFIG_BRIDGE_EBT_MARK_T=m
-CONFIG_BRIDGE_EBT_REDIRECT=m
-CONFIG_BRIDGE_EBT_SNAT=m
-CONFIG_BRIDGE_EBT_LOG=m
-CONFIG_BRIDGE_EBT_ULOG=m
-
-#
-# DCCP Configuration (EXPERIMENTAL)
-#
-# CONFIG_IP_DCCP is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-CONFIG_IP_SCTP=m
-# CONFIG_SCTP_DBG_MSG is not set
-# CONFIG_SCTP_DBG_OBJCNT is not set
-# CONFIG_SCTP_HMAC_NONE is not set
-# CONFIG_SCTP_HMAC_SHA1 is not set
-CONFIG_SCTP_HMAC_MD5=y
-
-#
-# TIPC Configuration (EXPERIMENTAL)
-#
-# CONFIG_TIPC is not set
-# CONFIG_ATM is not set
-CONFIG_BRIDGE=m
-CONFIG_VLAN_8021Q=m
-# CONFIG_DECNET is not set
-CONFIG_LLC=m
-# CONFIG_LLC2 is not set
-# CONFIG_IPX is not set
-CONFIG_ATALK=m
-CONFIG_DEV_APPLETALK=m
-CONFIG_IPDDP=m
-CONFIG_IPDDP_ENCAP=y
-CONFIG_IPDDP_DECAP=y
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-
-#
-# QoS and/or fair queueing
-#
-CONFIG_NET_SCHED=y
-CONFIG_NET_SCH_FIFO=y
-CONFIG_NET_SCH_CLK_JIFFIES=y
-# CONFIG_NET_SCH_CLK_GETTIMEOFDAY is not set
-# CONFIG_NET_SCH_CLK_CPU is not set
-
-#
-# Queueing/Scheduling
-#
-CONFIG_NET_SCH_CBQ=m
-CONFIG_NET_SCH_HTB=m
-CONFIG_NET_SCH_HFSC=m
-CONFIG_NET_SCH_PRIO=m
-CONFIG_NET_SCH_RED=m
-CONFIG_NET_SCH_SFQ=m
-CONFIG_NET_SCH_TEQL=m
-CONFIG_NET_SCH_TBF=m
-CONFIG_NET_SCH_GRED=m
-CONFIG_NET_SCH_DSMARK=m
-CONFIG_NET_SCH_NETEM=m
-CONFIG_NET_SCH_INGRESS=m
-
-#
-# Classification
-#
-CONFIG_NET_CLS=y
-CONFIG_NET_CLS_BASIC=m
-CONFIG_NET_CLS_TCINDEX=m
-CONFIG_NET_CLS_ROUTE4=m
-CONFIG_NET_CLS_ROUTE=y
-CONFIG_NET_CLS_FW=m
-CONFIG_NET_CLS_U32=m
-# CONFIG_CLS_U32_PERF is not set
-# CONFIG_CLS_U32_MARK is not set
-CONFIG_NET_CLS_RSVP=m
-CONFIG_NET_CLS_RSVP6=m
-# CONFIG_NET_EMATCH is not set
-# CONFIG_NET_CLS_ACT is not set
-CONFIG_NET_CLS_POLICE=y
-CONFIG_NET_CLS_IND=y
-CONFIG_NET_ESTIMATOR=y
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-# CONFIG_HAMRADIO is not set
-# CONFIG_IRDA is not set
-# CONFIG_BT is not set
-CONFIG_IEEE80211=m
-# CONFIG_IEEE80211_DEBUG is not set
-CONFIG_IEEE80211_CRYPT_WEP=m
-CONFIG_IEEE80211_CRYPT_CCMP=m
-CONFIG_IEEE80211_SOFTMAC=m
-# CONFIG_IEEE80211_SOFTMAC_DEBUG is not set
-CONFIG_WIRELESS_EXT=y
-CONFIG_FIB_RULES=y
-
-#
-# Device Drivers
-#
-
-#
-# Generic Driver Options
-#
-CONFIG_STANDALONE=y
-CONFIG_PREVENT_FIRMWARE_BUILD=y
-CONFIG_FW_LOADER=y
-# CONFIG_SYS_HYPERVISOR is not set
-
-#
-# Connector - unified userspace <-> kernelspace linker
-#
-CONFIG_CONNECTOR=m
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-
-#
-# Block devices
-#
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-CONFIG_BLK_DEV_UMEM=m
-# CONFIG_BLK_DEV_COW_COMMON is not set
-CONFIG_BLK_DEV_LOOP=m
-CONFIG_BLK_DEV_CRYPTOLOOP=m
-CONFIG_BLK_DEV_NBD=m
-# CONFIG_BLK_DEV_SX8 is not set
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_COUNT=16
-CONFIG_BLK_DEV_RAM_SIZE=4096
-CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
-# CONFIG_BLK_DEV_INITRD is not set
-CONFIG_CDROM_PKTCDVD=m
-CONFIG_CDROM_PKTCDVD_BUFFERS=8
-# CONFIG_CDROM_PKTCDVD_WCACHE is not set
-CONFIG_ATA_OVER_ETH=m
-
-#
-# Misc devices
-#
-CONFIG_SGI_IOC4=m
-# CONFIG_TIFM_CORE is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-CONFIG_IDE=y
-CONFIG_IDE_MAX_HWIFS=4
-CONFIG_BLK_DEV_IDE=y
-
-#
-# Please see Documentation/ide.txt for help/info on IDE drives
-#
-# CONFIG_BLK_DEV_IDE_SATA is not set
-CONFIG_BLK_DEV_IDEDISK=y
-# CONFIG_IDEDISK_MULTI_MODE is not set
-CONFIG_BLK_DEV_IDECD=y
-# CONFIG_BLK_DEV_IDETAPE is not set
-# CONFIG_BLK_DEV_IDEFLOPPY is not set
-# CONFIG_BLK_DEV_IDESCSI is not set
-# CONFIG_IDE_TASK_IOCTL is not set
-
-#
-# IDE chipset support/bugfixes
-#
-CONFIG_IDE_GENERIC=y
-# CONFIG_BLK_DEV_IDEPCI is not set
-# CONFIG_IDE_ARM is not set
-# CONFIG_BLK_DEV_IDEDMA is not set
-# CONFIG_IDEDMA_AUTO is not set
-# CONFIG_BLK_DEV_HD is not set
-
-#
-# SCSI device support
-#
-CONFIG_RAID_ATTRS=m
-CONFIG_SCSI=y
-CONFIG_SCSI_TGT=m
-CONFIG_SCSI_NETLINK=y
-CONFIG_SCSI_PROC_FS=y
-
-#
-# SCSI support type (disk, tape, CD-ROM)
-#
-CONFIG_BLK_DEV_SD=y
-CONFIG_CHR_DEV_ST=m
-CONFIG_CHR_DEV_OSST=m
-CONFIG_BLK_DEV_SR=m
-CONFIG_BLK_DEV_SR_VENDOR=y
-CONFIG_CHR_DEV_SG=m
-CONFIG_CHR_DEV_SCH=m
-
-#
-# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
-#
-CONFIG_SCSI_MULTI_LUN=y
-CONFIG_SCSI_CONSTANTS=y
-CONFIG_SCSI_LOGGING=y
-CONFIG_SCSI_SCAN_ASYNC=y
-
-#
-# SCSI Transports
-#
-CONFIG_SCSI_SPI_ATTRS=y
-CONFIG_SCSI_FC_ATTRS=y
-CONFIG_SCSI_ISCSI_ATTRS=m
-CONFIG_SCSI_SAS_ATTRS=m
-CONFIG_SCSI_SAS_LIBSAS=m
-CONFIG_SCSI_SAS_LIBSAS_DEBUG=y
-
-#
-# SCSI low-level drivers
-#
-CONFIG_ISCSI_TCP=m
-# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
-# CONFIG_SCSI_3W_9XXX is not set
-# CONFIG_SCSI_ACARD is not set
-# CONFIG_SCSI_AACRAID is not set
-# CONFIG_SCSI_AIC7XXX is not set
-# CONFIG_SCSI_AIC7XXX_OLD is not set
-# CONFIG_SCSI_AIC79XX is not set
-CONFIG_SCSI_AIC94XX=m
-# CONFIG_AIC94XX_DEBUG is not set
-# CONFIG_SCSI_DPT_I2O is not set
-# CONFIG_SCSI_ARCMSR is not set
-# CONFIG_MEGARAID_NEWGEN is not set
-# CONFIG_MEGARAID_LEGACY is not set
-# CONFIG_MEGARAID_SAS is not set
-# CONFIG_SCSI_HPTIOP is not set
-# CONFIG_SCSI_DMX3191D is not set
-# CONFIG_SCSI_FUTURE_DOMAIN is not set
-# CONFIG_SCSI_IPS is not set
-# CONFIG_SCSI_INITIO is not set
-# CONFIG_SCSI_INIA100 is not set
-# CONFIG_SCSI_STEX is not set
-CONFIG_SCSI_SYM53C8XX_2=y
-CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=0
-CONFIG_SCSI_SYM53C8XX_DEFAULT_TAGS=16
-CONFIG_SCSI_SYM53C8XX_MAX_TAGS=64
-CONFIG_SCSI_SYM53C8XX_MMIO=y
-# CONFIG_SCSI_QLOGIC_1280 is not set
-# CONFIG_SCSI_QLA_FC is not set
-# CONFIG_SCSI_QLA_ISCSI is not set
-# CONFIG_SCSI_LPFC is not set
-# CONFIG_SCSI_DC395x is not set
-# CONFIG_SCSI_DC390T is not set
-# CONFIG_SCSI_NSP32 is not set
-# CONFIG_SCSI_DEBUG is not set
-# CONFIG_SCSI_SRP is not set
-
-#
-# Serial ATA (prod) and Parallel ATA (experimental) drivers
-#
-# CONFIG_ATA is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-CONFIG_MD=y
-CONFIG_BLK_DEV_MD=m
-CONFIG_MD_LINEAR=m
-CONFIG_MD_RAID0=m
-CONFIG_MD_RAID1=m
-CONFIG_MD_RAID10=m
-CONFIG_MD_RAID456=m
-CONFIG_MD_RAID5_RESHAPE=y
-CONFIG_MD_MULTIPATH=m
-CONFIG_MD_FAULTY=m
-CONFIG_BLK_DEV_DM=m
-# CONFIG_DM_DEBUG is not set
-CONFIG_DM_CRYPT=m
-CONFIG_DM_SNAPSHOT=m
-CONFIG_DM_MIRROR=m
-CONFIG_DM_ZERO=m
-CONFIG_DM_MULTIPATH=m
-CONFIG_DM_MULTIPATH_EMC=m
-
-#
-# Fusion MPT device support
-#
-# CONFIG_FUSION is not set
-# CONFIG_FUSION_SPI is not set
-# CONFIG_FUSION_FC is not set
-# CONFIG_FUSION_SAS is not set
-
-#
-# IEEE 1394 (FireWire) support
-#
-# CONFIG_IEEE1394 is not set
-
-#
-# I2O device support
-#
-# CONFIG_I2O is not set
-
-#
-# Network device support
-#
-CONFIG_NETDEVICES=y
-CONFIG_DUMMY=m
-CONFIG_BONDING=m
-CONFIG_EQUALIZER=m
-CONFIG_TUN=m
-
-#
-# ARCnet devices
-#
-# CONFIG_ARCNET is not set
-
-#
-# PHY device support
-#
-CONFIG_PHYLIB=m
-
-#
-# MII PHY device drivers
-#
-CONFIG_MARVELL_PHY=m
-CONFIG_DAVICOM_PHY=m
-CONFIG_QSEMI_PHY=m
-CONFIG_LXT_PHY=m
-CONFIG_CICADA_PHY=m
-CONFIG_VITESSE_PHY=m
-CONFIG_SMSC_PHY=m
-# CONFIG_BROADCOM_PHY is not set
-# CONFIG_FIXED_PHY is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-CONFIG_MII=y
-# CONFIG_HAPPYMEAL is not set
-# CONFIG_SUNGEM is not set
-# CONFIG_CASSINI is not set
-# CONFIG_NET_VENDOR_3COM is not set
-# CONFIG_DM9000 is not set
-
-#
-# Tulip family network device support
-#
-# CONFIG_NET_TULIP is not set
-# CONFIG_HP100 is not set
-CONFIG_NET_PCI=y
-CONFIG_PCNET32=y
-# CONFIG_PCNET32_NAPI is not set
-# CONFIG_AMD8111_ETH is not set
-# CONFIG_ADAPTEC_STARFIRE is not set
-# CONFIG_B44 is not set
-# CONFIG_FORCEDETH is not set
-# CONFIG_DGRS is not set
-# CONFIG_EEPRO100 is not set
-# CONFIG_E100 is not set
-# CONFIG_FEALNX is not set
-# CONFIG_NATSEMI is not set
-# CONFIG_NE2K_PCI is not set
-# CONFIG_8139CP is not set
-# CONFIG_8139TOO is not set
-# CONFIG_SIS900 is not set
-# CONFIG_EPIC100 is not set
-# CONFIG_SUNDANCE is not set
-# CONFIG_TLAN is not set
-# CONFIG_VIA_RHINE is not set
-CONFIG_LAN_SAA9730=y
-# CONFIG_SC92031 is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-# CONFIG_ACENIC is not set
-# CONFIG_DL2K is not set
-# CONFIG_E1000 is not set
-# CONFIG_NS83820 is not set
-# CONFIG_HAMACHI is not set
-# CONFIG_YELLOWFIN is not set
-# CONFIG_R8169 is not set
-# CONFIG_SIS190 is not set
-# CONFIG_SKGE is not set
-# CONFIG_SKY2 is not set
-# CONFIG_SK98LIN is not set
-# CONFIG_VIA_VELOCITY is not set
-# CONFIG_TIGON3 is not set
-# CONFIG_BNX2 is not set
-CONFIG_QLA3XXX=m
-# CONFIG_ATL1 is not set
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_CHELSIO_T1 is not set
-CONFIG_CHELSIO_T3=m
-# CONFIG_IXGB is not set
-# CONFIG_S2IO is not set
-# CONFIG_MYRI10GE is not set
-CONFIG_NETXEN_NIC=m
-
-#
-# Token Ring devices
-#
-# CONFIG_TR is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-# CONFIG_FDDI is not set
-# CONFIG_HIPPI is not set
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-# CONFIG_NET_FC is not set
-# CONFIG_SHAPER is not set
-# CONFIG_NETCONSOLE is not set
-# CONFIG_NETPOLL is not set
-# CONFIG_NET_POLL_CONTROLLER is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-# CONFIG_INPUT_FF_MEMLESS is not set
-
-#
-# Userland interfaces
-#
-CONFIG_INPUT_MOUSEDEV=m
-CONFIG_INPUT_MOUSEDEV_PSAUX=y
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input Device Drivers
-#
-# CONFIG_INPUT_KEYBOARD is not set
-CONFIG_INPUT_MOUSE=y
-# CONFIG_MOUSE_PS2 is not set
-CONFIG_MOUSE_SERIAL=m
-# CONFIG_MOUSE_VSXXXAA is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Hardware I/O ports
-#
-CONFIG_SERIO=y
-# CONFIG_SERIO_I8042 is not set
-CONFIG_SERIO_SERPORT=y
-# CONFIG_SERIO_PCIPS2 is not set
-CONFIG_SERIO_LIBPS2=y
-CONFIG_SERIO_RAW=y
-# CONFIG_GAMEPORT is not set
-
-#
-# Character devices
-#
-CONFIG_VT=y
-CONFIG_VT_CONSOLE=y
-CONFIG_HW_CONSOLE=y
-CONFIG_VT_HW_CONSOLE_BINDING=y
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_8250_PCI=m
-CONFIG_SERIAL_8250_NR_UARTS=4
-CONFIG_SERIAL_8250_RUNTIME_UARTS=4
-# CONFIG_SERIAL_8250_EXTENDED is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-# CONFIG_SERIAL_JSM is not set
-CONFIG_UNIX98_PTYS=y
-CONFIG_LEGACY_PTYS=y
-CONFIG_LEGACY_PTY_COUNT=256
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_HW_RANDOM is not set
-# CONFIG_RTC is not set
-# CONFIG_GEN_RTC is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-
-#
-# TPM devices
-#
-# CONFIG_TCG_TPM is not set
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# SPI support
-#
-# CONFIG_SPI is not set
-# CONFIG_SPI_MASTER is not set
-
-#
-# Dallas's 1-wire bus
-#
-# CONFIG_W1 is not set
-
-#
-# Hardware Monitoring support
-#
-# CONFIG_HWMON is not set
-# CONFIG_HWMON_VID is not set
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# Graphics support
-#
-# CONFIG_FIRMWARE_EDID is not set
-# CONFIG_FB is not set
-
-#
-# Console display driver support
-#
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_DUMMY_CONSOLE=y
-# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# HID Devices
-#
-CONFIG_HID=y
-# CONFIG_HID_DEBUG is not set
-
-#
-# USB support
-#
-CONFIG_USB_ARCH_HAS_HCD=y
-CONFIG_USB_ARCH_HAS_OHCI=y
-CONFIG_USB_ARCH_HAS_EHCI=y
-# CONFIG_USB is not set
-
-#
-# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
-#
-
-#
-# USB Gadget Support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# MMC/SD Card support
-#
-# CONFIG_MMC is not set
-
-#
-# LED devices
-#
-# CONFIG_NEW_LEDS is not set
-
-#
-# LED drivers
-#
-
-#
-# LED Triggers
-#
-
-#
-# InfiniBand support
-#
-# CONFIG_INFINIBAND is not set
-
-#
-# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
-#
-
-#
-# Real Time Clock
-#
-# CONFIG_RTC_CLASS is not set
-
-#
-# DMA Engine support
-#
-# CONFIG_DMA_ENGINE is not set
-
-#
-# DMA Clients
-#
-
-#
-# DMA Devices
-#
-
-#
-# Auxiliary Display support
-#
-
-#
-# Virtualization
-#
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-# CONFIG_EXT2_FS_XATTR is not set
-# CONFIG_EXT2_FS_XIP is not set
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_XATTR=y
-# CONFIG_EXT3_FS_POSIX_ACL is not set
-# CONFIG_EXT3_FS_SECURITY is not set
-# CONFIG_EXT4DEV_FS is not set
-CONFIG_JBD=y
-# CONFIG_JBD_DEBUG is not set
-CONFIG_FS_MBCACHE=y
-CONFIG_REISERFS_FS=m
-# CONFIG_REISERFS_CHECK is not set
-CONFIG_REISERFS_PROC_INFO=y
-CONFIG_REISERFS_FS_XATTR=y
-CONFIG_REISERFS_FS_POSIX_ACL=y
-CONFIG_REISERFS_FS_SECURITY=y
-CONFIG_JFS_FS=m
-CONFIG_JFS_POSIX_ACL=y
-CONFIG_JFS_SECURITY=y
-# CONFIG_JFS_DEBUG is not set
-# CONFIG_JFS_STATISTICS is not set
-CONFIG_FS_POSIX_ACL=y
-CONFIG_XFS_FS=m
-CONFIG_XFS_QUOTA=y
-CONFIG_XFS_SECURITY=y
-CONFIG_XFS_POSIX_ACL=y
-# CONFIG_XFS_RT is not set
-# CONFIG_GFS2_FS is not set
-# CONFIG_OCFS2_FS is not set
-CONFIG_MINIX_FS=m
-CONFIG_ROMFS_FS=m
-CONFIG_INOTIFY=y
-CONFIG_INOTIFY_USER=y
-CONFIG_QUOTA=y
-# CONFIG_QFMT_V1 is not set
-CONFIG_QFMT_V2=y
-CONFIG_QUOTACTL=y
-CONFIG_DNOTIFY=y
-CONFIG_AUTOFS_FS=y
-# CONFIG_AUTOFS4_FS is not set
-CONFIG_FUSE_FS=m
-CONFIG_GENERIC_ACL=y
-
-#
-# CD-ROM/DVD Filesystems
-#
-CONFIG_ISO9660_FS=m
-CONFIG_JOLIET=y
-CONFIG_ZISOFS=y
-CONFIG_UDF_FS=m
-CONFIG_UDF_NLS=y
-
-#
-# DOS/FAT/NT Filesystems
-#
-CONFIG_FAT_FS=m
-CONFIG_MSDOS_FS=m
-CONFIG_VFAT_FS=m
-CONFIG_FAT_DEFAULT_CODEPAGE=437
-CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-CONFIG_PROC_KCORE=y
-CONFIG_PROC_SYSCTL=y
-CONFIG_SYSFS=y
-CONFIG_TMPFS=y
-CONFIG_TMPFS_POSIX_ACL=y
-# CONFIG_HUGETLB_PAGE is not set
-CONFIG_RAMFS=y
-CONFIG_CONFIGFS_FS=m
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-CONFIG_AFFS_FS=m
-CONFIG_HFS_FS=m
-CONFIG_HFSPLUS_FS=m
-CONFIG_BEFS_FS=m
-# CONFIG_BEFS_DEBUG is not set
-CONFIG_BFS_FS=m
-CONFIG_EFS_FS=m
-CONFIG_CRAMFS=m
-CONFIG_VXFS_FS=m
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-CONFIG_SYSV_FS=m
-CONFIG_UFS_FS=m
-# CONFIG_UFS_FS_WRITE is not set
-# CONFIG_UFS_DEBUG is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-# CONFIG_NFS_V3_ACL is not set
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFS_DIRECTIO is not set
-CONFIG_NFSD=y
-CONFIG_NFSD_V3=y
-# CONFIG_NFSD_V3_ACL is not set
-# CONFIG_NFSD_V4 is not set
-# CONFIG_NFSD_TCP is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-CONFIG_LOCKD_V4=y
-CONFIG_EXPORTFS=y
-CONFIG_NFS_COMMON=y
-CONFIG_SUNRPC=y
-# CONFIG_RPCSEC_GSS_KRB5 is not set
-# CONFIG_RPCSEC_GSS_SPKM3 is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_AFS_FS is not set
-# CONFIG_9P_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-
-#
-# Native Language Support
-#
-CONFIG_NLS=m
-CONFIG_NLS_DEFAULT="iso8859-1"
-CONFIG_NLS_CODEPAGE_437=m
-CONFIG_NLS_CODEPAGE_737=m
-CONFIG_NLS_CODEPAGE_775=m
-CONFIG_NLS_CODEPAGE_850=m
-CONFIG_NLS_CODEPAGE_852=m
-CONFIG_NLS_CODEPAGE_855=m
-CONFIG_NLS_CODEPAGE_857=m
-CONFIG_NLS_CODEPAGE_860=m
-CONFIG_NLS_CODEPAGE_861=m
-CONFIG_NLS_CODEPAGE_862=m
-CONFIG_NLS_CODEPAGE_863=m
-CONFIG_NLS_CODEPAGE_864=m
-CONFIG_NLS_CODEPAGE_865=m
-CONFIG_NLS_CODEPAGE_866=m
-CONFIG_NLS_CODEPAGE_869=m
-CONFIG_NLS_CODEPAGE_936=m
-CONFIG_NLS_CODEPAGE_950=m
-CONFIG_NLS_CODEPAGE_932=m
-CONFIG_NLS_CODEPAGE_949=m
-CONFIG_NLS_CODEPAGE_874=m
-CONFIG_NLS_ISO8859_8=m
-CONFIG_NLS_CODEPAGE_1250=m
-CONFIG_NLS_CODEPAGE_1251=m
-CONFIG_NLS_ASCII=m
-CONFIG_NLS_ISO8859_1=m
-CONFIG_NLS_ISO8859_2=m
-CONFIG_NLS_ISO8859_3=m
-CONFIG_NLS_ISO8859_4=m
-CONFIG_NLS_ISO8859_5=m
-CONFIG_NLS_ISO8859_6=m
-CONFIG_NLS_ISO8859_7=m
-CONFIG_NLS_ISO8859_9=m
-CONFIG_NLS_ISO8859_13=m
-CONFIG_NLS_ISO8859_14=m
-CONFIG_NLS_ISO8859_15=m
-CONFIG_NLS_KOI8_R=m
-CONFIG_NLS_KOI8_U=m
-CONFIG_NLS_UTF8=m
-
-#
-# Distributed Lock Manager
-#
-CONFIG_DLM=m
-CONFIG_DLM_TCP=y
-# CONFIG_DLM_SCTP is not set
-# CONFIG_DLM_DEBUG is not set
-
-#
-# Profiling support
-#
-# CONFIG_PROFILING is not set
-
-#
-# Kernel hacking
-#
-CONFIG_TRACE_IRQFLAGS_SUPPORT=y
-# CONFIG_PRINTK_TIME is not set
-CONFIG_ENABLE_MUST_CHECK=y
-# CONFIG_MAGIC_SYSRQ is not set
-# CONFIG_UNUSED_SYMBOLS is not set
-# CONFIG_DEBUG_FS is not set
-# CONFIG_HEADERS_CHECK is not set
-# CONFIG_DEBUG_KERNEL is not set
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_CROSSCOMPILE=y
-CONFIG_CMDLINE=""
-
-#
-# Security options
-#
-# CONFIG_KEYS is not set
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-CONFIG_CRYPTO=y
-CONFIG_CRYPTO_ALGAPI=y
-CONFIG_CRYPTO_BLKCIPHER=m
-CONFIG_CRYPTO_HASH=y
-CONFIG_CRYPTO_MANAGER=y
-CONFIG_CRYPTO_HMAC=y
-CONFIG_CRYPTO_XCBC=m
-CONFIG_CRYPTO_NULL=m
-CONFIG_CRYPTO_MD4=m
-CONFIG_CRYPTO_MD5=y
-CONFIG_CRYPTO_SHA1=m
-CONFIG_CRYPTO_SHA256=m
-CONFIG_CRYPTO_SHA512=m
-CONFIG_CRYPTO_WP512=m
-CONFIG_CRYPTO_TGR192=m
-CONFIG_CRYPTO_GF128MUL=m
-CONFIG_CRYPTO_ECB=m
-CONFIG_CRYPTO_CBC=m
-CONFIG_CRYPTO_PCBC=m
-CONFIG_CRYPTO_LRW=m
-CONFIG_CRYPTO_DES=m
-CONFIG_CRYPTO_FCRYPT=m
-CONFIG_CRYPTO_BLOWFISH=m
-CONFIG_CRYPTO_TWOFISH=m
-CONFIG_CRYPTO_TWOFISH_COMMON=m
-CONFIG_CRYPTO_SERPENT=m
-CONFIG_CRYPTO_AES=m
-CONFIG_CRYPTO_CAST5=m
-CONFIG_CRYPTO_CAST6=m
-CONFIG_CRYPTO_TEA=m
-CONFIG_CRYPTO_ARC4=m
-CONFIG_CRYPTO_KHAZAD=m
-CONFIG_CRYPTO_ANUBIS=m
-CONFIG_CRYPTO_DEFLATE=m
-CONFIG_CRYPTO_MICHAEL_MIC=m
-CONFIG_CRYPTO_CRC32C=m
-CONFIG_CRYPTO_CAMELLIA=m
-# CONFIG_CRYPTO_TEST is not set
-
-#
-# Hardware crypto devices
-#
-
-#
-# Library routines
-#
-CONFIG_BITREVERSE=y
-# CONFIG_CRC_CCITT is not set
-CONFIG_CRC16=m
-CONFIG_CRC32=y
-CONFIG_LIBCRC32C=m
-CONFIG_ZLIB_INFLATE=m
-CONFIG_ZLIB_DEFLATE=m
-CONFIG_TEXTSEARCH=y
-CONFIG_TEXTSEARCH_KMP=m
-CONFIG_TEXTSEARCH_BM=m
-CONFIG_TEXTSEARCH_FSM=m
-CONFIG_PLIST=y
-CONFIG_HAS_IOMEM=y
-CONFIG_HAS_IOPORT=y
# CONFIG_MACH_JAZZ is not set
# CONFIG_LASAT is not set
# CONFIG_LEMOTE_FULONG is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MARKEINS is not set
# CONFIG_MACH_VR41XX is not set
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.25-rc7
-# Mon Mar 31 08:11:19 2008
+# Linux kernel version: 2.6.26-rc8
+# Wed Jul 2 17:02:55 2008
#
CONFIG_MIPS=y
# CONFIG_MACH_JAZZ is not set
# CONFIG_LASAT is not set
# CONFIG_LEMOTE_FULONG is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MARKEINS is not set
# CONFIG_MACH_VR41XX is not set
CONFIG_FLAT_NODE_MEM_MAP=y
# CONFIG_SPARSEMEM_STATIC is not set
# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
+CONFIG_PAGEFLAGS_EXTENDED=y
CONFIG_SPLIT_PTLOCK_CPUS=4
CONFIG_RESOURCES_64BIT=y
CONFIG_ZONE_DMA_FLAG=0
CONFIG_SYS_SUPPORTS_SMP=y
CONFIG_NR_CPUS_DEFAULT_4=y
CONFIG_NR_CPUS=4
+# CONFIG_MIPS_CMP is not set
CONFIG_TICK_ONESHOT=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_PRINTK=y
CONFIG_BUG=y
CONFIG_ELF_CORE=y
+# CONFIG_PCSPKR_PLATFORM is not set
CONFIG_COMPAT_BRK=y
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_HAVE_OPROFILE=y
# CONFIG_HAVE_KPROBES is not set
# CONFIG_HAVE_KRETPROBES is not set
+# CONFIG_HAVE_DMA_ATTRS is not set
CONFIG_PROC_PAGE_MONITOR=y
CONFIG_SLABINFO=y
CONFIG_RT_MUTEXES=y
# CONFIG_TINY_SHMEM is not set
CONFIG_BASE_SMALL=0
CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
CONFIG_MODULE_UNLOAD=y
# CONFIG_MODULE_FORCE_UNLOAD is not set
CONFIG_MODVERSIONS=y
# Power management options
#
CONFIG_PM=y
-# CONFIG_PM_LEGACY is not set
# CONFIG_PM_DEBUG is not set
#
CONFIG_INET6_XFRM_MODE_BEET=m
CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m
CONFIG_IPV6_SIT=m
+CONFIG_IPV6_NDISC_NODETYPE=y
CONFIG_IPV6_TUNNEL=m
CONFIG_IPV6_MULTIPLE_TABLES=y
CONFIG_IPV6_SUBTREES=y
+# CONFIG_IPV6_MROUTE is not set
CONFIG_NETWORK_SECMARK=y
CONFIG_NETFILTER=y
# CONFIG_NETFILTER_DEBUG is not set
CONFIG_BLK_DEV_TC86C001=m
# CONFIG_BLK_DEV_IDE_SWARM is not set
CONFIG_BLK_DEV_IDEDMA=y
-CONFIG_IDE_ARCH_OBSOLETE_INIT=y
+# CONFIG_BLK_DEV_HD_ONLY is not set
# CONFIG_BLK_DEV_HD is not set
#
# SCSI support type (disk, tape, CD-ROM)
#
CONFIG_BLK_DEV_SD=y
-# CONFIG_CHR_DEV_ST is not set
+CONFIG_CHR_DEV_ST=m
# CONFIG_CHR_DEV_OSST is not set
-# CONFIG_BLK_DEV_SR is not set
-# CONFIG_CHR_DEV_SG is not set
-# CONFIG_CHR_DEV_SCH is not set
+CONFIG_BLK_DEV_SR=m
+CONFIG_BLK_DEV_SR_VENDOR=y
+CONFIG_CHR_DEV_SG=m
+CONFIG_CHR_DEV_SCH=m
#
# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
# CONFIG_SCSI_AIC7XXX_OLD is not set
# CONFIG_SCSI_AIC79XX is not set
# CONFIG_SCSI_AIC94XX is not set
+# CONFIG_SCSI_DPT_I2O is not set
# CONFIG_SCSI_ADVANSYS is not set
# CONFIG_SCSI_ARCMSR is not set
# CONFIG_MEGARAID_NEWGEN is not set
# CONFIG_SCSI_SRP is not set
CONFIG_ATA=y
# CONFIG_ATA_NONSTANDARD is not set
+CONFIG_SATA_PMP=y
# CONFIG_SATA_AHCI is not set
+CONFIG_SATA_SIL24=y
+CONFIG_ATA_SFF=y
# CONFIG_SATA_SVW is not set
# CONFIG_ATA_PIIX is not set
# CONFIG_SATA_MV is not set
# CONFIG_SATA_PROMISE is not set
# CONFIG_SATA_SX4 is not set
# CONFIG_SATA_SIL is not set
-CONFIG_SATA_SIL24=y
# CONFIG_SATA_SIS is not set
# CONFIG_SATA_ULI is not set
# CONFIG_SATA_VIA is not set
# CONFIG_PATA_VIA is not set
# CONFIG_PATA_WINBOND is not set
# CONFIG_PATA_PLATFORM is not set
+# CONFIG_PATA_SCH is not set
# CONFIG_MD is not set
# CONFIG_FUSION is not set
#
# IEEE 1394 (FireWire) support
#
+
+#
+# Enable only one of the two stacks, unless you know what you are doing
+#
# CONFIG_FIREWIRE is not set
# CONFIG_IEEE1394 is not set
# CONFIG_I2O is not set
# CONFIG_SIS190 is not set
# CONFIG_SKGE is not set
# CONFIG_SKY2 is not set
-# CONFIG_SK98LIN is not set
# CONFIG_VIA_VELOCITY is not set
# CONFIG_TIGON3 is not set
# CONFIG_BNX2 is not set
# CONFIG_MLX4_CORE is not set
# CONFIG_TEHUTI is not set
# CONFIG_BNX2X is not set
+# CONFIG_SFC is not set
# CONFIG_TR is not set
#
#
# CONFIG_WLAN_PRE80211 is not set
# CONFIG_WLAN_80211 is not set
+# CONFIG_IWLWIFI_LEDS is not set
# CONFIG_WAN is not set
# CONFIG_FDDI is not set
# CONFIG_HIPPI is not set
# Character devices
#
# CONFIG_VT is not set
+CONFIG_DEVKMEM=y
CONFIG_SERIAL_NONSTANDARD=y
# CONFIG_COMPUTONE is not set
# CONFIG_ROCKETPORT is not set
CONFIG_LEGACY_PTY_COUNT=256
# CONFIG_IPMI_HANDLER is not set
# CONFIG_HW_RANDOM is not set
-# CONFIG_RTC is not set
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set
# CONFIG_RAW_DRIVER is not set
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_CHARDEV=y
-#
-# I2C Algorithms
-#
-# CONFIG_I2C_ALGOBIT is not set
-# CONFIG_I2C_ALGOPCF is not set
-# CONFIG_I2C_ALGOPCA is not set
-
#
# I2C Hardware Bus support
#
# CONFIG_I2C_VIA is not set
# CONFIG_I2C_VIAPRO is not set
# CONFIG_I2C_VOODOO3 is not set
+# CONFIG_I2C_PCA_PLATFORM is not set
#
# Miscellaneous I2C Chip support
CONFIG_SENSORS_PCF8574=y
# CONFIG_PCF8575 is not set
CONFIG_SENSORS_PCF8591=y
-# CONFIG_TPS65010 is not set
CONFIG_SENSORS_MAX6875=y
# CONFIG_SENSORS_TSL2550 is not set
CONFIG_I2C_DEBUG_CORE=y
CONFIG_I2C_DEBUG_ALGO=y
CONFIG_I2C_DEBUG_BUS=y
CONFIG_I2C_DEBUG_CHIP=y
-
-#
-# SPI support
-#
# CONFIG_SPI is not set
-# CONFIG_SPI_MASTER is not set
# CONFIG_W1 is not set
# CONFIG_POWER_SUPPLY is not set
# CONFIG_HWMON is not set
# CONFIG_THERMAL is not set
+# CONFIG_THERMAL_HWMON is not set
# CONFIG_WATCHDOG is not set
#
# Multifunction device drivers
#
# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
#
# Multimedia devices
#
+
+#
+# Multimedia core support
+#
# CONFIG_VIDEO_DEV is not set
# CONFIG_DVB_CORE is not set
+# CONFIG_VIDEO_MEDIA is not set
+
+#
+# Multimedia drivers
+#
# CONFIG_DAB is not set
#
CONFIG_USB_ARCH_HAS_OHCI=y
CONFIG_USB_ARCH_HAS_EHCI=y
# CONFIG_USB is not set
+# CONFIG_USB_OTG_WHITELIST is not set
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
#
# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
# CONFIG_MMC is not set
# CONFIG_MEMSTICK is not set
# CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
# CONFIG_INFINIBAND is not set
CONFIG_RTC_LIB=y
# CONFIG_RTC_CLASS is not set
-
-#
-# Userspace I/O
-#
# CONFIG_UIO is not set
#
CONFIG_NFS_V3=y
# CONFIG_NFS_V3_ACL is not set
# CONFIG_NFS_V4 is not set
-# CONFIG_NFS_DIRECTIO is not set
# CONFIG_NFSD is not set
CONFIG_ROOT_NFS=y
CONFIG_LOCKD=y
# CONFIG_PRINTK_TIME is not set
CONFIG_ENABLE_WARN_DEPRECATED=y
CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=2048
CONFIG_MAGIC_SYSRQ=y
# CONFIG_UNUSED_SYMBOLS is not set
# CONFIG_DEBUG_FS is not set
CONFIG_SCHED_DEBUG=y
# CONFIG_SCHEDSTATS is not set
# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
# CONFIG_DEBUG_SLAB is not set
# CONFIG_DEBUG_RT_MUTEXES is not set
# CONFIG_RT_MUTEX_TESTER is not set
# CONFIG_DEBUG_KOBJECT is not set
# CONFIG_DEBUG_INFO is not set
# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
# CONFIG_DEBUG_LIST is not set
# CONFIG_DEBUG_SG is not set
# CONFIG_BOOT_PRINTK_DELAY is not set
# CONFIG_SECURITY is not set
# CONFIG_SECURITY_FILE_CAPABILITIES is not set
CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
CONFIG_CRYPTO_ALGAPI=y
CONFIG_CRYPTO_AEAD=m
CONFIG_CRYPTO_BLKCIPHER=y
-CONFIG_CRYPTO_SEQIV=m
CONFIG_CRYPTO_HASH=y
CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_GF128MUL=m
+CONFIG_CRYPTO_NULL=y
+# CONFIG_CRYPTO_CRYPTD is not set
+CONFIG_CRYPTO_AUTHENC=m
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+CONFIG_CRYPTO_CCM=m
+CONFIG_CRYPTO_GCM=m
+CONFIG_CRYPTO_SEQIV=m
+
+#
+# Block modes
+#
+CONFIG_CRYPTO_CBC=m
+CONFIG_CRYPTO_CTR=m
+# CONFIG_CRYPTO_CTS is not set
+CONFIG_CRYPTO_ECB=m
+CONFIG_CRYPTO_LRW=m
+CONFIG_CRYPTO_PCBC=m
+CONFIG_CRYPTO_XTS=m
+
+#
+# Hash modes
+#
CONFIG_CRYPTO_HMAC=y
CONFIG_CRYPTO_XCBC=m
-CONFIG_CRYPTO_NULL=y
+
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
CONFIG_CRYPTO_MD4=m
CONFIG_CRYPTO_MD5=y
+CONFIG_CRYPTO_MICHAEL_MIC=m
CONFIG_CRYPTO_SHA1=m
CONFIG_CRYPTO_SHA256=m
CONFIG_CRYPTO_SHA512=m
-CONFIG_CRYPTO_WP512=m
CONFIG_CRYPTO_TGR192=m
-CONFIG_CRYPTO_GF128MUL=m
-CONFIG_CRYPTO_ECB=m
-CONFIG_CRYPTO_CBC=m
-CONFIG_CRYPTO_PCBC=m
-CONFIG_CRYPTO_LRW=m
-CONFIG_CRYPTO_XTS=m
-CONFIG_CRYPTO_CTR=m
-CONFIG_CRYPTO_GCM=m
-CONFIG_CRYPTO_CCM=m
-# CONFIG_CRYPTO_CRYPTD is not set
-CONFIG_CRYPTO_DES=m
-CONFIG_CRYPTO_FCRYPT=m
-CONFIG_CRYPTO_BLOWFISH=m
-CONFIG_CRYPTO_TWOFISH=m
-CONFIG_CRYPTO_TWOFISH_COMMON=m
-CONFIG_CRYPTO_SERPENT=m
+CONFIG_CRYPTO_WP512=m
+
+#
+# Ciphers
+#
CONFIG_CRYPTO_AES=m
+CONFIG_CRYPTO_ANUBIS=m
+CONFIG_CRYPTO_ARC4=m
+CONFIG_CRYPTO_BLOWFISH=m
+CONFIG_CRYPTO_CAMELLIA=m
CONFIG_CRYPTO_CAST5=m
CONFIG_CRYPTO_CAST6=m
-CONFIG_CRYPTO_TEA=m
-CONFIG_CRYPTO_ARC4=m
+CONFIG_CRYPTO_DES=m
+CONFIG_CRYPTO_FCRYPT=m
CONFIG_CRYPTO_KHAZAD=m
-CONFIG_CRYPTO_ANUBIS=m
-CONFIG_CRYPTO_SEED=m
CONFIG_CRYPTO_SALSA20=m
+CONFIG_CRYPTO_SEED=m
+CONFIG_CRYPTO_SERPENT=m
+CONFIG_CRYPTO_TEA=m
+CONFIG_CRYPTO_TWOFISH=m
+CONFIG_CRYPTO_TWOFISH_COMMON=m
+
+#
+# Compression
+#
CONFIG_CRYPTO_DEFLATE=m
-CONFIG_CRYPTO_MICHAEL_MIC=m
-# CONFIG_CRYPTO_CRC32C is not set
-CONFIG_CRYPTO_CAMELLIA=m
-# CONFIG_CRYPTO_TEST is not set
-CONFIG_CRYPTO_AUTHENC=m
# CONFIG_CRYPTO_LZO is not set
CONFIG_CRYPTO_HW=y
# CONFIG_CRYPTO_DEV_HIFN_795X is not set
# Library routines
#
CONFIG_BITREVERSE=y
+# CONFIG_GENERIC_FIND_FIRST_BIT is not set
CONFIG_CRC_CCITT=m
# CONFIG_CRC16 is not set
-# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC_ITU_T=m
CONFIG_CRC32=y
# CONFIG_CRC7 is not set
CONFIG_LIBCRC32C=m
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_LEMOTE_FULONG is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MARKEINS is not set
CONFIG_MACH_VR41XX=y
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_LEMOTE_FULONG is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MARKEINS is not set
# CONFIG_MACH_VR41XX is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
# CONFIG_WR_PPMC is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
# CONFIG_WR_PPMC is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
# CONFIG_WR_PPMC is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
# CONFIG_WR_PPMC is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
# CONFIG_WR_PPMC is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_MIPS_COBALT is not set
CONFIG_MACH_DECSTATION=y
# CONFIG_MACH_JAZZ is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
# CONFIG_WR_PPMC is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_LEMOTE_FULONG is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MARKEINS is not set
CONFIG_MACH_VR41XX=y
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
# CONFIG_WR_PPMC is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
# CONFIG_WR_PPMC is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
# CONFIG_WR_PPMC is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_PNX8550_JBS is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_LEMOTE_FULONG is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MARKEINS is not set
# CONFIG_MACH_VR41XX is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_LEMOTE_FULONG is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MARKEINS is not set
# CONFIG_MACH_VR41XX is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_LASAT is not set
# CONFIG_LEMOTE_FULONG is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MARKEINS is not set
# CONFIG_MACH_VR41XX is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
# CONFIG_WR_PPMC is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
CONFIG_MACH_JAZZ=y
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
# CONFIG_WR_PPMC is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.23-rc1
-# Thu Aug 2 23:07:36 2007
+# Linux kernel version: 2.6.26-rc9
+# Fri Jul 11 23:01:36 2008
#
CONFIG_MIPS=y
#
# CONFIG_MACH_ALCHEMY is not set
# CONFIG_BASLER_EXCITE is not set
+# CONFIG_BCM47XX is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
+# CONFIG_LASAT is not set
# CONFIG_LEMOTE_FULONG is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MARKEINS is not set
# CONFIG_MACH_VR41XX is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_SGI_IP22 is not set
# CONFIG_SGI_IP27 is not set
+# CONFIG_SGI_IP28 is not set
# CONFIG_SGI_IP32 is not set
# CONFIG_SIBYTE_CRHINE is not set
# CONFIG_SIBYTE_CARMEL is not set
# CONFIG_SIBYTE_SENTOSA is not set
# CONFIG_SIBYTE_BIGSUR is not set
# CONFIG_SNI_RM is not set
-CONFIG_TOSHIBA_JMR3927=y
-# CONFIG_TOSHIBA_RBTX4927 is not set
-# CONFIG_TOSHIBA_RBTX4938 is not set
+CONFIG_MACH_TX39XX=y
+# CONFIG_MACH_TX49XX is not set
# CONFIG_WR_PPMC is not set
+CONFIG_TOSHIBA_JMR3927=y
+CONFIG_SOC_TX3927=y
+# CONFIG_TOSHIBA_FPCIB0 is not set
+CONFIG_PICMG_PCI_BACKPLANE_DEFAULT=y
CONFIG_RWSEM_GENERIC_SPINLOCK=y
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_ARCH_SUPPORTS_OPROFILE=y
CONFIG_GENERIC_FIND_NEXT_BIT=y
CONFIG_GENERIC_HWEIGHT=y
CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CMOS_UPDATE=y
CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_CEVT_TXX9=y
+CONFIG_GPIO_TXX9=y
CONFIG_DMA_NONCOHERENT=y
CONFIG_DMA_NEED_PCI_MAP_STATE=y
+# CONFIG_HOTPLUG_CPU is not set
# CONFIG_NO_IOPORT is not set
+CONFIG_GENERIC_GPIO=y
CONFIG_CPU_BIG_ENDIAN=y
# CONFIG_CPU_LITTLE_ENDIAN is not set
CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
CONFIG_IRQ_TXX9=y
-CONFIG_MIPS_TX3927=y
CONFIG_SWAP_IO_SPACE=y
CONFIG_MIPS_L1_CACHE_SHIFT=5
CONFIG_GENERIC_HARDIRQS=y
CONFIG_GENERIC_IRQ_PROBE=y
CONFIG_ARCH_FLATMEM_ENABLE=y
+CONFIG_ARCH_POPULATES_NODE_MAP=y
CONFIG_FLATMEM=y
CONFIG_FLAT_NODE_MEM_MAP=y
# CONFIG_SPARSEMEM_STATIC is not set
+# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
+CONFIG_PAGEFLAGS_EXTENDED=y
CONFIG_SPLIT_PTLOCK_CPUS=4
# CONFIG_RESOURCES_64BIT is not set
CONFIG_ZONE_DMA_FLAG=0
CONFIG_VIRT_TO_BUS=y
+# CONFIG_TICK_ONESHOT is not set
+# CONFIG_NO_HZ is not set
+# CONFIG_HIGH_RES_TIMERS is not set
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
# CONFIG_HZ_48 is not set
# CONFIG_HZ_100 is not set
# CONFIG_HZ_128 is not set
# CONFIG_AUDIT is not set
# CONFIG_IKCONFIG is not set
CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_CGROUPS is not set
CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
# CONFIG_RELAY is not set
+# CONFIG_NAMESPACES is not set
# CONFIG_BLK_DEV_INITRD is not set
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_SYSCTL=y
CONFIG_EMBEDDED=y
CONFIG_SYSCTL_SYSCALL=y
+CONFIG_SYSCTL_SYSCALL_CHECK=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
# CONFIG_HOTPLUG is not set
CONFIG_PRINTK=y
CONFIG_BUG=y
CONFIG_ELF_CORE=y
+# CONFIG_PCSPKR_PLATFORM is not set
+CONFIG_COMPAT_BRK=y
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_ANON_INODES=y
CONFIG_SLAB=y
# CONFIG_SLUB is not set
# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_HAVE_KPROBES is not set
+# CONFIG_HAVE_KRETPROBES is not set
+# CONFIG_HAVE_DMA_ATTRS is not set
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SLABINFO=y
CONFIG_RT_MUTEXES=y
# CONFIG_TINY_SHMEM is not set
CONFIG_BASE_SMALL=0
CONFIG_DEFAULT_CFQ=y
# CONFIG_DEFAULT_NOOP is not set
CONFIG_DEFAULT_IOSCHED="cfq"
+CONFIG_CLASSIC_RCU=y
#
# Bus options (PCI, PCMCIA, EISA, ISA, TC)
#
CONFIG_HW_HAS_PCI=y
CONFIG_PCI=y
+CONFIG_PCI_DOMAINS=y
# CONFIG_ARCH_SUPPORTS_MSI is not set
+CONFIG_PCI_LEGACY=y
CONFIG_MMU=y
-#
-# PCCARD (PCMCIA/CardBus) support
-#
-
#
# Executable file formats
#
#
# Power management options
#
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
# CONFIG_PM is not set
#
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
# CONFIG_INET_DIAG is not set
# CONFIG_TCP_CONG_ADVANCED is not set
CONFIG_TCP_CONG_CUBIC=y
CONFIG_DEFAULT_TCP_CONG="cubic"
# CONFIG_IPV6 is not set
-# CONFIG_INET6_XFRM_TUNNEL is not set
-# CONFIG_INET6_TUNNEL is not set
# CONFIG_NETWORK_SECMARK is not set
# CONFIG_NETFILTER is not set
+# CONFIG_ATM is not set
# CONFIG_BRIDGE is not set
# CONFIG_VLAN_8021Q is not set
# CONFIG_DECNET is not set
# CONFIG_LLC2 is not set
# CONFIG_IPX is not set
# CONFIG_ATALK is not set
-
-#
-# QoS and/or fair queueing
-#
# CONFIG_NET_SCHED is not set
#
#
# CONFIG_NET_PKTGEN is not set
# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
# CONFIG_IRDA is not set
# CONFIG_BT is not set
#
# CONFIG_CFG80211 is not set
# CONFIG_WIRELESS_EXT is not set
+# CONFIG_MAC80211 is not set
# CONFIG_IEEE80211 is not set
# CONFIG_RFKILL is not set
# CONFIG_CDROM_PKTCDVD is not set
# CONFIG_ATA_OVER_ETH is not set
# CONFIG_MISC_DEVICES is not set
+CONFIG_HAVE_IDE=y
# CONFIG_IDE is not set
#
# CONFIG_SCSI_NETLINK is not set
# CONFIG_ATA is not set
# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
# CONFIG_FUSION is not set
#
#
#
-# An alternative FireWire stack is available with EXPERIMENTAL=y
+# A new alternative FireWire stack is available with EXPERIMENTAL=y
#
# CONFIG_IEEE1394 is not set
# CONFIG_I2O is not set
# CONFIG_BONDING is not set
# CONFIG_EQUALIZER is not set
# CONFIG_TUN is not set
+# CONFIG_VETH is not set
# CONFIG_ARCNET is not set
-# CONFIG_PHYLIB is not set
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_REALTEK_PHY is not set
+# CONFIG_FIXED_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
CONFIG_NET_ETHERNET=y
-CONFIG_MII=y
+# CONFIG_MII is not set
# CONFIG_AX88796 is not set
# CONFIG_HAPPYMEAL is not set
# CONFIG_SUNGEM is not set
# CONFIG_DM9000 is not set
# CONFIG_NET_TULIP is not set
# CONFIG_HP100 is not set
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
CONFIG_NET_PCI=y
# CONFIG_PCNET32 is not set
# CONFIG_AMD8111_ETH is not set
# CONFIG_B44 is not set
# CONFIG_FORCEDETH is not set
CONFIG_TC35815=y
-# CONFIG_DGRS is not set
# CONFIG_EEPRO100 is not set
# CONFIG_E100 is not set
# CONFIG_FEALNX is not set
# CONFIG_NATSEMI is not set
# CONFIG_NE2K_PCI is not set
# CONFIG_8139TOO is not set
+# CONFIG_R6040 is not set
# CONFIG_SIS900 is not set
# CONFIG_EPIC100 is not set
# CONFIG_SUNDANCE is not set
#
# CONFIG_WLAN_PRE80211 is not set
# CONFIG_WLAN_80211 is not set
+# CONFIG_IWLWIFI_LEDS is not set
# CONFIG_WAN is not set
# CONFIG_FDDI is not set
# CONFIG_PPP is not set
#
# CONFIG_INPUT_MOUSEDEV is not set
# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
# CONFIG_INPUT_EVDEV is not set
# CONFIG_INPUT_EVBUG is not set
# Character devices
#
# CONFIG_VT is not set
+CONFIG_DEVKMEM=y
CONFIG_SERIAL_NONSTANDARD=y
# CONFIG_COMPUTONE is not set
# CONFIG_ROCKETPORT is not set
# CONFIG_DIGIEPCA is not set
# CONFIG_MOXA_INTELLIO is not set
# CONFIG_MOXA_SMARTIO is not set
-# CONFIG_MOXA_SMARTIO_NEW is not set
# CONFIG_ISI is not set
# CONFIG_SYNCLINKMP is not set
# CONFIG_SYNCLINK_GT is not set
CONFIG_LEGACY_PTY_COUNT=256
# CONFIG_IPMI_HANDLER is not set
# CONFIG_HW_RANDOM is not set
-# CONFIG_RTC is not set
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set
-# CONFIG_DRM is not set
# CONFIG_RAW_DRIVER is not set
CONFIG_DEVPORT=y
# CONFIG_I2C is not set
+# CONFIG_SPI is not set
+CONFIG_HAVE_GPIO_LIB=y
#
-# SPI support
+# GPIO Support
+#
+
+#
+# I2C GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
#
-# CONFIG_SPI is not set
-# CONFIG_SPI_MASTER is not set
# CONFIG_W1 is not set
# CONFIG_POWER_SUPPLY is not set
# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_THERMAL_HWMON is not set
CONFIG_WATCHDOG=y
# CONFIG_WATCHDOG_NOWAYOUT is not set
# CONFIG_PCIPCWATCHDOG is not set
# CONFIG_WDTPCI is not set
+#
+# Sonics Silicon Backplane
+#
+CONFIG_SSB_POSSIBLE=y
+# CONFIG_SSB is not set
+
#
# Multifunction device drivers
#
# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
#
# Multimedia devices
#
+
+#
+# Multimedia core support
+#
# CONFIG_VIDEO_DEV is not set
# CONFIG_DVB_CORE is not set
+# CONFIG_VIDEO_MEDIA is not set
+
+#
+# Multimedia drivers
+#
# CONFIG_DAB is not set
#
# Graphics support
#
+# CONFIG_DRM is not set
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+# CONFIG_FB is not set
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
#
# Display device support
#
# CONFIG_DISPLAY_SUPPORT is not set
-# CONFIG_VGASTATE is not set
-# CONFIG_VIDEO_OUTPUT_CONTROL is not set
-# CONFIG_FB is not set
#
# Sound
# CONFIG_HID_SUPPORT is not set
# CONFIG_USB_SUPPORT is not set
# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
# CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
# CONFIG_INFINIBAND is not set
CONFIG_RTC_LIB=y
CONFIG_RTC_CLASS=y
# Platform RTC drivers
#
# CONFIG_RTC_DRV_CMOS is not set
+# CONFIG_RTC_DRV_DS1511 is not set
# CONFIG_RTC_DRV_DS1553 is not set
-# CONFIG_RTC_DRV_STK17TA8 is not set
CONFIG_RTC_DRV_DS1742=y
+# CONFIG_RTC_DRV_STK17TA8 is not set
# CONFIG_RTC_DRV_M48T86 is not set
# CONFIG_RTC_DRV_M48T59 is not set
# CONFIG_RTC_DRV_V3020 is not set
#
# on-CPU RTC drivers
#
-
-#
-# DMA Engine support
-#
-# CONFIG_DMA_ENGINE is not set
-
-#
-# DMA Clients
-#
-
-#
-# DMA Devices
-#
-
-#
-# Userspace I/O
-#
# CONFIG_UIO is not set
#
# CONFIG_FS_POSIX_ACL is not set
# CONFIG_XFS_FS is not set
# CONFIG_OCFS2_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
+CONFIG_DNOTIFY=y
CONFIG_INOTIFY=y
CONFIG_INOTIFY_USER=y
# CONFIG_QUOTA is not set
-CONFIG_DNOTIFY=y
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
# CONFIG_FUSE_FS is not set
CONFIG_SYSFS=y
# CONFIG_TMPFS is not set
# CONFIG_HUGETLB_PAGE is not set
-CONFIG_RAMFS=y
+# CONFIG_CONFIGFS_FS is not set
#
# Miscellaneous filesystems
# CONFIG_HFSPLUS_FS is not set
# CONFIG_CRAMFS is not set
# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
# CONFIG_HPFS_FS is not set
# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
# CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
+CONFIG_NETWORK_FILESYSTEMS=y
CONFIG_NFS_FS=y
# CONFIG_NFS_V3 is not set
-# CONFIG_NFS_DIRECTIO is not set
# CONFIG_NFSD is not set
CONFIG_ROOT_NFS=y
CONFIG_LOCKD=y
#
# CONFIG_PARTITION_ADVANCED is not set
CONFIG_MSDOS_PARTITION=y
-
-#
-# Native Language Support
-#
# CONFIG_NLS is not set
#
#
CONFIG_TRACE_IRQFLAGS_SUPPORT=y
# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
# CONFIG_MAGIC_SYSRQ is not set
# CONFIG_UNUSED_SYMBOLS is not set
# CONFIG_DEBUG_FS is not set
# CONFIG_HEADERS_CHECK is not set
# CONFIG_DEBUG_KERNEL is not set
-CONFIG_CROSSCOMPILE=y
+# CONFIG_SAMPLES is not set
CONFIG_CMDLINE=""
#
# Library routines
#
CONFIG_BITREVERSE=y
+# CONFIG_GENERIC_FIND_FIRST_BIT is not set
# CONFIG_CRC_CCITT is not set
# CONFIG_CRC16 is not set
# CONFIG_CRC_ITU_T is not set
# CONFIG_MACH_JAZZ is not set
CONFIG_LASAT=y
# CONFIG_LEMOTE_FULONG is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MARKEINS is not set
# CONFIG_MACH_VR41XX is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_LEMOTE_FULONG is not set
-# CONFIG_MIPS_ATLAS is not set
CONFIG_MIPS_MALTA=y
-# CONFIG_MIPS_SEAD is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MARKEINS is not set
# CONFIG_MACH_VR41XX is not set
CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
CONFIG_IRQ_CPU=y
-CONFIG_MIPS_BOARDS_GEN=y
CONFIG_PCI_GT64XXX_PCI0=y
CONFIG_SWAP_IO_SPACE=y
CONFIG_BOOT_ELF32=y
# CONFIG_MACH_JAZZ is not set
# CONFIG_LASAT is not set
# CONFIG_LEMOTE_FULONG is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
CONFIG_MIPS_SIM=y
# CONFIG_MARKEINS is not set
# CONFIG_MACH_VR41XX is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_LEMOTE_FULONG is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MARKEINS is not set
CONFIG_MACH_VR41XX=y
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
# CONFIG_WR_PPMC is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_LEMOTE_FULONG is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MARKEINS is not set
# CONFIG_MACH_VR41XX is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
# CONFIG_WR_PPMC is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
# CONFIG_WR_PPMC is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
# CONFIG_WR_PPMC is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
# CONFIG_WR_PPMC is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
# CONFIG_WR_PPMC is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
+++ /dev/null
-#
-# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.23-rc1
-# Thu Aug 2 22:55:57 2007
-#
-CONFIG_MIPS=y
-
-#
-# Machine selection
-#
-# CONFIG_MACH_ALCHEMY is not set
-# CONFIG_BASLER_EXCITE is not set
-# CONFIG_MIPS_COBALT is not set
-# CONFIG_MACH_DECSTATION is not set
-# CONFIG_MACH_JAZZ is not set
-# CONFIG_LEMOTE_FULONG is not set
-# CONFIG_MIPS_ATLAS is not set
-# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
-# CONFIG_MIPS_SIM is not set
-# CONFIG_MARKEINS is not set
-# CONFIG_MACH_VR41XX is not set
-# CONFIG_PNX8550_JBS is not set
-# CONFIG_PNX8550_STB810 is not set
-# CONFIG_PMC_MSP is not set
-# CONFIG_PMC_YOSEMITE is not set
-# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP27 is not set
-# CONFIG_SGI_IP32 is not set
-# CONFIG_SIBYTE_CRHINE is not set
-# CONFIG_SIBYTE_CARMEL is not set
-# CONFIG_SIBYTE_CRHONE is not set
-# CONFIG_SIBYTE_RHONE is not set
-# CONFIG_SIBYTE_SWARM is not set
-# CONFIG_SIBYTE_LITTLESUR is not set
-# CONFIG_SIBYTE_SENTOSA is not set
-# CONFIG_SIBYTE_BIGSUR is not set
-# CONFIG_SNI_RM is not set
-# CONFIG_TOSHIBA_JMR3927 is not set
-CONFIG_TOSHIBA_RBTX4927=y
-# CONFIG_TOSHIBA_RBTX4938 is not set
-# CONFIG_WR_PPMC is not set
-# CONFIG_TOSHIBA_FPCIB0 is not set
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-# CONFIG_ARCH_HAS_ILOG2_U32 is not set
-# CONFIG_ARCH_HAS_ILOG2_U64 is not set
-CONFIG_GENERIC_FIND_NEXT_BIT=y
-CONFIG_GENERIC_HWEIGHT=y
-CONFIG_GENERIC_CALIBRATE_DELAY=y
-CONFIG_GENERIC_TIME=y
-CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
-CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
-CONFIG_DMA_NONCOHERENT=y
-CONFIG_DMA_NEED_PCI_MAP_STATE=y
-# CONFIG_NO_IOPORT is not set
-CONFIG_CPU_BIG_ENDIAN=y
-# CONFIG_CPU_LITTLE_ENDIAN is not set
-CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
-CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
-CONFIG_IRQ_CPU=y
-CONFIG_IRQ_TXX9=y
-CONFIG_SWAP_IO_SPACE=y
-CONFIG_MIPS_L1_CACHE_SHIFT=5
-
-#
-# CPU selection
-#
-# CONFIG_CPU_LOONGSON2 is not set
-# CONFIG_CPU_MIPS32_R1 is not set
-# CONFIG_CPU_MIPS32_R2 is not set
-# CONFIG_CPU_MIPS64_R1 is not set
-# CONFIG_CPU_MIPS64_R2 is not set
-# CONFIG_CPU_R3000 is not set
-# CONFIG_CPU_TX39XX is not set
-# CONFIG_CPU_VR41XX is not set
-# CONFIG_CPU_R4300 is not set
-# CONFIG_CPU_R4X00 is not set
-CONFIG_CPU_TX49XX=y
-# CONFIG_CPU_R5000 is not set
-# CONFIG_CPU_R5432 is not set
-# CONFIG_CPU_R6000 is not set
-# CONFIG_CPU_NEVADA is not set
-# CONFIG_CPU_R8000 is not set
-# CONFIG_CPU_R10000 is not set
-# CONFIG_CPU_RM7000 is not set
-# CONFIG_CPU_RM9000 is not set
-# CONFIG_CPU_SB1 is not set
-CONFIG_SYS_HAS_CPU_TX49XX=y
-CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
-CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
-CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
-CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y
-
-#
-# Kernel type
-#
-CONFIG_32BIT=y
-# CONFIG_64BIT is not set
-CONFIG_PAGE_SIZE_4KB=y
-# CONFIG_PAGE_SIZE_8KB is not set
-# CONFIG_PAGE_SIZE_16KB is not set
-# CONFIG_PAGE_SIZE_64KB is not set
-CONFIG_CPU_HAS_PREFETCH=y
-CONFIG_MIPS_MT_DISABLED=y
-# CONFIG_MIPS_MT_SMP is not set
-# CONFIG_MIPS_MT_SMTC is not set
-CONFIG_CPU_HAS_LLSC=y
-CONFIG_CPU_HAS_SYNC=y
-CONFIG_GENERIC_HARDIRQS=y
-CONFIG_GENERIC_IRQ_PROBE=y
-CONFIG_ARCH_FLATMEM_ENABLE=y
-CONFIG_FLATMEM=y
-CONFIG_FLAT_NODE_MEM_MAP=y
-# CONFIG_SPARSEMEM_STATIC is not set
-CONFIG_SPLIT_PTLOCK_CPUS=4
-# CONFIG_RESOURCES_64BIT is not set
-CONFIG_ZONE_DMA_FLAG=0
-CONFIG_VIRT_TO_BUS=y
-# CONFIG_HZ_48 is not set
-# CONFIG_HZ_100 is not set
-# CONFIG_HZ_128 is not set
-CONFIG_HZ_250=y
-# CONFIG_HZ_256 is not set
-# CONFIG_HZ_1000 is not set
-# CONFIG_HZ_1024 is not set
-CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
-CONFIG_HZ=250
-CONFIG_PREEMPT_NONE=y
-# CONFIG_PREEMPT_VOLUNTARY is not set
-# CONFIG_PREEMPT is not set
-# CONFIG_SECCOMP is not set
-CONFIG_LOCKDEP_SUPPORT=y
-CONFIG_STACKTRACE_SUPPORT=y
-CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
-
-#
-# General setup
-#
-# CONFIG_EXPERIMENTAL is not set
-CONFIG_BROKEN_ON_SMP=y
-CONFIG_INIT_ENV_ARG_LIMIT=32
-CONFIG_LOCALVERSION=""
-CONFIG_LOCALVERSION_AUTO=y
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-CONFIG_SYSVIPC_SYSCTL=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-# CONFIG_TASKSTATS is not set
-# CONFIG_AUDIT is not set
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_SYSFS_DEPRECATED=y
-# CONFIG_RELAY is not set
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_INITRAMFS_SOURCE=""
-CONFIG_SYSCTL=y
-CONFIG_EMBEDDED=y
-CONFIG_SYSCTL_SYSCALL=y
-CONFIG_KALLSYMS=y
-# CONFIG_KALLSYMS_EXTRA_PASS is not set
-# CONFIG_HOTPLUG is not set
-CONFIG_PRINTK=y
-CONFIG_BUG=y
-CONFIG_ELF_CORE=y
-CONFIG_BASE_FULL=y
-# CONFIG_FUTEX is not set
-CONFIG_ANON_INODES=y
-# CONFIG_EPOLL is not set
-CONFIG_SIGNALFD=y
-CONFIG_TIMERFD=y
-CONFIG_EVENTFD=y
-CONFIG_SHMEM=y
-CONFIG_VM_EVENT_COUNTERS=y
-CONFIG_SLAB=y
-# CONFIG_SLUB is not set
-# CONFIG_SLOB is not set
-# CONFIG_TINY_SHMEM is not set
-CONFIG_BASE_SMALL=0
-CONFIG_MODULES=y
-# CONFIG_MODULE_UNLOAD is not set
-# CONFIG_MODVERSIONS is not set
-# CONFIG_MODULE_SRCVERSION_ALL is not set
-CONFIG_KMOD=y
-CONFIG_BLOCK=y
-# CONFIG_LBD is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
-# CONFIG_LSF is not set
-
-#
-# IO Schedulers
-#
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
-CONFIG_DEFAULT_AS=y
-# CONFIG_DEFAULT_DEADLINE is not set
-# CONFIG_DEFAULT_CFQ is not set
-# CONFIG_DEFAULT_NOOP is not set
-CONFIG_DEFAULT_IOSCHED="anticipatory"
-
-#
-# Bus options (PCI, PCMCIA, EISA, ISA, TC)
-#
-CONFIG_HW_HAS_PCI=y
-CONFIG_PCI=y
-# CONFIG_ARCH_SUPPORTS_MSI is not set
-CONFIG_MMU=y
-
-#
-# PCCARD (PCMCIA/CardBus) support
-#
-
-#
-# Executable file formats
-#
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_TRAD_SIGNALS=y
-
-#
-# Power management options
-#
-# CONFIG_PM is not set
-
-#
-# Networking
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-CONFIG_UNIX=y
-# CONFIG_NET_KEY is not set
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_FIB_HASH=y
-CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_DHCP is not set
-# CONFIG_IP_PNP_BOOTP is not set
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_IP_MROUTE is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_INET_XFRM_TUNNEL is not set
-# CONFIG_INET_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-CONFIG_INET_DIAG=y
-CONFIG_INET_TCP_DIAG=y
-# CONFIG_TCP_CONG_ADVANCED is not set
-CONFIG_TCP_CONG_CUBIC=y
-CONFIG_DEFAULT_TCP_CONG="cubic"
-# CONFIG_IPV6 is not set
-# CONFIG_INET6_XFRM_TUNNEL is not set
-# CONFIG_INET6_TUNNEL is not set
-# CONFIG_NETWORK_SECMARK is not set
-# CONFIG_NETFILTER is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_DECNET is not set
-# CONFIG_LLC2 is not set
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-# CONFIG_HAMRADIO is not set
-# CONFIG_IRDA is not set
-# CONFIG_BT is not set
-
-#
-# Wireless
-#
-# CONFIG_CFG80211 is not set
-# CONFIG_WIRELESS_EXT is not set
-# CONFIG_IEEE80211 is not set
-# CONFIG_RFKILL is not set
-
-#
-# Device Drivers
-#
-
-#
-# Generic Driver Options
-#
-CONFIG_STANDALONE=y
-CONFIG_PREVENT_FIRMWARE_BUILD=y
-# CONFIG_SYS_HYPERVISOR is not set
-# CONFIG_CONNECTOR is not set
-# CONFIG_MTD is not set
-# CONFIG_PARPORT is not set
-CONFIG_BLK_DEV=y
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-# CONFIG_BLK_DEV_COW_COMMON is not set
-CONFIG_BLK_DEV_LOOP=y
-# CONFIG_BLK_DEV_CRYPTOLOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_SX8 is not set
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_COUNT=16
-CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
-# CONFIG_CDROM_PKTCDVD is not set
-# CONFIG_ATA_OVER_ETH is not set
-# CONFIG_MISC_DEVICES is not set
-# CONFIG_IDE is not set
-
-#
-# SCSI device support
-#
-# CONFIG_RAID_ATTRS is not set
-# CONFIG_SCSI is not set
-# CONFIG_SCSI_DMA is not set
-# CONFIG_SCSI_NETLINK is not set
-# CONFIG_ATA is not set
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-# CONFIG_FUSION is not set
-
-#
-# IEEE 1394 (FireWire) support
-#
-
-#
-# An alternative FireWire stack is available with EXPERIMENTAL=y
-#
-# CONFIG_IEEE1394 is not set
-# CONFIG_I2O is not set
-CONFIG_NETDEVICES=y
-# CONFIG_NETDEVICES_MULTIQUEUE is not set
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_ARCNET is not set
-# CONFIG_PHYLIB is not set
-CONFIG_NET_ETHERNET=y
-# CONFIG_MII is not set
-# CONFIG_AX88796 is not set
-# CONFIG_HAPPYMEAL is not set
-# CONFIG_SUNGEM is not set
-# CONFIG_CASSINI is not set
-# CONFIG_NET_VENDOR_3COM is not set
-# CONFIG_DM9000 is not set
-# CONFIG_NET_TULIP is not set
-# CONFIG_HP100 is not set
-CONFIG_NE2000=y
-# CONFIG_NET_PCI is not set
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
-# CONFIG_TR is not set
-
-#
-# Wireless LAN
-#
-# CONFIG_WLAN_PRE80211 is not set
-# CONFIG_WLAN_80211 is not set
-# CONFIG_WAN is not set
-# CONFIG_FDDI is not set
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-# CONFIG_NETPOLL is not set
-# CONFIG_NET_POLL_CONTROLLER is not set
-# CONFIG_ISDN is not set
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-# CONFIG_INPUT is not set
-
-#
-# Hardware I/O ports
-#
-CONFIG_SERIO=y
-# CONFIG_SERIO_I8042 is not set
-CONFIG_SERIO_SERPORT=y
-# CONFIG_SERIO_PCIPS2 is not set
-CONFIG_SERIO_LIBPS2=y
-# CONFIG_SERIO_RAW is not set
-# CONFIG_GAMEPORT is not set
-
-#
-# Character devices
-#
-# CONFIG_VT is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-# CONFIG_SERIAL_8250 is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_SERIAL_TXX9=y
-CONFIG_HAS_TXX9_SERIAL=y
-CONFIG_SERIAL_TXX9_NR_UARTS=6
-CONFIG_SERIAL_TXX9_CONSOLE=y
-CONFIG_SERIAL_TXX9_STDSERIAL=y
-# CONFIG_SERIAL_JSM is not set
-CONFIG_UNIX98_PTYS=y
-CONFIG_LEGACY_PTYS=y
-CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_IPMI_HANDLER is not set
-# CONFIG_HW_RANDOM is not set
-# CONFIG_RTC is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-CONFIG_DEVPORT=y
-# CONFIG_I2C is not set
-
-#
-# SPI support
-#
-# CONFIG_SPI is not set
-# CONFIG_SPI_MASTER is not set
-# CONFIG_W1 is not set
-# CONFIG_POWER_SUPPLY is not set
-# CONFIG_HWMON is not set
-CONFIG_WATCHDOG=y
-# CONFIG_WATCHDOG_NOWAYOUT is not set
-
-#
-# Watchdog Device Drivers
-#
-# CONFIG_SOFT_WATCHDOG is not set
-CONFIG_TXX9_WDT=m
-
-#
-# PCI-based Watchdog Cards
-#
-# CONFIG_PCIPCWATCHDOG is not set
-# CONFIG_WDTPCI is not set
-
-#
-# Multifunction device drivers
-#
-# CONFIG_MFD_SM501 is not set
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-# CONFIG_DVB_CORE is not set
-# CONFIG_DAB is not set
-
-#
-# Graphics support
-#
-# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
-
-#
-# Display device support
-#
-# CONFIG_DISPLAY_SUPPORT is not set
-# CONFIG_VGASTATE is not set
-# CONFIG_VIDEO_OUTPUT_CONTROL is not set
-# CONFIG_FB is not set
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-# CONFIG_USB_SUPPORT is not set
-# CONFIG_MMC is not set
-# CONFIG_NEW_LEDS is not set
-# CONFIG_INFINIBAND is not set
-CONFIG_RTC_LIB=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_HCTOSYS=y
-CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
-# CONFIG_RTC_DEBUG is not set
-
-#
-# RTC interfaces
-#
-CONFIG_RTC_INTF_SYSFS=y
-CONFIG_RTC_INTF_PROC=y
-CONFIG_RTC_INTF_DEV=y
-# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
-# CONFIG_RTC_DRV_TEST is not set
-
-#
-# SPI RTC drivers
-#
-
-#
-# Platform RTC drivers
-#
-# CONFIG_RTC_DRV_CMOS is not set
-# CONFIG_RTC_DRV_DS1553 is not set
-# CONFIG_RTC_DRV_STK17TA8 is not set
-CONFIG_RTC_DRV_DS1742=y
-# CONFIG_RTC_DRV_M48T86 is not set
-# CONFIG_RTC_DRV_M48T59 is not set
-# CONFIG_RTC_DRV_V3020 is not set
-
-#
-# on-CPU RTC drivers
-#
-
-#
-# DMA Engine support
-#
-# CONFIG_DMA_ENGINE is not set
-
-#
-# DMA Clients
-#
-
-#
-# DMA Devices
-#
-
-#
-# Userspace I/O
-#
-# CONFIG_UIO is not set
-
-#
-# File systems
-#
-# CONFIG_EXT2_FS is not set
-# CONFIG_EXT3_FS is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-CONFIG_FS_POSIX_ACL=y
-# CONFIG_XFS_FS is not set
-# CONFIG_OCFS2_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-CONFIG_INOTIFY=y
-CONFIG_INOTIFY_USER=y
-# CONFIG_QUOTA is not set
-# CONFIG_DNOTIFY is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-# CONFIG_FUSE_FS is not set
-CONFIG_GENERIC_ACL=y
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_MSDOS_FS is not set
-# CONFIG_VFAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-# CONFIG_PROC_KCORE is not set
-CONFIG_PROC_SYSCTL=y
-CONFIG_SYSFS=y
-CONFIG_TMPFS=y
-CONFIG_TMPFS_POSIX_ACL=y
-# CONFIG_HUGETLB_PAGE is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_HFSPLUS_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-# CONFIG_NFS_V3_ACL is not set
-# CONFIG_NFS_DIRECTIO is not set
-# CONFIG_NFSD is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-CONFIG_LOCKD_V4=y
-CONFIG_NFS_COMMON=y
-CONFIG_SUNRPC=y
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-
-#
-# Native Language Support
-#
-# CONFIG_NLS is not set
-
-#
-# Kernel hacking
-#
-CONFIG_TRACE_IRQFLAGS_SUPPORT=y
-# CONFIG_PRINTK_TIME is not set
-CONFIG_ENABLE_MUST_CHECK=y
-# CONFIG_MAGIC_SYSRQ is not set
-# CONFIG_UNUSED_SYMBOLS is not set
-# CONFIG_DEBUG_FS is not set
-# CONFIG_HEADERS_CHECK is not set
-# CONFIG_DEBUG_KERNEL is not set
-CONFIG_CROSSCOMPILE=y
-CONFIG_CMDLINE=""
-CONFIG_SYS_SUPPORTS_KGDB=y
-
-#
-# Security options
-#
-# CONFIG_KEYS is not set
-# CONFIG_SECURITY is not set
-# CONFIG_CRYPTO is not set
-
-#
-# Library routines
-#
-CONFIG_BITREVERSE=y
-# CONFIG_CRC_CCITT is not set
-# CONFIG_CRC16 is not set
-# CONFIG_CRC_ITU_T is not set
-CONFIG_CRC32=y
-# CONFIG_CRC7 is not set
-# CONFIG_LIBCRC32C is not set
-CONFIG_HAS_IOMEM=y
-CONFIG_HAS_IOPORT=y
-CONFIG_HAS_DMA=y
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.23-rc1
-# Thu Aug 2 22:59:53 2007
+# Linux kernel version: 2.6.26-rc9
+# Fri Jul 11 23:03:21 2008
#
CONFIG_MIPS=y
#
# CONFIG_MACH_ALCHEMY is not set
# CONFIG_BASLER_EXCITE is not set
+# CONFIG_BCM47XX is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
+# CONFIG_LASAT is not set
# CONFIG_LEMOTE_FULONG is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MARKEINS is not set
# CONFIG_MACH_VR41XX is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_SGI_IP22 is not set
# CONFIG_SGI_IP27 is not set
+# CONFIG_SGI_IP28 is not set
# CONFIG_SGI_IP32 is not set
# CONFIG_SIBYTE_CRHINE is not set
# CONFIG_SIBYTE_CARMEL is not set
# CONFIG_SIBYTE_SENTOSA is not set
# CONFIG_SIBYTE_BIGSUR is not set
# CONFIG_SNI_RM is not set
-# CONFIG_TOSHIBA_JMR3927 is not set
-# CONFIG_TOSHIBA_RBTX4927 is not set
-CONFIG_TOSHIBA_RBTX4938=y
+# CONFIG_MACH_TX39XX is not set
+CONFIG_MACH_TX49XX=y
# CONFIG_WR_PPMC is not set
+CONFIG_TOSHIBA_RBTX4927=y
+CONFIG_TOSHIBA_RBTX4938=y
+CONFIG_SOC_TX4927=y
+CONFIG_SOC_TX4938=y
+# CONFIG_TOSHIBA_FPCIB0 is not set
+CONFIG_PICMG_PCI_BACKPLANE_DEFAULT=y
#
# Multiplex Pin Select
CONFIG_TOSHIBA_RBTX4938_MPLEX_PIO58_61=y
# CONFIG_TOSHIBA_RBTX4938_MPLEX_NAND is not set
# CONFIG_TOSHIBA_RBTX4938_MPLEX_ATA is not set
+CONFIG_PCI_TX4927=y
CONFIG_RWSEM_GENERIC_SPINLOCK=y
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_ARCH_SUPPORTS_OPROFILE=y
CONFIG_GENERIC_FIND_NEXT_BIT=y
CONFIG_GENERIC_HWEIGHT=y
CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CMOS_UPDATE=y
CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_CEVT_R4K=y
+CONFIG_CEVT_TXX9=y
+CONFIG_CSRC_R4K=y
+CONFIG_GPIO_TXX9=y
CONFIG_DMA_NONCOHERENT=y
CONFIG_DMA_NEED_PCI_MAP_STATE=y
+# CONFIG_HOTPLUG_CPU is not set
# CONFIG_NO_IOPORT is not set
CONFIG_GENERIC_GPIO=y
-# CONFIG_CPU_BIG_ENDIAN is not set
-CONFIG_CPU_LITTLE_ENDIAN=y
+CONFIG_CPU_BIG_ENDIAN=y
+# CONFIG_CPU_LITTLE_ENDIAN is not set
CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
CONFIG_IRQ_CPU=y
# CONFIG_CPU_SB1 is not set
CONFIG_SYS_HAS_CPU_TX49XX=y
CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
+CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y
CONFIG_GENERIC_HARDIRQS=y
CONFIG_GENERIC_IRQ_PROBE=y
CONFIG_ARCH_FLATMEM_ENABLE=y
+CONFIG_ARCH_POPULATES_NODE_MAP=y
CONFIG_FLATMEM=y
CONFIG_FLAT_NODE_MEM_MAP=y
# CONFIG_SPARSEMEM_STATIC is not set
+# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
+CONFIG_PAGEFLAGS_EXTENDED=y
CONFIG_SPLIT_PTLOCK_CPUS=4
# CONFIG_RESOURCES_64BIT is not set
CONFIG_ZONE_DMA_FLAG=0
CONFIG_VIRT_TO_BUS=y
+CONFIG_TICK_ONESHOT=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
# CONFIG_HZ_48 is not set
# CONFIG_HZ_100 is not set
# CONFIG_HZ_128 is not set
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_CGROUPS is not set
CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
# CONFIG_RELAY is not set
+# CONFIG_NAMESPACES is not set
CONFIG_BLK_DEV_INITRD=y
CONFIG_INITRAMFS_SOURCE=""
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_SYSCTL=y
CONFIG_EMBEDDED=y
CONFIG_SYSCTL_SYSCALL=y
+CONFIG_SYSCTL_SYSCALL_CHECK=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
# CONFIG_HOTPLUG is not set
CONFIG_PRINTK=y
CONFIG_BUG=y
CONFIG_ELF_CORE=y
+# CONFIG_PCSPKR_PLATFORM is not set
+CONFIG_COMPAT_BRK=y
CONFIG_BASE_FULL=y
# CONFIG_FUTEX is not set
CONFIG_ANON_INODES=y
CONFIG_SLAB=y
# CONFIG_SLUB is not set
# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_HAVE_KPROBES is not set
+# CONFIG_HAVE_KRETPROBES is not set
+# CONFIG_HAVE_DMA_ATTRS is not set
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SLABINFO=y
# CONFIG_TINY_SHMEM is not set
CONFIG_BASE_SMALL=0
CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
# CONFIG_MODULE_UNLOAD is not set
# CONFIG_MODVERSIONS is not set
# CONFIG_MODULE_SRCVERSION_ALL is not set
# CONFIG_DEFAULT_CFQ is not set
# CONFIG_DEFAULT_NOOP is not set
CONFIG_DEFAULT_IOSCHED="anticipatory"
+CONFIG_CLASSIC_RCU=y
#
# Bus options (PCI, PCMCIA, EISA, ISA, TC)
#
CONFIG_HW_HAS_PCI=y
CONFIG_PCI=y
+CONFIG_PCI_DOMAINS=y
# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCI_LEGACY is not set
CONFIG_MMU=y
-#
-# PCCARD (PCMCIA/CardBus) support
-#
-
#
# Executable file formats
#
#
# Power management options
#
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
# CONFIG_PM is not set
#
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
CONFIG_INET_DIAG=y
CONFIG_INET_TCP_DIAG=y
# CONFIG_TCP_CONG_ADVANCED is not set
CONFIG_TCP_CONG_CUBIC=y
CONFIG_DEFAULT_TCP_CONG="cubic"
# CONFIG_IPV6 is not set
-# CONFIG_INET6_XFRM_TUNNEL is not set
-# CONFIG_INET6_TUNNEL is not set
# CONFIG_NETWORK_SECMARK is not set
# CONFIG_NETFILTER is not set
+# CONFIG_ATM is not set
# CONFIG_BRIDGE is not set
# CONFIG_VLAN_8021Q is not set
# CONFIG_DECNET is not set
# CONFIG_LLC2 is not set
# CONFIG_IPX is not set
# CONFIG_ATALK is not set
-
-#
-# QoS and/or fair queueing
-#
# CONFIG_NET_SCHED is not set
#
#
# CONFIG_NET_PKTGEN is not set
# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
# CONFIG_IRDA is not set
# CONFIG_BT is not set
#
# CONFIG_CFG80211 is not set
# CONFIG_WIRELESS_EXT is not set
+# CONFIG_MAC80211 is not set
# CONFIG_IEEE80211 is not set
# CONFIG_RFKILL is not set
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=16
CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
+# CONFIG_BLK_DEV_XIP is not set
# CONFIG_CDROM_PKTCDVD is not set
# CONFIG_ATA_OVER_ETH is not set
# CONFIG_MISC_DEVICES is not set
+CONFIG_HAVE_IDE=y
# CONFIG_IDE is not set
#
# CONFIG_SCSI_NETLINK is not set
# CONFIG_ATA is not set
# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
# CONFIG_FUSION is not set
#
#
#
-# An alternative FireWire stack is available with EXPERIMENTAL=y
+# A new alternative FireWire stack is available with EXPERIMENTAL=y
#
# CONFIG_IEEE1394 is not set
# CONFIG_I2O is not set
# CONFIG_BONDING is not set
# CONFIG_EQUALIZER is not set
# CONFIG_TUN is not set
+# CONFIG_VETH is not set
# CONFIG_ARCNET is not set
-# CONFIG_PHYLIB is not set
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_REALTEK_PHY is not set
+# CONFIG_FIXED_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
CONFIG_NET_ETHERNET=y
-CONFIG_MII=y
+# CONFIG_MII is not set
# CONFIG_AX88796 is not set
# CONFIG_HAPPYMEAL is not set
# CONFIG_SUNGEM is not set
# CONFIG_NET_TULIP is not set
# CONFIG_HP100 is not set
CONFIG_NE2000=y
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
CONFIG_NET_PCI=y
# CONFIG_PCNET32 is not set
# CONFIG_AMD8111_ETH is not set
# CONFIG_B44 is not set
# CONFIG_FORCEDETH is not set
CONFIG_TC35815=y
-# CONFIG_DGRS is not set
# CONFIG_EEPRO100 is not set
# CONFIG_E100 is not set
# CONFIG_FEALNX is not set
# CONFIG_NATSEMI is not set
# CONFIG_NE2K_PCI is not set
# CONFIG_8139TOO is not set
+# CONFIG_R6040 is not set
# CONFIG_SIS900 is not set
# CONFIG_EPIC100 is not set
# CONFIG_SUNDANCE is not set
#
# CONFIG_WLAN_PRE80211 is not set
# CONFIG_WLAN_80211 is not set
+# CONFIG_IWLWIFI_LEDS is not set
# CONFIG_WAN is not set
# CONFIG_FDDI is not set
# CONFIG_PPP is not set
# Character devices
#
# CONFIG_VT is not set
+CONFIG_DEVKMEM=y
# CONFIG_SERIAL_NONSTANDARD is not set
#
CONFIG_LEGACY_PTY_COUNT=256
# CONFIG_IPMI_HANDLER is not set
# CONFIG_HW_RANDOM is not set
-# CONFIG_RTC is not set
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set
-# CONFIG_DRM is not set
# CONFIG_RAW_DRIVER is not set
CONFIG_DEVPORT=y
# CONFIG_I2C is not set
-
-#
-# SPI support
-#
CONFIG_SPI=y
CONFIG_SPI_MASTER=y
#
CONFIG_SPI_AT25=y
# CONFIG_SPI_TLE62X0 is not set
+CONFIG_HAVE_GPIO_LIB=y
+
+#
+# GPIO Support
+#
+
+#
+# I2C GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+# CONFIG_GPIO_MCP23S08 is not set
# CONFIG_W1 is not set
# CONFIG_POWER_SUPPLY is not set
# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_THERMAL_HWMON is not set
CONFIG_WATCHDOG=y
# CONFIG_WATCHDOG_NOWAYOUT is not set
# CONFIG_PCIPCWATCHDOG is not set
# CONFIG_WDTPCI is not set
+#
+# Sonics Silicon Backplane
+#
+CONFIG_SSB_POSSIBLE=y
+# CONFIG_SSB is not set
+
#
# Multifunction device drivers
#
# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
#
# Multimedia devices
#
+
+#
+# Multimedia core support
+#
# CONFIG_VIDEO_DEV is not set
# CONFIG_DVB_CORE is not set
+# CONFIG_VIDEO_MEDIA is not set
+
+#
+# Multimedia drivers
+#
# CONFIG_DAB is not set
#
# Graphics support
#
+# CONFIG_DRM is not set
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+# CONFIG_FB is not set
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
#
# Display device support
#
# CONFIG_DISPLAY_SUPPORT is not set
-# CONFIG_VGASTATE is not set
-# CONFIG_VIDEO_OUTPUT_CONTROL is not set
-# CONFIG_FB is not set
#
# Sound
# CONFIG_SOUND is not set
# CONFIG_USB_SUPPORT is not set
# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
# CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
# CONFIG_INFINIBAND is not set
CONFIG_RTC_LIB=y
CONFIG_RTC_CLASS=y
#
# SPI RTC drivers
#
-CONFIG_RTC_DRV_RS5C348=y
# CONFIG_RTC_DRV_MAX6902 is not set
+# CONFIG_RTC_DRV_R9701 is not set
+CONFIG_RTC_DRV_RS5C348=y
#
# Platform RTC drivers
#
# CONFIG_RTC_DRV_CMOS is not set
+# CONFIG_RTC_DRV_DS1511 is not set
# CONFIG_RTC_DRV_DS1553 is not set
+CONFIG_RTC_DRV_DS1742=y
# CONFIG_RTC_DRV_STK17TA8 is not set
-# CONFIG_RTC_DRV_DS1742 is not set
# CONFIG_RTC_DRV_M48T86 is not set
# CONFIG_RTC_DRV_M48T59 is not set
# CONFIG_RTC_DRV_V3020 is not set
#
# on-CPU RTC drivers
#
-
-#
-# DMA Engine support
-#
-# CONFIG_DMA_ENGINE is not set
-
-#
-# DMA Clients
-#
-
-#
-# DMA Devices
-#
-
-#
-# Userspace I/O
-#
# CONFIG_UIO is not set
#
CONFIG_FS_POSIX_ACL=y
# CONFIG_XFS_FS is not set
# CONFIG_OCFS2_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
+# CONFIG_DNOTIFY is not set
CONFIG_INOTIFY=y
CONFIG_INOTIFY_USER=y
# CONFIG_QUOTA is not set
-# CONFIG_DNOTIFY is not set
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
# CONFIG_FUSE_FS is not set
CONFIG_TMPFS=y
CONFIG_TMPFS_POSIX_ACL=y
# CONFIG_HUGETLB_PAGE is not set
-CONFIG_RAMFS=y
+# CONFIG_CONFIGFS_FS is not set
#
# Miscellaneous filesystems
# CONFIG_HFSPLUS_FS is not set
# CONFIG_CRAMFS is not set
# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
# CONFIG_HPFS_FS is not set
# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
# CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
+CONFIG_NETWORK_FILESYSTEMS=y
CONFIG_NFS_FS=y
CONFIG_NFS_V3=y
# CONFIG_NFS_V3_ACL is not set
-# CONFIG_NFS_DIRECTIO is not set
# CONFIG_NFSD is not set
CONFIG_ROOT_NFS=y
CONFIG_LOCKD=y
#
# CONFIG_PARTITION_ADVANCED is not set
CONFIG_MSDOS_PARTITION=y
-
-#
-# Native Language Support
-#
# CONFIG_NLS is not set
#
#
CONFIG_TRACE_IRQFLAGS_SUPPORT=y
# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
# CONFIG_MAGIC_SYSRQ is not set
# CONFIG_UNUSED_SYMBOLS is not set
-# CONFIG_DEBUG_FS is not set
+CONFIG_DEBUG_FS=y
# CONFIG_HEADERS_CHECK is not set
# CONFIG_DEBUG_KERNEL is not set
-CONFIG_CROSSCOMPILE=y
+# CONFIG_SAMPLES is not set
CONFIG_CMDLINE=""
CONFIG_SYS_SUPPORTS_KGDB=y
# Library routines
#
CONFIG_BITREVERSE=y
+# CONFIG_GENERIC_FIND_FIRST_BIT is not set
# CONFIG_CRC_CCITT is not set
# CONFIG_CRC16 is not set
# CONFIG_CRC_ITU_T is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
# CONFIG_WR_PPMC is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_LASAT is not set
# CONFIG_LEMOTE_FULONG is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MARKEINS is not set
# CONFIG_MACH_VR41XX is not set
+++ /dev/null
-#
-# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.20
-# Sun Feb 18 21:28:10 2007
-#
-CONFIG_MIPS=y
-
-#
-# Machine selection
-#
-CONFIG_ZONE_DMA=y
-# CONFIG_MIPS_MTX1 is not set
-# CONFIG_MIPS_BOSPORUS is not set
-# CONFIG_MIPS_PB1000 is not set
-# CONFIG_MIPS_PB1100 is not set
-# CONFIG_MIPS_PB1500 is not set
-# CONFIG_MIPS_PB1550 is not set
-# CONFIG_MIPS_PB1200 is not set
-# CONFIG_MIPS_DB1000 is not set
-# CONFIG_MIPS_DB1100 is not set
-# CONFIG_MIPS_DB1500 is not set
-# CONFIG_MIPS_DB1550 is not set
-# CONFIG_MIPS_DB1200 is not set
-# CONFIG_MIPS_MIRAGE is not set
-# CONFIG_BASLER_EXCITE is not set
-# CONFIG_MIPS_COBALT is not set
-# CONFIG_MACH_DECSTATION is not set
-# CONFIG_MACH_JAZZ is not set
-# CONFIG_MIPS_ATLAS is not set
-# CONFIG_MIPS_MALTA is not set
-CONFIG_MIPS_SEAD=y
-# CONFIG_WR_PPMC is not set
-# CONFIG_MIPS_SIM is not set
-# CONFIG_MOMENCO_JAGUAR_ATX is not set
-# CONFIG_MIPS_XXS1500 is not set
-# CONFIG_PNX8550_JBS is not set
-# CONFIG_PNX8550_STB810 is not set
-# CONFIG_MACH_VR41XX is not set
-# CONFIG_PMC_YOSEMITE is not set
-# CONFIG_MARKEINS is not set
-# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP27 is not set
-# CONFIG_SGI_IP32 is not set
-# CONFIG_SIBYTE_BIGSUR is not set
-# CONFIG_SIBYTE_SWARM is not set
-# CONFIG_SIBYTE_SENTOSA is not set
-# CONFIG_SIBYTE_RHONE is not set
-# CONFIG_SIBYTE_CARMEL is not set
-# CONFIG_SIBYTE_LITTLESUR is not set
-# CONFIG_SIBYTE_CRHINE is not set
-# CONFIG_SIBYTE_CRHONE is not set
-# CONFIG_SNI_RM is not set
-# CONFIG_TOSHIBA_JMR3927 is not set
-# CONFIG_TOSHIBA_RBTX4927 is not set
-# CONFIG_TOSHIBA_RBTX4938 is not set
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-# CONFIG_ARCH_HAS_ILOG2_U32 is not set
-# CONFIG_ARCH_HAS_ILOG2_U64 is not set
-CONFIG_GENERIC_FIND_NEXT_BIT=y
-CONFIG_GENERIC_HWEIGHT=y
-CONFIG_GENERIC_CALIBRATE_DELAY=y
-CONFIG_GENERIC_TIME=y
-CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
-# CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ is not set
-CONFIG_DMA_NONCOHERENT=y
-CONFIG_DMA_NEED_PCI_MAP_STATE=y
-# CONFIG_CPU_BIG_ENDIAN is not set
-CONFIG_CPU_LITTLE_ENDIAN=y
-CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
-CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
-CONFIG_IRQ_CPU=y
-CONFIG_MIPS_BOARDS_GEN=y
-CONFIG_MIPS_L1_CACHE_SHIFT=5
-
-#
-# CPU selection
-#
-CONFIG_CPU_MIPS32_R1=y
-# CONFIG_CPU_MIPS32_R2 is not set
-# CONFIG_CPU_MIPS64_R1 is not set
-# CONFIG_CPU_MIPS64_R2 is not set
-# CONFIG_CPU_R3000 is not set
-# CONFIG_CPU_TX39XX is not set
-# CONFIG_CPU_VR41XX is not set
-# CONFIG_CPU_R4300 is not set
-# CONFIG_CPU_R4X00 is not set
-# CONFIG_CPU_TX49XX is not set
-# CONFIG_CPU_R5000 is not set
-# CONFIG_CPU_R5432 is not set
-# CONFIG_CPU_R6000 is not set
-# CONFIG_CPU_NEVADA is not set
-# CONFIG_CPU_R8000 is not set
-# CONFIG_CPU_R10000 is not set
-# CONFIG_CPU_RM7000 is not set
-# CONFIG_CPU_RM9000 is not set
-# CONFIG_CPU_SB1 is not set
-CONFIG_SYS_HAS_CPU_MIPS32_R1=y
-CONFIG_SYS_HAS_CPU_MIPS32_R2=y
-CONFIG_SYS_HAS_CPU_MIPS64_R1=y
-CONFIG_CPU_MIPS32=y
-CONFIG_CPU_MIPSR1=y
-CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
-CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
-CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
-
-#
-# Kernel type
-#
-CONFIG_32BIT=y
-# CONFIG_64BIT is not set
-CONFIG_PAGE_SIZE_4KB=y
-# CONFIG_PAGE_SIZE_8KB is not set
-# CONFIG_PAGE_SIZE_16KB is not set
-# CONFIG_PAGE_SIZE_64KB is not set
-CONFIG_CPU_HAS_PREFETCH=y
-CONFIG_MIPS_MT_DISABLED=y
-# CONFIG_MIPS_MT_SMP is not set
-# CONFIG_MIPS_MT_SMTC is not set
-# CONFIG_MIPS_VPE_LOADER is not set
-# CONFIG_64BIT_PHYS_ADDR is not set
-CONFIG_CPU_HAS_LLSC=y
-# CONFIG_CPU_HAS_SMARTMIPS is not set
-CONFIG_CPU_HAS_SYNC=y
-CONFIG_GENERIC_HARDIRQS=y
-CONFIG_GENERIC_IRQ_PROBE=y
-CONFIG_CPU_SUPPORTS_HIGHMEM=y
-CONFIG_SYS_SUPPORTS_SMARTMIPS=y
-CONFIG_ARCH_FLATMEM_ENABLE=y
-CONFIG_SELECT_MEMORY_MODEL=y
-CONFIG_FLATMEM_MANUAL=y
-# CONFIG_DISCONTIGMEM_MANUAL is not set
-# CONFIG_SPARSEMEM_MANUAL is not set
-CONFIG_FLATMEM=y
-CONFIG_FLAT_NODE_MEM_MAP=y
-# CONFIG_SPARSEMEM_STATIC is not set
-CONFIG_SPLIT_PTLOCK_CPUS=4
-# CONFIG_RESOURCES_64BIT is not set
-CONFIG_ZONE_DMA_FLAG=1
-# CONFIG_HZ_48 is not set
-# CONFIG_HZ_100 is not set
-# CONFIG_HZ_128 is not set
-# CONFIG_HZ_250 is not set
-# CONFIG_HZ_256 is not set
-CONFIG_HZ_1000=y
-# CONFIG_HZ_1024 is not set
-CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
-CONFIG_HZ=1000
-CONFIG_PREEMPT_NONE=y
-# CONFIG_PREEMPT_VOLUNTARY is not set
-# CONFIG_PREEMPT is not set
-# CONFIG_KEXEC is not set
-CONFIG_LOCKDEP_SUPPORT=y
-CONFIG_STACKTRACE_SUPPORT=y
-CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-CONFIG_BROKEN_ON_SMP=y
-CONFIG_INIT_ENV_ARG_LIMIT=32
-
-#
-# General setup
-#
-CONFIG_LOCALVERSION=""
-CONFIG_LOCALVERSION_AUTO=y
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-# CONFIG_IPC_NS is not set
-CONFIG_SYSVIPC_SYSCTL=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-# CONFIG_UTS_NS is not set
-# CONFIG_IKCONFIG is not set
-CONFIG_SYSFS_DEPRECATED=y
-CONFIG_RELAY=y
-CONFIG_INITRAMFS_SOURCE=""
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_SYSCTL=y
-CONFIG_EMBEDDED=y
-CONFIG_SYSCTL_SYSCALL=y
-CONFIG_KALLSYMS=y
-# CONFIG_KALLSYMS_EXTRA_PASS is not set
-# CONFIG_HOTPLUG is not set
-CONFIG_PRINTK=y
-CONFIG_BUG=y
-CONFIG_ELF_CORE=y
-CONFIG_BASE_FULL=y
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-CONFIG_SHMEM=y
-CONFIG_SLAB=y
-CONFIG_VM_EVENT_COUNTERS=y
-CONFIG_RT_MUTEXES=y
-# CONFIG_TINY_SHMEM is not set
-CONFIG_BASE_SMALL=0
-# CONFIG_SLOB is not set
-
-#
-# Loadable module support
-#
-# CONFIG_MODULES is not set
-
-#
-# Block layer
-#
-CONFIG_BLOCK=y
-# CONFIG_LBD is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
-# CONFIG_LSF is not set
-
-#
-# IO Schedulers
-#
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
-CONFIG_DEFAULT_AS=y
-# CONFIG_DEFAULT_DEADLINE is not set
-# CONFIG_DEFAULT_CFQ is not set
-# CONFIG_DEFAULT_NOOP is not set
-CONFIG_DEFAULT_IOSCHED="anticipatory"
-
-#
-# Bus options (PCI, PCMCIA, EISA, ISA, TC)
-#
-CONFIG_MMU=y
-
-#
-# PCCARD (PCMCIA/CardBus) support
-#
-
-#
-# PCI Hotplug Support
-#
-
-#
-# Executable file formats
-#
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_TRAD_SIGNALS=y
-
-#
-# Power management options
-#
-CONFIG_PM=y
-# CONFIG_PM_LEGACY is not set
-# CONFIG_PM_DEBUG is not set
-# CONFIG_PM_SYSFS_DEPRECATED is not set
-
-#
-# Networking
-#
-# CONFIG_NET is not set
-
-#
-# Device Drivers
-#
-
-#
-# Generic Driver Options
-#
-CONFIG_STANDALONE=y
-CONFIG_PREVENT_FIRMWARE_BUILD=y
-# CONFIG_SYS_HYPERVISOR is not set
-
-#
-# Connector - unified userspace <-> kernelspace linker
-#
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_COW_COMMON is not set
-CONFIG_BLK_DEV_LOOP=y
-# CONFIG_BLK_DEV_CRYPTOLOOP is not set
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_COUNT=16
-CONFIG_BLK_DEV_RAM_SIZE=18432
-CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
-CONFIG_BLK_DEV_INITRD=y
-# CONFIG_CDROM_PKTCDVD is not set
-
-#
-# Misc devices
-#
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-# CONFIG_IDE is not set
-
-#
-# SCSI device support
-#
-CONFIG_RAID_ATTRS=y
-# CONFIG_SCSI is not set
-# CONFIG_SCSI_NETLINK is not set
-
-#
-# Serial ATA (prod) and Parallel ATA (experimental) drivers
-#
-# CONFIG_ATA is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-# CONFIG_FUSION is not set
-
-#
-# IEEE 1394 (FireWire) support
-#
-
-#
-# I2O device support
-#
-
-#
-# ISDN subsystem
-#
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-# CONFIG_INPUT is not set
-
-#
-# Hardware I/O ports
-#
-# CONFIG_SERIO is not set
-# CONFIG_GAMEPORT is not set
-
-#
-# Character devices
-#
-# CONFIG_VT is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_8250_NR_UARTS=4
-CONFIG_SERIAL_8250_RUNTIME_UARTS=4
-# CONFIG_SERIAL_8250_EXTENDED is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_LEGACY_PTYS=y
-CONFIG_LEGACY_PTY_COUNT=256
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_HW_RANDOM is not set
-# CONFIG_RTC is not set
-# CONFIG_GEN_RTC is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_RAW_DRIVER is not set
-
-#
-# TPM devices
-#
-# CONFIG_TCG_TPM is not set
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# SPI support
-#
-# CONFIG_SPI is not set
-# CONFIG_SPI_MASTER is not set
-
-#
-# Dallas's 1-wire bus
-#
-# CONFIG_W1 is not set
-
-#
-# Hardware Monitoring support
-#
-# CONFIG_HWMON is not set
-# CONFIG_HWMON_VID is not set
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-
-#
-# Graphics support
-#
-# CONFIG_FIRMWARE_EDID is not set
-# CONFIG_FB is not set
-# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-# CONFIG_USB_ARCH_HAS_HCD is not set
-# CONFIG_USB_ARCH_HAS_OHCI is not set
-# CONFIG_USB_ARCH_HAS_EHCI is not set
-
-#
-# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
-#
-
-#
-# USB Gadget Support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# MMC/SD Card support
-#
-# CONFIG_MMC is not set
-
-#
-# LED devices
-#
-# CONFIG_NEW_LEDS is not set
-
-#
-# LED drivers
-#
-
-#
-# LED Triggers
-#
-
-#
-# InfiniBand support
-#
-
-#
-# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
-#
-
-#
-# Real Time Clock
-#
-# CONFIG_RTC_CLASS is not set
-
-#
-# DMA Engine support
-#
-# CONFIG_DMA_ENGINE is not set
-
-#
-# DMA Clients
-#
-
-#
-# DMA Devices
-#
-
-#
-# Auxiliary Display support
-#
-
-#
-# Virtualization
-#
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-# CONFIG_EXT2_FS_XATTR is not set
-# CONFIG_EXT2_FS_XIP is not set
-# CONFIG_EXT3_FS is not set
-# CONFIG_EXT4DEV_FS is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-# CONFIG_FS_POSIX_ACL is not set
-# CONFIG_XFS_FS is not set
-# CONFIG_GFS2_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-CONFIG_INOTIFY=y
-CONFIG_INOTIFY_USER=y
-# CONFIG_QUOTA is not set
-CONFIG_DNOTIFY=y
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-CONFIG_FUSE_FS=y
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_MSDOS_FS is not set
-# CONFIG_VFAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-CONFIG_PROC_KCORE=y
-CONFIG_PROC_SYSCTL=y
-CONFIG_SYSFS=y
-# CONFIG_TMPFS is not set
-# CONFIG_HUGETLB_PAGE is not set
-CONFIG_RAMFS=y
-# CONFIG_CONFIGFS_FS is not set
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_HFSPLUS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Partition Types
-#
-CONFIG_PARTITION_ADVANCED=y
-# CONFIG_ACORN_PARTITION is not set
-# CONFIG_OSF_PARTITION is not set
-# CONFIG_AMIGA_PARTITION is not set
-# CONFIG_ATARI_PARTITION is not set
-# CONFIG_MAC_PARTITION is not set
-# CONFIG_MSDOS_PARTITION is not set
-# CONFIG_LDM_PARTITION is not set
-# CONFIG_SGI_PARTITION is not set
-# CONFIG_ULTRIX_PARTITION is not set
-# CONFIG_SUN_PARTITION is not set
-# CONFIG_KARMA_PARTITION is not set
-# CONFIG_EFI_PARTITION is not set
-
-#
-# Native Language Support
-#
-# CONFIG_NLS is not set
-
-#
-# Profiling support
-#
-# CONFIG_PROFILING is not set
-
-#
-# Kernel hacking
-#
-CONFIG_TRACE_IRQFLAGS_SUPPORT=y
-# CONFIG_PRINTK_TIME is not set
-CONFIG_ENABLE_MUST_CHECK=y
-# CONFIG_MAGIC_SYSRQ is not set
-# CONFIG_UNUSED_SYMBOLS is not set
-# CONFIG_DEBUG_FS is not set
-# CONFIG_HEADERS_CHECK is not set
-# CONFIG_DEBUG_KERNEL is not set
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_CROSSCOMPILE=y
-CONFIG_CMDLINE=""
-
-#
-# Security options
-#
-# CONFIG_KEYS is not set
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
-
-#
-# Library routines
-#
-# CONFIG_CRC_CCITT is not set
-CONFIG_CRC16=y
-# CONFIG_CRC32 is not set
-# CONFIG_LIBCRC32C is not set
-CONFIG_PLIST=y
-CONFIG_HAS_IOMEM=y
-CONFIG_HAS_IOPORT=y
# CONFIG_MACH_JAZZ is not set
# CONFIG_LASAT is not set
# CONFIG_LEMOTE_FULONG is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MARKEINS is not set
CONFIG_MACH_VR41XX=y
# CONFIG_MACH_JAZZ is not set
# CONFIG_LASAT is not set
# CONFIG_LEMOTE_FULONG is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MARKEINS is not set
CONFIG_MACH_VR41XX=y
# CONFIG_MACH_JAZZ is not set
# CONFIG_LASAT is not set
# CONFIG_LEMOTE_FULONG is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MARKEINS is not set
CONFIG_MACH_VR41XX=y
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_LEMOTE_FULONG is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MARKEINS is not set
CONFIG_MACH_VR41XX=y
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
CONFIG_WR_PPMC=y
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
# CONFIG_WR_PPMC is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
const char *get_system_type(void)
{
- switch (mips_machtype) {
- case MACH_NEC_MARKEINS:
- return "NEC EMMA2RH Mark-eins";
- default:
- return "Unknown NEC board";
- }
+#if defined(CONFIG_MARKEINS)
+ return "NEC EMMA2RH Mark-eins";
+#else
+#error Unknown NEC board
+#endif
}
/* [jsun@junsun.net] PMON passes arguments in C main() style */
}
#if defined(CONFIG_MARKEINS)
- mips_machtype = MACH_NEC_MARKEINS;
add_memory_region(0, EMMA2RH_RAM_SIZE, BOOT_MEM_RAM);
+#else
+#error Unknown NEC board
#endif
-
}
void __init prom_free_prom_memory(void)
struct smatch {
char *arcname;
char *liname;
- int type;
int flags;
};
{
.arcname = "SGI-IP22",
.liname = "SGI Indy",
- .type = MACH_SGI_IP22,
.flags = PROM_FLAG_ARCS,
}, {
.arcname = "SGI-IP27",
.liname = "SGI Origin",
- .type = MACH_SGI_IP27,
.flags = PROM_FLAG_ARCS,
}, {
.arcname = "SGI-IP28",
.liname = "SGI IP28",
- .type = MACH_SGI_IP28,
.flags = PROM_FLAG_ARCS,
}, {
.arcname = "SGI-IP30",
.liname = "SGI Octane",
- .type = MACH_SGI_IP30,
.flags = PROM_FLAG_ARCS,
}, {
.arcname = "SGI-IP32",
.liname = "SGI O2",
- .type = MACH_SGI_IP32,
.flags = PROM_FLAG_ARCS,
}, {
.arcname = "Microsoft-Jazz",
.liname = "Jazz MIPS_Magnum_4000",
- .type = MACH_MIPS_MAGNUM_4000,
.flags = 0,
}, {
.arcname = "PICA-61",
.liname = "Jazz Acer_PICA_61",
- .type = MACH_ACER_PICA_61,
.flags = 0,
}, {
.arcname = "RM200PCI",
.liname = "SNI RM200_PCI",
- .type = MACH_SNI_RM200_PCI,
.flags = PROM_FLAG_DONT_FREE_TEMP,
}, {
.arcname = "RM200PCI-R5K",
.liname = "SNI RM200_PCI-R5K",
- .type = MACH_SNI_RM200_PCI,
.flags = PROM_FLAG_DONT_FREE_TEMP,
}
};
mach = string_to_mach(iname);
system_type = mach->liname;
- mips_machtype = mach->type;
prom_flags = mach->flags;
}
*
* Copyright (C) 1997 Ralf Baechle
*/
+#include <linux/irqflags.h>
#include <linux/kernel.h>
#include <asm/cacheflush.h>
#include <asm/mipsregs.h>
+#include <asm/processor.h>
void wrppmc_machine_restart(char *command)
{
printk(KERN_NOTICE "You can safely turn off the power\n");
while (1) {
- __asm__(
- ".set\tmips3\n\t"
- "wait\n\t"
- ".set\tmips0"
- );
+ if (cpu_wait)
+ cpu_wait();
}
}
-
-void wrppmc_machine_power_off(void)
-{
- wrppmc_machine_halt();
-}
{
extern void wrppmc_machine_restart(char *command);
extern void wrppmc_machine_halt(void);
- extern void wrppmc_machine_power_off(void);
_machine_restart = wrppmc_machine_restart;
_machine_halt = wrppmc_machine_halt;
- pm_power_off = wrppmc_machine_power_off;
+ pm_power_off = wrppmc_machine_halt;
/* This makes the operations of 'in/out[bwl]' to the
* physical address ( < KSEG0) can work via KSEG1
set_io_port_base(JAZZ_PORT_BASE);
#ifdef CONFIG_EISA
- if (mips_machtype == MACH_MIPS_MAGNUM_4000)
- EISA_bus = 1;
+ EISA_bus = 1;
#endif
- isa_slot_offset = 0xe3000000;
/* request I/O space for devices used on all i[345]86 PCs */
for (i = 0; i < ARRAY_SIZE(jazz_io_resources); i++)
+++ /dev/null
-#
-# Makefile for the common code of TOSHIBA JMR-TX3927 board
-#
-
-obj-y += prom.o puts.o
-
-EXTRA_CFLAGS += -Werror
+++ /dev/null
-/*
- *
- * BRIEF MODULE DESCRIPTION
- * Low level uart routines to directly access a TX[34]927 SIO.
- *
- * Copyright 2001 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
- * ahennessy@mvista.com or source@mvista.com
- *
- * Copyright (C) 2000-2001 Toshiba Corporation
- *
- * Based on arch/mips/au1000/common/puts.c
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#include <asm/jmr3927/tx3927.h>
-
-#define TIMEOUT 0xffffff
-
-void
-prom_putchar(char c)
-{
- int i = 0;
-
- do {
- i++;
- if (i>TIMEOUT)
- break;
- } while (!(tx3927_sioptr(1)->cisr & TXx927_SICISR_TXALS));
- tx3927_sioptr(1)->tfifo = c;
- return;
-}
-
-void
-puts(const char *cp)
-{
- while (*cp)
- prom_putchar(*cp++);
- prom_putchar('\r');
- prom_putchar('\n');
-}
+++ /dev/null
-/*
- * Copyright 2001 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
- * ahennessy@mvista.com
- *
- * arch/mips/jmr3927/common/init.c
- *
- * Copyright (C) 2000-2001 Toshiba Corporation
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-#include <linux/init.h>
-#include <asm/bootinfo.h>
-#include <asm/jmr3927/jmr3927.h>
-
-extern void __init prom_init_cmdline(void);
-
-const char *get_system_type(void)
-{
- return "Toshiba"
-#ifdef CONFIG_TOSHIBA_JMR3927
- " JMR_TX3927"
-#endif
- ;
-}
-
-extern void puts(const char *cp);
-
-void __init prom_init(void)
-{
-#ifdef CONFIG_TOSHIBA_JMR3927
- /* CCFG */
- if ((tx3927_ccfgptr->ccfg & TX3927_CCFG_TLBOFF) == 0)
- puts("Warning: TX3927 TLB off\n");
-#endif
-
- prom_init_cmdline();
- add_memory_region(0, JMR3927_SDRAM_SIZE, BOOT_MEM_RAM);
-}
obj-$(CONFIG_CSRC_SB1250) += csrc-sb1250.o
obj-$(CONFIG_SYNC_R4K) += sync-r4k.o
-binfmt_irix-objs := irixelf.o irixinv.o irixioctl.o irixsig.o \
- irix5sys.o sysirix.o
-
obj-$(CONFIG_STACKTRACE) += stacktrace.o
obj-$(CONFIG_MODULES) += mips_ksyms.o module.o
obj-$(CONFIG_IRQ_CPU) += irq_cpu.o
obj-$(CONFIG_IRQ_CPU_RM7K) += irq-rm7000.o
obj-$(CONFIG_IRQ_CPU_RM9K) += irq-rm9000.o
-obj-$(CONFIG_MIPS_BOARDS_GEN) += irq-msc01.o
+obj-$(CONFIG_MIPS_MSC) += irq-msc01.o
obj-$(CONFIG_IRQ_TXX9) += irq_txx9.o
obj-$(CONFIG_IRQ_GT641XX) += irq-gt641xx.o
obj-$(CONFIG_IRQ_GIC) += irq-gic.o
obj-$(CONFIG_32BIT) += scall32-o32.o
obj-$(CONFIG_64BIT) += scall64-64.o
-obj-$(CONFIG_BINFMT_IRIX) += binfmt_irix.o
obj-$(CONFIG_MIPS32_COMPAT) += linux32.o ptrace32.o signal32.o
obj-$(CONFIG_MIPS32_N32) += binfmt_elfn32.o scall64-n32.o signal_n32.o
obj-$(CONFIG_MIPS32_O32) += binfmt_elfo32.o scall64-o32.o
#include <linux/console.h>
#include <linux/init.h>
+#include <asm/setup.h>
+
extern void prom_putchar(char);
static void __init
static int txx9_gpio_dir_in(struct gpio_chip *chip, unsigned int offset)
{
- spin_lock_irq(&txx9_gpio_lock);
+ unsigned long flags;
+ spin_lock_irqsave(&txx9_gpio_lock, flags);
__raw_writel(__raw_readl(&txx9_pioptr->dir) & ~(1 << offset),
&txx9_pioptr->dir);
mmiowb();
- spin_unlock_irq(&txx9_gpio_lock);
+ spin_unlock_irqrestore(&txx9_gpio_lock, flags);
return 0;
}
static int txx9_gpio_dir_out(struct gpio_chip *chip, unsigned int offset,
int value)
{
- spin_lock_irq(&txx9_gpio_lock);
+ unsigned long flags;
+ spin_lock_irqsave(&txx9_gpio_lock, flags);
txx9_gpio_set_raw(offset, value);
__raw_writel(__raw_readl(&txx9_pioptr->dir) | (1 << offset),
&txx9_pioptr->dir);
mmiowb();
- spin_unlock_irq(&txx9_gpio_lock);
+ spin_unlock_irqrestore(&txx9_gpio_lock, flags);
return 0;
}
* registered. This mechanism replaces the previous #ifdef LOCAL_APIC -
* !using_apic_timer decisions in do_timer_interrupt_hook()
*/
-struct clock_event_device pit_clockevent = {
+static struct clock_event_device pit_clockevent = {
.name = "pit",
.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
.set_mode = init_pit_timer,
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * 32-bit IRIX5 ABI system call table derived from original file 'irix5sys.h'
- * created by David S. Miller.
- *
- * Copyright (C) 1996 - 2004 David S. Miller <dm@engr.sgi.com>
- * Copyright (C) 2004 Steven J. Hill <sjhill@realitydiluted.com>
- */
-#include <asm/asm.h>
-
- /*
- * Key:
- * V == Valid and should work as expected for most cases.
- * HV == Half Valid, some things will work, some likely will not
- * IV == InValid, certainly will not work at all yet
- * ?V == ?'ably Valid, I have not done enough looking into it
- * DC == Don't Care, a rats ass we couldn't give
- */
-
- .macro irix5syscalltable
-
- sys sys_syscall 0 /* 1000 sysindir() V*/
- sys sys_exit 1 /* 1001 exit() V*/
- sys sys_fork 0 /* 1002 fork() V*/
- sys sys_read 3 /* 1003 read() V*/
- sys sys_write 3 /* 1004 write() V*/
- sys sys_open 3 /* 1005 open() V*/
- sys sys_close 1 /* 1006 close() V*/
- sys irix_unimp 0 /* 1007 (XXX IRIX 4 wait) V*/
- sys sys_creat 2 /* 1008 creat() V*/
- sys sys_link 2 /* 1009 link() V*/
- sys sys_unlink 1 /* 1010 unlink() V*/
- sys irix_exec 0 /* 1011 exec() V*/
- sys sys_chdir 1 /* 1012 chdir() V*/
- sys irix_gtime 0 /* 1013 time() V*/
- sys irix_unimp 0 /* 1014 (XXX IRIX 4 mknod) V*/
- sys sys_chmod 2 /* 1015 chmod() V*/
- sys sys_chown 3 /* 1016 chown() V*/
- sys irix_brk 1 /* 1017 break() V*/
- sys irix_unimp 0 /* 1018 (XXX IRIX 4 stat) V*/
- sys sys_lseek 3 /* 1019 lseek() XXX64bit HV*/
- sys irix_getpid 0 /* 1020 getpid() V*/
- sys irix_mount 6 /* 1021 mount() IV*/
- sys sys_umount 1 /* 1022 umount() V*/
- sys sys_setuid 1 /* 1023 setuid() V*/
- sys irix_getuid 0 /* 1024 getuid() V*/
- sys irix_stime 1 /* 1025 stime() V*/
- sys irix_unimp 4 /* 1026 XXX ptrace() IV*/
- sys irix_alarm 1 /* 1027 alarm() V*/
- sys irix_unimp 0 /* 1028 (XXX IRIX 4 fstat) V*/
- sys irix_pause 0 /* 1029 pause() V*/
- sys sys_utime 2 /* 1030 utime() V*/
- sys irix_unimp 0 /* 1031 nuthin' V*/
- sys irix_unimp 0 /* 1032 nobody home man... V*/
- sys sys_access 2 /* 1033 access() V*/
- sys sys_nice 1 /* 1034 nice() V*/
- sys irix_statfs 2 /* 1035 statfs() V*/
- sys sys_sync 0 /* 1036 sync() V*/
- sys sys_kill 2 /* 1037 kill() V*/
- sys irix_fstatfs 2 /* 1038 fstatfs() V*/
- sys irix_setpgrp 1 /* 1039 setpgrp() V*/
- sys irix_syssgi 0 /* 1040 syssgi() HV*/
- sys sys_dup 1 /* 1041 dup() V*/
- sys sys_pipe 0 /* 1042 pipe() V*/
- sys irix_times 1 /* 1043 times() V*/
- sys irix_unimp 0 /* 1044 XXX profil() IV*/
- sys irix_unimp 0 /* 1045 XXX lock() IV*/
- sys sys_setgid 1 /* 1046 setgid() V*/
- sys irix_getgid 0 /* 1047 getgid() V*/
- sys irix_unimp 0 /* 1048 (XXX IRIX 4 ssig) V*/
- sys irix_msgsys 6 /* 1049 sys_msgsys V*/
- sys sys_sysmips 4 /* 1050 sysmips() HV*/
- sys irix_unimp 0 /* 1051 XXX sysacct() IV*/
- sys irix_shmsys 5 /* 1052 sys_shmsys V*/
- sys irix_semsys 0 /* 1053 sys_semsys V*/
- sys irix_ioctl 3 /* 1054 ioctl() HV*/
- sys irix_uadmin 0 /* 1055 XXX sys_uadmin() HC*/
- sys irix_sysmp 0 /* 1056 sysmp() HV*/
- sys irix_utssys 4 /* 1057 sys_utssys() HV*/
- sys irix_unimp 0 /* 1058 nada enchilada V*/
- sys irix_exece 0 /* 1059 exece() V*/
- sys sys_umask 1 /* 1060 umask() V*/
- sys sys_chroot 1 /* 1061 chroot() V*/
- sys irix_fcntl 3 /* 1062 fcntl() ?V*/
- sys irix_ulimit 2 /* 1063 ulimit() HV*/
- sys irix_unimp 0 /* 1064 XXX AFS shit DC*/
- sys irix_unimp 0 /* 1065 XXX AFS shit DC*/
- sys irix_unimp 0 /* 1066 XXX AFS shit DC*/
- sys irix_unimp 0 /* 1067 XXX AFS shit DC*/
- sys irix_unimp 0 /* 1068 XXX AFS shit DC*/
- sys irix_unimp 0 /* 1069 XXX AFS shit DC*/
- sys irix_unimp 0 /* 1070 XXX AFS shit DC*/
- sys irix_unimp 0 /* 1071 XXX AFS shit DC*/
- sys irix_unimp 0 /* 1072 XXX AFS shit DC*/
- sys irix_unimp 0 /* 1073 XXX AFS shit DC*/
- sys irix_unimp 0 /* 1074 nuttin' V*/
- sys irix_unimp 0 /* 1075 XXX sys_getrlimit64()IV*/
- sys irix_unimp 0 /* 1076 XXX sys_setrlimit64()IV*/
- sys sys_nanosleep 2 /* 1077 nanosleep() V*/
- sys irix_lseek64 5 /* 1078 lseek64() ?V*/
- sys sys_rmdir 1 /* 1079 rmdir() V*/
- sys sys_mkdir 2 /* 1080 mkdir() V*/
- sys sys_getdents 3 /* 1081 getdents() V*/
- sys irix_sginap 1 /* 1082 sys_sginap() V*/
- sys irix_sgikopt 3 /* 1083 sys_sgikopt() DC*/
- sys sys_sysfs 3 /* 1084 sysfs() ?V*/
- sys irix_unimp 0 /* 1085 XXX sys_getmsg() DC*/
- sys irix_unimp 0 /* 1086 XXX sys_putmsg() DC*/
- sys sys_poll 3 /* 1087 poll() V*/
- sys irix_sigreturn 0 /* 1088 sigreturn() ?V*/
- sys sys_accept 3 /* 1089 accept() V*/
- sys sys_bind 3 /* 1090 bind() V*/
- sys sys_connect 3 /* 1091 connect() V*/
- sys irix_gethostid 0 /* 1092 sys_gethostid() ?V*/
- sys sys_getpeername 3 /* 1093 getpeername() V*/
- sys sys_getsockname 3 /* 1094 getsockname() V*/
- sys sys_getsockopt 5 /* 1095 getsockopt() V*/
- sys sys_listen 2 /* 1096 listen() V*/
- sys sys_recv 4 /* 1097 recv() V*/
- sys sys_recvfrom 6 /* 1098 recvfrom() V*/
- sys sys_recvmsg 3 /* 1099 recvmsg() V*/
- sys sys_select 5 /* 1100 select() V*/
- sys sys_send 4 /* 1101 send() V*/
- sys sys_sendmsg 3 /* 1102 sendmsg() V*/
- sys sys_sendto 6 /* 1103 sendto() V*/
- sys irix_sethostid 1 /* 1104 sys_sethostid() ?V*/
- sys sys_setsockopt 5 /* 1105 setsockopt() V*/
- sys sys_shutdown 2 /* 1106 shutdown() ?V*/
- sys irix_socket 3 /* 1107 socket() V*/
- sys sys_gethostname 2 /* 1108 sys_gethostname() ?V*/
- sys sys_sethostname 2 /* 1109 sethostname() ?V*/
- sys irix_getdomainname 2 /* 1110 sys_getdomainname() ?V*/
- sys sys_setdomainname 2 /* 1111 setdomainname() ?V*/
- sys sys_truncate 2 /* 1112 truncate() V*/
- sys sys_ftruncate 2 /* 1113 ftruncate() V*/
- sys sys_rename 2 /* 1114 rename() V*/
- sys sys_symlink 2 /* 1115 symlink() V*/
- sys sys_readlink 3 /* 1116 readlink() V*/
- sys irix_unimp 0 /* 1117 XXX IRIX 4 lstat() DC*/
- sys irix_unimp 0 /* 1118 nothin' V*/
- sys irix_unimp 0 /* 1119 XXX nfs_svc() DC*/
- sys irix_unimp 0 /* 1120 XXX nfs_getfh() DC*/
- sys irix_unimp 0 /* 1121 XXX async_daemon() DC*/
- sys irix_unimp 0 /* 1122 XXX exportfs() DC*/
- sys sys_setregid 2 /* 1123 setregid() V*/
- sys sys_setreuid 2 /* 1124 setreuid() V*/
- sys sys_getitimer 2 /* 1125 getitimer() V*/
- sys sys_setitimer 3 /* 1126 setitimer() V*/
- sys irix_unimp 1 /* 1127 XXX adjtime() IV*/
- sys irix_gettimeofday 1 /* 1128 gettimeofday() V*/
- sys irix_unimp 0 /* 1129 XXX sproc() IV*/
- sys irix_prctl 0 /* 1130 prctl() HV*/
- sys irix_unimp 0 /* 1131 XXX procblk() IV*/
- sys irix_unimp 0 /* 1132 XXX sprocsp() IV*/
- sys irix_unimp 0 /* 1133 XXX sgigsc() IV*/
- sys irix_mmap32 6 /* 1134 mmap() XXXflags? ?V*/
- sys sys_munmap 2 /* 1135 munmap() V*/
- sys sys_mprotect 3 /* 1136 mprotect() V*/
- sys sys_msync 4 /* 1137 msync() V*/
- sys irix_madvise 3 /* 1138 madvise() DC*/
- sys irix_pagelock 3 /* 1139 pagelock() IV*/
- sys irix_getpagesize 0 /* 1140 getpagesize() V*/
- sys irix_quotactl 0 /* 1141 quotactl() V*/
- sys irix_unimp 0 /* 1142 nobody home man V*/
- sys sys_getpgid 1 /* 1143 BSD getpgrp() V*/
- sys irix_BSDsetpgrp 2 /* 1143 BSD setpgrp() V*/
- sys sys_vhangup 0 /* 1144 vhangup() V*/
- sys sys_fsync 1 /* 1145 fsync() V*/
- sys sys_fchdir 1 /* 1146 fchdir() V*/
- sys sys_getrlimit 2 /* 1147 getrlimit() ?V*/
- sys sys_setrlimit 2 /* 1148 setrlimit() ?V*/
- sys sys_cacheflush 3 /* 1150 cacheflush() HV*/
- sys sys_cachectl 3 /* 1151 cachectl() HV*/
- sys sys_fchown 3 /* 1152 fchown() ?V*/
- sys sys_fchmod 2 /* 1153 fchmod() ?V*/
- sys irix_unimp 0 /* 1154 XXX IRIX 4 wait3() V*/
- sys sys_socketpair 4 /* 1155 socketpair() V*/
- sys irix_systeminfo 3 /* 1156 systeminfo() IV*/
- sys irix_uname 1 /* 1157 uname() IV*/
- sys irix_xstat 3 /* 1158 xstat() V*/
- sys irix_lxstat 3 /* 1159 lxstat() V*/
- sys irix_fxstat 3 /* 1160 fxstat() V*/
- sys irix_xmknod 0 /* 1161 xmknod() ?V*/
- sys irix_sigaction 4 /* 1162 sigaction() ?V*/
- sys irix_sigpending 1 /* 1163 sigpending() ?V*/
- sys irix_sigprocmask 3 /* 1164 sigprocmask() ?V*/
- sys irix_sigsuspend 0 /* 1165 sigsuspend() ?V*/
- sys irix_sigpoll_sys 3 /* 1166 sigpoll_sys() IV*/
- sys irix_swapctl 2 /* 1167 swapctl() IV*/
- sys irix_getcontext 0 /* 1168 getcontext() HV*/
- sys irix_setcontext 0 /* 1169 setcontext() HV*/
- sys irix_waitsys 5 /* 1170 waitsys() IV*/
- sys irix_sigstack 2 /* 1171 sigstack() HV*/
- sys irix_sigaltstack 2 /* 1172 sigaltstack() HV*/
- sys irix_sigsendset 2 /* 1173 sigsendset() IV*/
- sys irix_statvfs 2 /* 1174 statvfs() V*/
- sys irix_fstatvfs 2 /* 1175 fstatvfs() V*/
- sys irix_unimp 0 /* 1176 XXX getpmsg() DC*/
- sys irix_unimp 0 /* 1177 XXX putpmsg() DC*/
- sys sys_lchown 3 /* 1178 lchown() V*/
- sys irix_priocntl 0 /* 1179 priocntl() DC*/
- sys irix_sigqueue 4 /* 1180 sigqueue() IV*/
- sys sys_readv 3 /* 1181 readv() V*/
- sys sys_writev 3 /* 1182 writev() V*/
- sys irix_truncate64 4 /* 1183 truncate64() XX32bit HV*/
- sys irix_ftruncate64 4 /* 1184 ftruncate64()XX32bit HV*/
- sys irix_mmap64 0 /* 1185 mmap64() XX32bit HV*/
- sys irix_dmi 0 /* 1186 dmi() DC*/
- sys irix_pread 6 /* 1187 pread() IV*/
- sys irix_pwrite 6 /* 1188 pwrite() IV*/
- sys sys_fsync 1 /* 1189 fdatasync() XXPOSIX HV*/
- sys irix_sgifastpath 7 /* 1190 sgifastpath() WHEEE IV*/
- sys irix_unimp 0 /* 1191 XXX attr_get() DC*/
- sys irix_unimp 0 /* 1192 XXX attr_getf() DC*/
- sys irix_unimp 0 /* 1193 XXX attr_set() DC*/
- sys irix_unimp 0 /* 1194 XXX attr_setf() DC*/
- sys irix_unimp 0 /* 1195 XXX attr_remove() DC*/
- sys irix_unimp 0 /* 1196 XXX attr_removef() DC*/
- sys irix_unimp 0 /* 1197 XXX attr_list() DC*/
- sys irix_unimp 0 /* 1198 XXX attr_listf() DC*/
- sys irix_unimp 0 /* 1199 XXX attr_multi() DC*/
- sys irix_unimp 0 /* 1200 XXX attr_multif() DC*/
- sys irix_statvfs64 2 /* 1201 statvfs64() V*/
- sys irix_fstatvfs64 2 /* 1202 fstatvfs64() V*/
- sys irix_getmountid 2 /* 1203 getmountid()XXXfsids HV*/
- sys irix_nsproc 5 /* 1204 nsproc() IV*/
- sys irix_getdents64 3 /* 1205 getdents64() HV*/
- sys irix_unimp 0 /* 1206 XXX DFS garbage DC*/
- sys irix_ngetdents 4 /* 1207 ngetdents() XXXeop HV*/
- sys irix_ngetdents64 4 /* 1208 ngetdents64() XXXeop HV*/
- sys irix_unimp 0 /* 1209 nothin' V*/
- sys irix_unimp 0 /* 1210 XXX pidsprocsp() */
- sys irix_unimp 0 /* 1211 XXX rexec() */
- sys irix_unimp 0 /* 1212 XXX timer_create() */
- sys irix_unimp 0 /* 1213 XXX timer_delete() */
- sys irix_unimp 0 /* 1214 XXX timer_settime() */
- sys irix_unimp 0 /* 1215 XXX timer_gettime() */
- sys irix_unimp 0 /* 1216 XXX timer_setoverrun() */
- sys sys_sched_rr_get_interval 2 /* 1217 sched_rr_get_interval()V*/
- sys sys_sched_yield 0 /* 1218 sched_yield() V*/
- sys sys_sched_getscheduler 1 /* 1219 sched_getscheduler() V*/
- sys sys_sched_setscheduler 3 /* 1220 sched_setscheduler() V*/
- sys sys_sched_getparam 2 /* 1221 sched_getparam() V*/
- sys sys_sched_setparam 2 /* 1222 sched_setparam() V*/
- sys irix_unimp 0 /* 1223 XXX usync_cntl() */
- sys irix_unimp 0 /* 1224 XXX psema_cntl() */
- sys irix_unimp 0 /* 1225 XXX restartreturn() */
-
- /* Just to pad things out nicely. */
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
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-
- .endm
-
- /*
- * Pre-compute the number of _instruction_ bytes needed to load
- * or store the arguments 6-8. Negative values are ignored.
- */
- .macro sys function, nargs
- PTR \function
- LONG (\nargs << 2) - (5 << 2)
- .endm
-
- .align 4
-EXPORT(sys_call_table_irix5)
- irix5syscalltable
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * irixelf.c: Code to load IRIX ELF executables conforming to the MIPS ABI.
- * Based off of work by Eric Youngdale.
- *
- * Copyright (C) 1993 - 1994 Eric Youngdale <ericy@cais.com>
- * Copyright (C) 1996 - 2004 David S. Miller <dm@engr.sgi.com>
- * Copyright (C) 2004 - 2005 Steven J. Hill <sjhill@realitydiluted.com>
- */
-#undef DEBUG
-
-#include <linux/module.h>
-#include <linux/fs.h>
-#include <linux/stat.h>
-#include <linux/sched.h>
-#include <linux/mm.h>
-#include <linux/mman.h>
-#include <linux/a.out.h>
-#include <linux/errno.h>
-#include <linux/init.h>
-#include <linux/signal.h>
-#include <linux/binfmts.h>
-#include <linux/string.h>
-#include <linux/file.h>
-#include <linux/fcntl.h>
-#include <linux/ptrace.h>
-#include <linux/slab.h>
-#include <linux/shm.h>
-#include <linux/personality.h>
-#include <linux/elfcore.h>
-
-#include <asm/mipsregs.h>
-#include <asm/namei.h>
-#include <asm/prctl.h>
-#include <asm/uaccess.h>
-
-#define DLINFO_ITEMS 12
-
-#include <linux/elf.h>
-
-static int load_irix_binary(struct linux_binprm * bprm, struct pt_regs * regs);
-static int load_irix_library(struct file *);
-static int irix_core_dump(long signr, struct pt_regs * regs,
- struct file *file, unsigned long limit);
-
-static struct linux_binfmt irix_format = {
- .module = THIS_MODULE,
- .load_binary = load_irix_binary,
- .load_shlib = load_irix_library,
- .core_dump = irix_core_dump,
- .min_coredump = PAGE_SIZE,
-};
-
-/* Debugging routines. */
-static char *get_elf_p_type(Elf32_Word p_type)
-{
-#ifdef DEBUG
- switch (p_type) {
- case PT_NULL:
- return "PT_NULL";
- break;
-
- case PT_LOAD:
- return "PT_LOAD";
- break;
-
- case PT_DYNAMIC:
- return "PT_DYNAMIC";
- break;
-
- case PT_INTERP:
- return "PT_INTERP";
- break;
-
- case PT_NOTE:
- return "PT_NOTE";
- break;
-
- case PT_SHLIB:
- return "PT_SHLIB";
- break;
-
- case PT_PHDR:
- return "PT_PHDR";
- break;
-
- case PT_LOPROC:
- return "PT_LOPROC/REGINFO";
- break;
-
- case PT_HIPROC:
- return "PT_HIPROC";
- break;
-
- default:
- return "PT_BOGUS";
- break;
- }
-#endif
-}
-
-static void print_elfhdr(struct elfhdr *ehp)
-{
- int i;
-
- pr_debug("ELFHDR: e_ident<");
- for (i = 0; i < (EI_NIDENT - 1); i++)
- pr_debug("%x ", ehp->e_ident[i]);
- pr_debug("%x>\n", ehp->e_ident[i]);
- pr_debug(" e_type[%04x] e_machine[%04x] e_version[%08lx]\n",
- (unsigned short) ehp->e_type, (unsigned short) ehp->e_machine,
- (unsigned long) ehp->e_version);
- pr_debug(" e_entry[%08lx] e_phoff[%08lx] e_shoff[%08lx] "
- "e_flags[%08lx]\n",
- (unsigned long) ehp->e_entry, (unsigned long) ehp->e_phoff,
- (unsigned long) ehp->e_shoff, (unsigned long) ehp->e_flags);
- pr_debug(" e_ehsize[%04x] e_phentsize[%04x] e_phnum[%04x]\n",
- (unsigned short) ehp->e_ehsize,
- (unsigned short) ehp->e_phentsize,
- (unsigned short) ehp->e_phnum);
- pr_debug(" e_shentsize[%04x] e_shnum[%04x] e_shstrndx[%04x]\n",
- (unsigned short) ehp->e_shentsize,
- (unsigned short) ehp->e_shnum,
- (unsigned short) ehp->e_shstrndx);
-}
-
-static void print_phdr(int i, struct elf_phdr *ep)
-{
- pr_debug("PHDR[%d]: p_type[%s] p_offset[%08lx] p_vaddr[%08lx] "
- "p_paddr[%08lx]\n", i, get_elf_p_type(ep->p_type),
- (unsigned long) ep->p_offset, (unsigned long) ep->p_vaddr,
- (unsigned long) ep->p_paddr);
- pr_debug(" p_filesz[%08lx] p_memsz[%08lx] p_flags[%08lx] "
- "p_align[%08lx]\n", (unsigned long) ep->p_filesz,
- (unsigned long) ep->p_memsz, (unsigned long) ep->p_flags,
- (unsigned long) ep->p_align);
-}
-
-static void dump_phdrs(struct elf_phdr *ep, int pnum)
-{
- int i;
-
- for (i = 0; i < pnum; i++, ep++) {
- if ((ep->p_type == PT_LOAD) ||
- (ep->p_type == PT_INTERP) ||
- (ep->p_type == PT_PHDR))
- print_phdr(i, ep);
- }
-}
-
-static void set_brk(unsigned long start, unsigned long end)
-{
- start = PAGE_ALIGN(start);
- end = PAGE_ALIGN(end);
- if (end <= start)
- return;
- down_write(¤t->mm->mmap_sem);
- do_brk(start, end - start);
- up_write(¤t->mm->mmap_sem);
-}
-
-
-/* We need to explicitly zero any fractional pages
- * after the data section (i.e. bss). This would
- * contain the junk from the file that should not
- * be in memory.
- */
-static void padzero(unsigned long elf_bss)
-{
- unsigned long nbyte;
-
- nbyte = elf_bss & (PAGE_SIZE-1);
- if (nbyte) {
- nbyte = PAGE_SIZE - nbyte;
- clear_user((void __user *) elf_bss, nbyte);
- }
-}
-
-static unsigned long * create_irix_tables(char * p, int argc, int envc,
- struct elfhdr * exec, unsigned int load_addr,
- unsigned int interp_load_addr, struct pt_regs *regs,
- struct elf_phdr *ephdr)
-{
- elf_addr_t *argv;
- elf_addr_t *envp;
- elf_addr_t *sp, *csp;
-
- pr_debug("create_irix_tables: p[%p] argc[%d] envc[%d] "
- "load_addr[%08x] interp_load_addr[%08x]\n",
- p, argc, envc, load_addr, interp_load_addr);
-
- sp = (elf_addr_t *) (~15UL & (unsigned long) p);
- csp = sp;
- csp -= exec ? DLINFO_ITEMS*2 : 2;
- csp -= envc+1;
- csp -= argc+1;
- csp -= 1; /* argc itself */
- if ((unsigned long)csp & 15UL) {
- sp -= (16UL - ((unsigned long)csp & 15UL)) / sizeof(*sp);
- }
-
- /*
- * Put the ELF interpreter info on the stack
- */
-#define NEW_AUX_ENT(nr, id, val) \
- __put_user((id), sp+(nr*2)); \
- __put_user((val), sp+(nr*2+1)); \
-
- sp -= 2;
- NEW_AUX_ENT(0, AT_NULL, 0);
-
- if (exec) {
- sp -= 11*2;
-
- NEW_AUX_ENT(0, AT_PHDR, load_addr + exec->e_phoff);
- NEW_AUX_ENT(1, AT_PHENT, sizeof(struct elf_phdr));
- NEW_AUX_ENT(2, AT_PHNUM, exec->e_phnum);
- NEW_AUX_ENT(3, AT_PAGESZ, ELF_EXEC_PAGESIZE);
- NEW_AUX_ENT(4, AT_BASE, interp_load_addr);
- NEW_AUX_ENT(5, AT_FLAGS, 0);
- NEW_AUX_ENT(6, AT_ENTRY, (elf_addr_t) exec->e_entry);
- NEW_AUX_ENT(7, AT_UID, (elf_addr_t) current->uid);
- NEW_AUX_ENT(8, AT_EUID, (elf_addr_t) current->euid);
- NEW_AUX_ENT(9, AT_GID, (elf_addr_t) current->gid);
- NEW_AUX_ENT(10, AT_EGID, (elf_addr_t) current->egid);
- }
-#undef NEW_AUX_ENT
-
- sp -= envc+1;
- envp = sp;
- sp -= argc+1;
- argv = sp;
-
- __put_user((elf_addr_t)argc, --sp);
- current->mm->arg_start = (unsigned long) p;
- while (argc-->0) {
- __put_user((unsigned long)p, argv++);
- p += strlen_user(p);
- }
- __put_user((unsigned long) NULL, argv);
- current->mm->arg_end = current->mm->env_start = (unsigned long) p;
- while (envc-->0) {
- __put_user((unsigned long)p, envp++);
- p += strlen_user(p);
- }
- __put_user((unsigned long) NULL, envp);
- current->mm->env_end = (unsigned long) p;
- return sp;
-}
-
-
-/* This is much more generalized than the library routine read function,
- * so we keep this separate. Technically the library read function
- * is only provided so that we can read a.out libraries that have
- * an ELF header.
- */
-static unsigned int load_irix_interp(struct elfhdr * interp_elf_ex,
- struct file * interpreter,
- unsigned int *interp_load_addr)
-{
- struct elf_phdr *elf_phdata = NULL;
- struct elf_phdr *eppnt;
- unsigned int len;
- unsigned int load_addr;
- int elf_bss;
- int retval;
- unsigned int last_bss;
- int error;
- int i;
- unsigned int k;
-
- elf_bss = 0;
- last_bss = 0;
- error = load_addr = 0;
-
- print_elfhdr(interp_elf_ex);
-
- /* First of all, some simple consistency checks */
- if ((interp_elf_ex->e_type != ET_EXEC &&
- interp_elf_ex->e_type != ET_DYN) ||
- !interpreter->f_op->mmap) {
- printk("IRIX interp has bad e_type %d\n", interp_elf_ex->e_type);
- return 0xffffffff;
- }
-
- /* Now read in all of the header information */
- if (sizeof(struct elf_phdr) * interp_elf_ex->e_phnum > PAGE_SIZE) {
- printk("IRIX interp header bigger than a page (%d)\n",
- (sizeof(struct elf_phdr) * interp_elf_ex->e_phnum));
- return 0xffffffff;
- }
-
- elf_phdata = kmalloc(sizeof(struct elf_phdr) * interp_elf_ex->e_phnum,
- GFP_KERNEL);
-
- if (!elf_phdata) {
- printk("Cannot kmalloc phdata for IRIX interp.\n");
- return 0xffffffff;
- }
-
- /* If the size of this structure has changed, then punt, since
- * we will be doing the wrong thing.
- */
- if (interp_elf_ex->e_phentsize != 32) {
- printk("IRIX interp e_phentsize == %d != 32 ",
- interp_elf_ex->e_phentsize);
- kfree(elf_phdata);
- return 0xffffffff;
- }
-
- retval = kernel_read(interpreter, interp_elf_ex->e_phoff,
- (char *) elf_phdata,
- sizeof(struct elf_phdr) * interp_elf_ex->e_phnum);
-
- dump_phdrs(elf_phdata, interp_elf_ex->e_phnum);
-
- eppnt = elf_phdata;
- for (i = 0; i < interp_elf_ex->e_phnum; i++, eppnt++) {
- if (eppnt->p_type == PT_LOAD) {
- int elf_type = MAP_PRIVATE | MAP_DENYWRITE;
- int elf_prot = 0;
- unsigned long vaddr = 0;
- if (eppnt->p_flags & PF_R)
- elf_prot = PROT_READ;
- if (eppnt->p_flags & PF_W)
- elf_prot |= PROT_WRITE;
- if (eppnt->p_flags & PF_X)
- elf_prot |= PROT_EXEC;
- elf_type |= MAP_FIXED;
- vaddr = eppnt->p_vaddr;
-
- pr_debug("INTERP do_mmap"
- "(%p, %08lx, %08lx, %08lx, %08lx, %08lx) ",
- interpreter, vaddr,
- (unsigned long)
- (eppnt->p_filesz + (eppnt->p_vaddr & 0xfff)),
- (unsigned long)
- elf_prot, (unsigned long) elf_type,
- (unsigned long)
- (eppnt->p_offset & 0xfffff000));
-
- down_write(¤t->mm->mmap_sem);
- error = do_mmap(interpreter, vaddr,
- eppnt->p_filesz + (eppnt->p_vaddr & 0xfff),
- elf_prot, elf_type,
- eppnt->p_offset & 0xfffff000);
- up_write(¤t->mm->mmap_sem);
-
- if (error < 0 && error > -1024) {
- printk("Aieee IRIX interp mmap error=%d\n",
- error);
- break; /* Real error */
- }
- pr_debug("error=%08lx ", (unsigned long) error);
- if (!load_addr && interp_elf_ex->e_type == ET_DYN) {
- load_addr = error;
- pr_debug("load_addr = error ");
- }
-
- /*
- * Find the end of the file mapping for this phdr, and
- * keep track of the largest address we see for this.
- */
- k = eppnt->p_vaddr + eppnt->p_filesz;
- if (k > elf_bss)
- elf_bss = k;
-
- /* Do the same thing for the memory mapping - between
- * elf_bss and last_bss is the bss section.
- */
- k = eppnt->p_memsz + eppnt->p_vaddr;
- if (k > last_bss)
- last_bss = k;
- pr_debug("\n");
- }
- }
-
- /* Now use mmap to map the library into memory. */
- if (error < 0 && error > -1024) {
- pr_debug("got error %d\n", error);
- kfree(elf_phdata);
- return 0xffffffff;
- }
-
- /* Now fill out the bss section. First pad the last page up
- * to the page boundary, and then perform a mmap to make sure
- * that there are zero-mapped pages up to and including the
- * last bss page.
- */
- pr_debug("padzero(%08lx) ", (unsigned long) (elf_bss));
- padzero(elf_bss);
- len = (elf_bss + 0xfff) & 0xfffff000; /* What we have mapped so far */
-
- pr_debug("last_bss[%08lx] len[%08lx]\n", (unsigned long) last_bss,
- (unsigned long) len);
-
- /* Map the last of the bss segment */
- if (last_bss > len) {
- down_write(¤t->mm->mmap_sem);
- do_brk(len, (last_bss - len));
- up_write(¤t->mm->mmap_sem);
- }
- kfree(elf_phdata);
-
- *interp_load_addr = load_addr;
- return ((unsigned int) interp_elf_ex->e_entry);
-}
-
-/* Check sanity of IRIX elf executable header. */
-static int verify_binary(struct elfhdr *ehp, struct linux_binprm *bprm)
-{
- if (memcmp(ehp->e_ident, ELFMAG, SELFMAG) != 0)
- return -ENOEXEC;
-
- /* First of all, some simple consistency checks */
- if ((ehp->e_type != ET_EXEC && ehp->e_type != ET_DYN) ||
- !bprm->file->f_op->mmap) {
- return -ENOEXEC;
- }
-
- /* XXX Don't support N32 or 64bit binaries yet because they can
- * XXX and do execute 64 bit instructions and expect all registers
- * XXX to be 64 bit as well. We need to make the kernel save
- * XXX all registers as 64bits on cpu's capable of this at
- * XXX exception time plus frob the XTLB exception vector.
- */
- if ((ehp->e_flags & EF_MIPS_ABI2))
- return -ENOEXEC;
-
- return 0;
-}
-
-/*
- * This is where the detailed check is performed. Irix binaries
- * use interpreters with 'libc.so' in the name, so this function
- * can differentiate between Linux and Irix binaries.
- */
-static inline int look_for_irix_interpreter(char **name,
- struct file **interpreter,
- struct elfhdr *interp_elf_ex,
- struct elf_phdr *epp,
- struct linux_binprm *bprm, int pnum)
-{
- int i;
- int retval = -EINVAL;
- struct file *file = NULL;
-
- *name = NULL;
- for (i = 0; i < pnum; i++, epp++) {
- if (epp->p_type != PT_INTERP)
- continue;
-
- /* It is illegal to have two interpreters for one executable. */
- if (*name != NULL)
- goto out;
-
- *name = kmalloc(epp->p_filesz + strlen(IRIX_EMUL), GFP_KERNEL);
- if (!*name)
- return -ENOMEM;
-
- strcpy(*name, IRIX_EMUL);
- retval = kernel_read(bprm->file, epp->p_offset, (*name + 16),
- epp->p_filesz);
- if (retval < 0)
- goto out;
-
- file = open_exec(*name);
- if (IS_ERR(file)) {
- retval = PTR_ERR(file);
- goto out;
- }
- retval = kernel_read(file, 0, bprm->buf, 128);
- if (retval < 0)
- goto dput_and_out;
-
- *interp_elf_ex = *(struct elfhdr *) bprm->buf;
- }
- *interpreter = file;
- return 0;
-
-dput_and_out:
- fput(file);
-out:
- kfree(*name);
- return retval;
-}
-
-static inline int verify_irix_interpreter(struct elfhdr *ihp)
-{
- if (memcmp(ihp->e_ident, ELFMAG, SELFMAG) != 0)
- return -ELIBBAD;
- return 0;
-}
-
-#define EXEC_MAP_FLAGS (MAP_FIXED | MAP_PRIVATE | MAP_DENYWRITE | MAP_EXECUTABLE)
-
-static inline void map_executable(struct file *fp, struct elf_phdr *epp, int pnum,
- unsigned int *estack, unsigned int *laddr,
- unsigned int *scode, unsigned int *ebss,
- unsigned int *ecode, unsigned int *edata,
- unsigned int *ebrk)
-{
- unsigned int tmp;
- int i, prot;
-
- for (i = 0; i < pnum; i++, epp++) {
- if (epp->p_type != PT_LOAD)
- continue;
-
- /* Map it. */
- prot = (epp->p_flags & PF_R) ? PROT_READ : 0;
- prot |= (epp->p_flags & PF_W) ? PROT_WRITE : 0;
- prot |= (epp->p_flags & PF_X) ? PROT_EXEC : 0;
- down_write(¤t->mm->mmap_sem);
- (void) do_mmap(fp, (epp->p_vaddr & 0xfffff000),
- (epp->p_filesz + (epp->p_vaddr & 0xfff)),
- prot, EXEC_MAP_FLAGS,
- (epp->p_offset & 0xfffff000));
- up_write(¤t->mm->mmap_sem);
-
- /* Fixup location tracking vars. */
- if ((epp->p_vaddr & 0xfffff000) < *estack)
- *estack = (epp->p_vaddr & 0xfffff000);
- if (!*laddr)
- *laddr = epp->p_vaddr - epp->p_offset;
- if (epp->p_vaddr < *scode)
- *scode = epp->p_vaddr;
-
- tmp = epp->p_vaddr + epp->p_filesz;
- if (tmp > *ebss)
- *ebss = tmp;
- if ((epp->p_flags & PF_X) && *ecode < tmp)
- *ecode = tmp;
- if (*edata < tmp)
- *edata = tmp;
-
- tmp = epp->p_vaddr + epp->p_memsz;
- if (tmp > *ebrk)
- *ebrk = tmp;
- }
-
-}
-
-static inline int map_interpreter(struct elf_phdr *epp, struct elfhdr *ihp,
- struct file *interp, unsigned int *iladdr,
- int pnum, mm_segment_t old_fs,
- unsigned int *eentry)
-{
- int i;
-
- *eentry = 0xffffffff;
- for (i = 0; i < pnum; i++, epp++) {
- if (epp->p_type != PT_INTERP)
- continue;
-
- /* We should have fielded this error elsewhere... */
- if (*eentry != 0xffffffff)
- return -1;
-
- set_fs(old_fs);
- *eentry = load_irix_interp(ihp, interp, iladdr);
- old_fs = get_fs();
- set_fs(get_ds());
-
- fput(interp);
-
- if (*eentry == 0xffffffff)
- return -1;
- }
- return 0;
-}
-
-/*
- * IRIX maps a page at 0x200000 that holds information about the
- * process and the system, here we map the page and fill the
- * structure
- */
-static int irix_map_prda_page(void)
-{
- unsigned long v;
- struct prda *pp;
-
- down_write(¤t->mm->mmap_sem);
- v = do_brk(PRDA_ADDRESS, PAGE_SIZE);
- up_write(¤t->mm->mmap_sem);
-
- if (v != PRDA_ADDRESS)
- return v; /* v must be an error code */
-
- pp = (struct prda *) v;
- pp->prda_sys.t_pid = task_pid_vnr(current);
- pp->prda_sys.t_prid = read_c0_prid();
- pp->prda_sys.t_rpid = task_pid_vnr(current);
-
- /* We leave the rest set to zero */
-
- return 0;
-}
-
-
-
-/* These are the functions used to load ELF style executables and shared
- * libraries. There is no binary dependent code anywhere else.
- */
-static int load_irix_binary(struct linux_binprm * bprm, struct pt_regs * regs)
-{
- struct elfhdr elf_ex, interp_elf_ex;
- struct file *interpreter;
- struct elf_phdr *elf_phdata, *elf_ihdr, *elf_ephdr;
- unsigned int load_addr, elf_bss, elf_brk;
- unsigned int elf_entry, interp_load_addr = 0;
- unsigned int start_code, end_code, end_data, elf_stack;
- int retval, has_interp, has_ephdr, size, i;
- char *elf_interpreter;
- mm_segment_t old_fs;
-
- load_addr = 0;
- has_interp = has_ephdr = 0;
- elf_ihdr = elf_ephdr = NULL;
- elf_ex = *((struct elfhdr *) bprm->buf);
- retval = -ENOEXEC;
-
- if (verify_binary(&elf_ex, bprm))
- goto out;
-
- /*
- * Telling -o32 static binaries from Linux and Irix apart from each
- * other is difficult. There are 2 differences to be noted for static
- * binaries from the 2 operating systems:
- *
- * 1) Irix binaries have their .text section before their .init
- * section. Linux binaries are just the opposite.
- *
- * 2) Irix binaries usually have <= 12 sections and Linux
- * binaries have > 20.
- *
- * We will use Method #2 since Method #1 would require us to read in
- * the section headers which is way too much overhead. This appears
- * to work for everything we have ran into so far. If anyone has a
- * better method to tell the binaries apart, I'm listening.
- */
- if (elf_ex.e_shnum > 20)
- goto out;
-
- print_elfhdr(&elf_ex);
-
- /* Now read in all of the header information */
- size = elf_ex.e_phentsize * elf_ex.e_phnum;
- if (size > 65536)
- goto out;
- elf_phdata = kmalloc(size, GFP_KERNEL);
- if (elf_phdata == NULL) {
- retval = -ENOMEM;
- goto out;
- }
-
- retval = kernel_read(bprm->file, elf_ex.e_phoff, (char *)elf_phdata, size);
- if (retval < 0)
- goto out_free_ph;
-
- dump_phdrs(elf_phdata, elf_ex.e_phnum);
-
- /* Set some things for later. */
- for (i = 0; i < elf_ex.e_phnum; i++) {
- switch (elf_phdata[i].p_type) {
- case PT_INTERP:
- has_interp = 1;
- elf_ihdr = &elf_phdata[i];
- break;
- case PT_PHDR:
- has_ephdr = 1;
- elf_ephdr = &elf_phdata[i];
- break;
- };
- }
-
- pr_debug("\n");
-
- elf_bss = 0;
- elf_brk = 0;
-
- elf_stack = 0xffffffff;
- elf_interpreter = NULL;
- start_code = 0xffffffff;
- end_code = 0;
- end_data = 0;
-
- /*
- * If we get a return value, we change the value to be ENOEXEC
- * so that we can exit gracefully and the main binary format
- * search loop in 'fs/exec.c' will move onto the next handler
- * which should be the normal ELF binary handler.
- */
- retval = look_for_irix_interpreter(&elf_interpreter, &interpreter,
- &interp_elf_ex, elf_phdata, bprm,
- elf_ex.e_phnum);
- if (retval) {
- retval = -ENOEXEC;
- goto out_free_file;
- }
-
- if (elf_interpreter) {
- retval = verify_irix_interpreter(&interp_elf_ex);
- if (retval)
- goto out_free_interp;
- }
-
- /* OK, we are done with that, now set up the arg stuff,
- * and then start this sucker up.
- */
- retval = -E2BIG;
- if (!bprm->sh_bang && !bprm->p)
- goto out_free_interp;
-
- /* Flush all traces of the currently running executable */
- retval = flush_old_exec(bprm);
- if (retval)
- goto out_free_dentry;
-
- /* OK, This is the point of no return */
- current->mm->end_data = 0;
- current->mm->end_code = 0;
- current->mm->mmap = NULL;
- current->flags &= ~PF_FORKNOEXEC;
- elf_entry = (unsigned int) elf_ex.e_entry;
-
- /* Do this so that we can load the interpreter, if need be. We will
- * change some of these later.
- */
- setup_arg_pages(bprm, STACK_TOP, EXSTACK_DEFAULT);
- current->mm->start_stack = bprm->p;
-
- /* At this point, we assume that the image should be loaded at
- * fixed address, not at a variable address.
- */
- old_fs = get_fs();
- set_fs(get_ds());
-
- map_executable(bprm->file, elf_phdata, elf_ex.e_phnum, &elf_stack,
- &load_addr, &start_code, &elf_bss, &end_code,
- &end_data, &elf_brk);
-
- if (elf_interpreter) {
- retval = map_interpreter(elf_phdata, &interp_elf_ex,
- interpreter, &interp_load_addr,
- elf_ex.e_phnum, old_fs, &elf_entry);
- kfree(elf_interpreter);
- if (retval) {
- set_fs(old_fs);
- printk("Unable to load IRIX ELF interpreter\n");
- send_sig(SIGSEGV, current, 0);
- retval = 0;
- goto out_free_file;
- }
- }
-
- set_fs(old_fs);
-
- kfree(elf_phdata);
- set_personality(PER_IRIX32);
- set_binfmt(&irix_format);
- compute_creds(bprm);
- current->flags &= ~PF_FORKNOEXEC;
- bprm->p = (unsigned long)
- create_irix_tables((char *)bprm->p, bprm->argc, bprm->envc,
- (elf_interpreter ? &elf_ex : NULL),
- load_addr, interp_load_addr, regs, elf_ephdr);
- current->mm->start_brk = current->mm->brk = elf_brk;
- current->mm->end_code = end_code;
- current->mm->start_code = start_code;
- current->mm->end_data = end_data;
- current->mm->start_stack = bprm->p;
-
- /* Calling set_brk effectively mmaps the pages that we need for the
- * bss and break sections.
- */
- set_brk(elf_bss, elf_brk);
-
- /*
- * IRIX maps a page at 0x200000 which holds some system
- * information. Programs depend on this.
- */
- if (irix_map_prda_page())
- goto out_free_dentry;
-
- padzero(elf_bss);
-
- pr_debug("(start_brk) %lx\n" , (long) current->mm->start_brk);
- pr_debug("(end_code) %lx\n" , (long) current->mm->end_code);
- pr_debug("(start_code) %lx\n" , (long) current->mm->start_code);
- pr_debug("(end_data) %lx\n" , (long) current->mm->end_data);
- pr_debug("(start_stack) %lx\n" , (long) current->mm->start_stack);
- pr_debug("(brk) %lx\n" , (long) current->mm->brk);
-
-#if 0 /* XXX No fucking way dude... */
- /* Why this, you ask??? Well SVr4 maps page 0 as read-only,
- * and some applications "depend" upon this behavior.
- * Since we do not have the power to recompile these, we
- * emulate the SVr4 behavior. Sigh.
- */
- down_write(¤t->mm->mmap_sem);
- (void) do_mmap(NULL, 0, 4096, PROT_READ | PROT_EXEC,
- MAP_FIXED | MAP_PRIVATE, 0);
- up_write(¤t->mm->mmap_sem);
-#endif
-
- start_thread(regs, elf_entry, bprm->p);
- if (current->ptrace & PT_PTRACED)
- send_sig(SIGTRAP, current, 0);
- return 0;
-out:
- return retval;
-
-out_free_dentry:
- allow_write_access(interpreter);
- fput(interpreter);
-out_free_interp:
- kfree(elf_interpreter);
-out_free_file:
-out_free_ph:
- kfree(elf_phdata);
- goto out;
-}
-
-/* This is really simpleminded and specialized - we are loading an
- * a.out library that is given an ELF header.
- */
-static int load_irix_library(struct file *file)
-{
- struct elfhdr elf_ex;
- struct elf_phdr *elf_phdata = NULL;
- unsigned int len = 0;
- int elf_bss = 0;
- int retval;
- unsigned int bss;
- int error;
- int i, j, k;
-
- error = kernel_read(file, 0, (char *) &elf_ex, sizeof(elf_ex));
- if (error != sizeof(elf_ex))
- return -ENOEXEC;
-
- if (memcmp(elf_ex.e_ident, ELFMAG, SELFMAG) != 0)
- return -ENOEXEC;
-
- /* First of all, some simple consistency checks. */
- if (elf_ex.e_type != ET_EXEC || elf_ex.e_phnum > 2 ||
- !file->f_op->mmap)
- return -ENOEXEC;
-
- /* Now read in all of the header information. */
- if (sizeof(struct elf_phdr) * elf_ex.e_phnum > PAGE_SIZE)
- return -ENOEXEC;
-
- elf_phdata = kmalloc(sizeof(struct elf_phdr) * elf_ex.e_phnum, GFP_KERNEL);
- if (elf_phdata == NULL)
- return -ENOMEM;
-
- retval = kernel_read(file, elf_ex.e_phoff, (char *) elf_phdata,
- sizeof(struct elf_phdr) * elf_ex.e_phnum);
-
- j = 0;
- for (i=0; i<elf_ex.e_phnum; i++)
- if ((elf_phdata + i)->p_type == PT_LOAD) j++;
-
- if (j != 1) {
- kfree(elf_phdata);
- return -ENOEXEC;
- }
-
- while (elf_phdata->p_type != PT_LOAD) elf_phdata++;
-
- /* Now use mmap to map the library into memory. */
- down_write(¤t->mm->mmap_sem);
- error = do_mmap(file,
- elf_phdata->p_vaddr & 0xfffff000,
- elf_phdata->p_filesz + (elf_phdata->p_vaddr & 0xfff),
- PROT_READ | PROT_WRITE | PROT_EXEC,
- MAP_FIXED | MAP_PRIVATE | MAP_DENYWRITE,
- elf_phdata->p_offset & 0xfffff000);
- up_write(¤t->mm->mmap_sem);
-
- k = elf_phdata->p_vaddr + elf_phdata->p_filesz;
- if (k > elf_bss) elf_bss = k;
-
- if (error != (elf_phdata->p_vaddr & 0xfffff000)) {
- kfree(elf_phdata);
- return error;
- }
-
- padzero(elf_bss);
-
- len = (elf_phdata->p_filesz + elf_phdata->p_vaddr+ 0xfff) & 0xfffff000;
- bss = elf_phdata->p_memsz + elf_phdata->p_vaddr;
- if (bss > len) {
- down_write(¤t->mm->mmap_sem);
- do_brk(len, bss-len);
- up_write(¤t->mm->mmap_sem);
- }
- kfree(elf_phdata);
- return 0;
-}
-
-/* Called through irix_syssgi() to map an elf image given an FD,
- * a phdr ptr USER_PHDRP in userspace, and a count CNT telling how many
- * phdrs there are in the USER_PHDRP array. We return the vaddr the
- * first phdr was successfully mapped to.
- */
-unsigned long irix_mapelf(int fd, struct elf_phdr __user *user_phdrp, int cnt)
-{
- unsigned long type, vaddr, filesz, offset, flags;
- struct elf_phdr __user *hp;
- struct file *filp;
- int i, retval;
-
- pr_debug("irix_mapelf: fd[%d] user_phdrp[%p] cnt[%d]\n",
- fd, user_phdrp, cnt);
-
- /* First get the verification out of the way. */
- hp = user_phdrp;
- if (!access_ok(VERIFY_READ, hp, (sizeof(struct elf_phdr) * cnt))) {
- pr_debug("irix_mapelf: bad pointer to ELF PHDR!\n");
-
- return -EFAULT;
- }
-
- dump_phdrs(user_phdrp, cnt);
-
- for (i = 0; i < cnt; i++, hp++) {
- if (__get_user(type, &hp->p_type))
- return -EFAULT;
- if (type != PT_LOAD) {
- printk("irix_mapelf: One section is not PT_LOAD!\n");
- return -ENOEXEC;
- }
- }
-
- filp = fget(fd);
- if (!filp)
- return -EACCES;
- if (!filp->f_op) {
- printk("irix_mapelf: Bogon filp!\n");
- fput(filp);
- return -EACCES;
- }
-
- hp = user_phdrp;
- for (i = 0; i < cnt; i++, hp++) {
- int prot;
-
- retval = __get_user(vaddr, &hp->p_vaddr);
- retval |= __get_user(filesz, &hp->p_filesz);
- retval |= __get_user(offset, &hp->p_offset);
- retval |= __get_user(flags, &hp->p_flags);
- if (retval)
- return retval;
-
- prot = (flags & PF_R) ? PROT_READ : 0;
- prot |= (flags & PF_W) ? PROT_WRITE : 0;
- prot |= (flags & PF_X) ? PROT_EXEC : 0;
-
- down_write(¤t->mm->mmap_sem);
- retval = do_mmap(filp, (vaddr & 0xfffff000),
- (filesz + (vaddr & 0xfff)),
- prot, (MAP_FIXED | MAP_PRIVATE | MAP_DENYWRITE),
- (offset & 0xfffff000));
- up_write(¤t->mm->mmap_sem);
-
- if (retval != (vaddr & 0xfffff000)) {
- printk("irix_mapelf: do_mmap fails with %d!\n", retval);
- fput(filp);
- return retval;
- }
- }
-
- pr_debug("irix_mapelf: Success, returning %08lx\n",
- (unsigned long) user_phdrp->p_vaddr);
-
- fput(filp);
-
- if (__get_user(vaddr, &user_phdrp->p_vaddr))
- return -EFAULT;
-
- return vaddr;
-}
-
-/*
- * ELF core dumper
- *
- * Modelled on fs/exec.c:aout_core_dump()
- * Jeremy Fitzhardinge <jeremy@sw.oz.au>
- */
-
-/* These are the only things you should do on a core-file: use only these
- * functions to write out all the necessary info.
- */
-static int dump_write(struct file *file, const void __user *addr, int nr)
-{
- return file->f_op->write(file, (const char __user *) addr, nr, &file->f_pos) == nr;
-}
-
-static int dump_seek(struct file *file, off_t off)
-{
- if (file->f_op->llseek) {
- if (file->f_op->llseek(file, off, 0) != off)
- return 0;
- } else
- file->f_pos = off;
- return 1;
-}
-
-/* Decide whether a segment is worth dumping; default is yes to be
- * sure (missing info is worse than too much; etc).
- * Personally I'd include everything, and use the coredump limit...
- *
- * I think we should skip something. But I am not sure how. H.J.
- */
-static inline int maydump(struct vm_area_struct *vma)
-{
- if (!(vma->vm_flags & (VM_READ|VM_WRITE|VM_EXEC)))
- return 0;
-#if 1
- if (vma->vm_flags & (VM_WRITE|VM_GROWSUP|VM_GROWSDOWN))
- return 1;
- if (vma->vm_flags & (VM_READ|VM_EXEC|VM_EXECUTABLE|VM_SHARED))
- return 0;
-#endif
- return 1;
-}
-
-/* An ELF note in memory. */
-struct memelfnote
-{
- const char *name;
- int type;
- unsigned int datasz;
- void *data;
-};
-
-static int notesize(struct memelfnote *en)
-{
- int sz;
-
- sz = sizeof(struct elf_note);
- sz += roundup(strlen(en->name) + 1, 4);
- sz += roundup(en->datasz, 4);
-
- return sz;
-}
-
-#define DUMP_WRITE(addr, nr) \
- if (!dump_write(file, (addr), (nr))) \
- goto end_coredump;
-#define DUMP_SEEK(off) \
- if (!dump_seek(file, (off))) \
- goto end_coredump;
-
-static int writenote(struct memelfnote *men, struct file *file)
-{
- struct elf_note en;
-
- en.n_namesz = strlen(men->name) + 1;
- en.n_descsz = men->datasz;
- en.n_type = men->type;
-
- DUMP_WRITE(&en, sizeof(en));
- DUMP_WRITE(men->name, en.n_namesz);
- /* XXX - cast from long long to long to avoid need for libgcc.a */
- DUMP_SEEK(roundup((unsigned long)file->f_pos, 4)); /* XXX */
- DUMP_WRITE(men->data, men->datasz);
- DUMP_SEEK(roundup((unsigned long)file->f_pos, 4)); /* XXX */
-
- return 1;
-
-end_coredump:
- return 0;
-}
-#undef DUMP_WRITE
-#undef DUMP_SEEK
-
-#define DUMP_WRITE(addr, nr) \
- if (!dump_write(file, (addr), (nr))) \
- goto end_coredump;
-#define DUMP_SEEK(off) \
- if (!dump_seek(file, (off))) \
- goto end_coredump;
-
-/* Actual dumper.
- *
- * This is a two-pass process; first we find the offsets of the bits,
- * and then they are actually written out. If we run out of core limit
- * we just truncate.
- */
-static int irix_core_dump(long signr, struct pt_regs *regs, struct file *file, unsigned long limit)
-{
- int has_dumped = 0;
- mm_segment_t fs;
- int segs;
- int i;
- size_t size;
- struct vm_area_struct *vma;
- struct elfhdr elf;
- off_t offset = 0, dataoff;
- int numnote = 3;
- struct memelfnote notes[3];
- struct elf_prstatus prstatus; /* NT_PRSTATUS */
- elf_fpregset_t fpu; /* NT_PRFPREG */
- struct elf_prpsinfo psinfo; /* NT_PRPSINFO */
-
- /* Count what's needed to dump, up to the limit of coredump size. */
- segs = 0;
- size = 0;
- for (vma = current->mm->mmap; vma != NULL; vma = vma->vm_next) {
- if (maydump(vma))
- {
- int sz = vma->vm_end-vma->vm_start;
-
- if (size+sz >= limit)
- break;
- else
- size += sz;
- }
-
- segs++;
- }
- pr_debug("irix_core_dump: %d segs taking %d bytes\n", segs, size);
-
- /* Set up header. */
- memcpy(elf.e_ident, ELFMAG, SELFMAG);
- elf.e_ident[EI_CLASS] = ELFCLASS32;
- elf.e_ident[EI_DATA] = ELFDATA2LSB;
- elf.e_ident[EI_VERSION] = EV_CURRENT;
- elf.e_ident[EI_OSABI] = ELF_OSABI;
- memset(elf.e_ident+EI_PAD, 0, EI_NIDENT-EI_PAD);
-
- elf.e_type = ET_CORE;
- elf.e_machine = ELF_ARCH;
- elf.e_version = EV_CURRENT;
- elf.e_entry = 0;
- elf.e_phoff = sizeof(elf);
- elf.e_shoff = 0;
- elf.e_flags = 0;
- elf.e_ehsize = sizeof(elf);
- elf.e_phentsize = sizeof(struct elf_phdr);
- elf.e_phnum = segs+1; /* Include notes. */
- elf.e_shentsize = 0;
- elf.e_shnum = 0;
- elf.e_shstrndx = 0;
-
- fs = get_fs();
- set_fs(KERNEL_DS);
-
- has_dumped = 1;
- current->flags |= PF_DUMPCORE;
-
- DUMP_WRITE(&elf, sizeof(elf));
- offset += sizeof(elf); /* Elf header. */
- offset += (segs+1) * sizeof(struct elf_phdr); /* Program headers. */
-
- /* Set up the notes in similar form to SVR4 core dumps made
- * with info from their /proc.
- */
- memset(&psinfo, 0, sizeof(psinfo));
- memset(&prstatus, 0, sizeof(prstatus));
-
- notes[0].name = "CORE";
- notes[0].type = NT_PRSTATUS;
- notes[0].datasz = sizeof(prstatus);
- notes[0].data = &prstatus;
- prstatus.pr_info.si_signo = prstatus.pr_cursig = signr;
- prstatus.pr_sigpend = current->pending.signal.sig[0];
- prstatus.pr_sighold = current->blocked.sig[0];
- psinfo.pr_pid = prstatus.pr_pid = task_pid_vnr(current);
- psinfo.pr_ppid = prstatus.pr_ppid = task_pid_vnr(current->parent);
- psinfo.pr_pgrp = prstatus.pr_pgrp = task_pgrp_vnr(current);
- psinfo.pr_sid = prstatus.pr_sid = task_session_vnr(current);
- if (thread_group_leader(current)) {
- /*
- * This is the record for the group leader. Add in the
- * cumulative times of previous dead threads. This total
- * won't include the time of each live thread whose state
- * is included in the core dump. The final total reported
- * to our parent process when it calls wait4 will include
- * those sums as well as the little bit more time it takes
- * this and each other thread to finish dying after the
- * core dump synchronization phase.
- */
- jiffies_to_timeval(current->utime + current->signal->utime,
- &prstatus.pr_utime);
- jiffies_to_timeval(current->stime + current->signal->stime,
- &prstatus.pr_stime);
- } else {
- jiffies_to_timeval(current->utime, &prstatus.pr_utime);
- jiffies_to_timeval(current->stime, &prstatus.pr_stime);
- }
- jiffies_to_timeval(current->signal->cutime, &prstatus.pr_cutime);
- jiffies_to_timeval(current->signal->cstime, &prstatus.pr_cstime);
-
- if (sizeof(elf_gregset_t) != sizeof(struct pt_regs)) {
- printk("sizeof(elf_gregset_t) (%d) != sizeof(struct pt_regs) "
- "(%d)\n", sizeof(elf_gregset_t), sizeof(struct pt_regs));
- } else {
- *(struct pt_regs *)&prstatus.pr_reg = *regs;
- }
-
- notes[1].name = "CORE";
- notes[1].type = NT_PRPSINFO;
- notes[1].datasz = sizeof(psinfo);
- notes[1].data = &psinfo;
- i = current->state ? ffz(~current->state) + 1 : 0;
- psinfo.pr_state = i;
- psinfo.pr_sname = (i < 0 || i > 5) ? '.' : "RSDZTD"[i];
- psinfo.pr_zomb = psinfo.pr_sname == 'Z';
- psinfo.pr_nice = task_nice(current);
- psinfo.pr_flag = current->flags;
- psinfo.pr_uid = current->uid;
- psinfo.pr_gid = current->gid;
- {
- int i, len;
-
- set_fs(fs);
-
- len = current->mm->arg_end - current->mm->arg_start;
- len = len >= ELF_PRARGSZ ? ELF_PRARGSZ : len;
- (void *) copy_from_user(&psinfo.pr_psargs,
- (const char __user *)current->mm->arg_start, len);
- for (i = 0; i < len; i++)
- if (psinfo.pr_psargs[i] == 0)
- psinfo.pr_psargs[i] = ' ';
- psinfo.pr_psargs[len] = 0;
-
- set_fs(KERNEL_DS);
- }
- strlcpy(psinfo.pr_fname, current->comm, sizeof(psinfo.pr_fname));
-
- /* Try to dump the FPU. */
- prstatus.pr_fpvalid = dump_fpu(regs, &fpu);
- if (!prstatus.pr_fpvalid) {
- numnote--;
- } else {
- notes[2].name = "CORE";
- notes[2].type = NT_PRFPREG;
- notes[2].datasz = sizeof(fpu);
- notes[2].data = &fpu;
- }
-
- /* Write notes phdr entry. */
- {
- struct elf_phdr phdr;
- int sz = 0;
-
- for (i = 0; i < numnote; i++)
- sz += notesize(¬es[i]);
-
- phdr.p_type = PT_NOTE;
- phdr.p_offset = offset;
- phdr.p_vaddr = 0;
- phdr.p_paddr = 0;
- phdr.p_filesz = sz;
- phdr.p_memsz = 0;
- phdr.p_flags = 0;
- phdr.p_align = 0;
-
- offset += phdr.p_filesz;
- DUMP_WRITE(&phdr, sizeof(phdr));
- }
-
- /* Page-align dumped data. */
- dataoff = offset = roundup(offset, PAGE_SIZE);
-
- /* Write program headers for segments dump. */
- for (vma = current->mm->mmap, i = 0;
- i < segs && vma != NULL; vma = vma->vm_next) {
- struct elf_phdr phdr;
- size_t sz;
-
- i++;
-
- sz = vma->vm_end - vma->vm_start;
-
- phdr.p_type = PT_LOAD;
- phdr.p_offset = offset;
- phdr.p_vaddr = vma->vm_start;
- phdr.p_paddr = 0;
- phdr.p_filesz = maydump(vma) ? sz : 0;
- phdr.p_memsz = sz;
- offset += phdr.p_filesz;
- phdr.p_flags = vma->vm_flags & VM_READ ? PF_R : 0;
- if (vma->vm_flags & VM_WRITE)
- phdr.p_flags |= PF_W;
- if (vma->vm_flags & VM_EXEC)
- phdr.p_flags |= PF_X;
- phdr.p_align = PAGE_SIZE;
-
- DUMP_WRITE(&phdr, sizeof(phdr));
- }
-
- for (i = 0; i < numnote; i++)
- if (!writenote(¬es[i], file))
- goto end_coredump;
-
- set_fs(fs);
-
- DUMP_SEEK(dataoff);
-
- for (i = 0, vma = current->mm->mmap;
- i < segs && vma != NULL;
- vma = vma->vm_next) {
- unsigned long addr = vma->vm_start;
- unsigned long len = vma->vm_end - vma->vm_start;
-
- if (!maydump(vma))
- continue;
- i++;
- pr_debug("elf_core_dump: writing %08lx %lx\n", addr, len);
- DUMP_WRITE((void __user *)addr, len);
- }
-
- if ((off_t) file->f_pos != offset) {
- /* Sanity check. */
- printk("elf_core_dump: file->f_pos (%ld) != offset (%ld)\n",
- (off_t) file->f_pos, offset);
- }
-
-end_coredump:
- set_fs(fs);
- return has_dumped;
-}
-
-static int __init init_irix_binfmt(void)
-{
- extern int init_inventory(void);
- extern asmlinkage unsigned long sys_call_table;
- extern asmlinkage unsigned long sys_call_table_irix5;
-
- init_inventory();
-
- /*
- * Copy the IRIX5 syscall table (8000 bytes) into the main syscall
- * table. The IRIX5 calls are located by an offset of 8000 bytes
- * from the beginning of the main table.
- */
- memcpy((void *) ((unsigned long) &sys_call_table + 8000),
- &sys_call_table_irix5, 8000);
-
- return register_binfmt(&irix_format);
-}
-
-static void __exit exit_irix_binfmt(void)
-{
- /*
- * Remove the Irix ELF loader.
- */
- unregister_binfmt(&irix_format);
-}
-
-module_init(init_irix_binfmt)
-module_exit(exit_irix_binfmt)
+++ /dev/null
-/*
- * Support the inventory interface for IRIX binaries
- * This is invoked before the mm layer is working, so we do not
- * use the linked lists for the inventory yet.
- *
- * Miguel de Icaza, 1997.
- */
-#include <linux/mm.h>
-#include <asm/inventory.h>
-#include <asm/uaccess.h>
-
-#define MAX_INVENTORY 50
-int inventory_items = 0;
-
-static inventory_t inventory [MAX_INVENTORY];
-
-void add_to_inventory(int class, int type, int controller, int unit, int state)
-{
- inventory_t *ni = &inventory [inventory_items];
-
- if (inventory_items == MAX_INVENTORY)
- return;
-
- ni->inv_class = class;
- ni->inv_type = type;
- ni->inv_controller = controller;
- ni->inv_unit = unit;
- ni->inv_state = state;
- ni->inv_next = ni;
- inventory_items++;
-}
-
-int dump_inventory_to_user(void __user *userbuf, int size)
-{
- inventory_t *inv = &inventory [0];
- inventory_t __user *user = userbuf;
- int v;
-
- if (!access_ok(VERIFY_WRITE, userbuf, size))
- return -EFAULT;
-
- for (v = 0; v < inventory_items; v++){
- inv = &inventory [v];
- if (copy_to_user (user, inv, sizeof (inventory_t)))
- return -EFAULT;
- user++;
- }
- return inventory_items * sizeof(inventory_t);
-}
-
-int __init init_inventory(void)
-{
- /*
- * gross hack while we put the right bits all over the kernel
- * most likely this will not let just anyone run the X server
- * until we put the right values all over the place
- */
- add_to_inventory(10, 3, 0, 0, 16400);
- add_to_inventory(1, 1, 150, -1, 12);
- add_to_inventory(1, 3, 0, 0, 8976);
- add_to_inventory(1, 2, 0, 0, 8976);
- add_to_inventory(4, 8, 0, 0, 2);
- add_to_inventory(5, 5, 0, 0, 1);
- add_to_inventory(3, 3, 0, 0, 32768);
- add_to_inventory(3, 4, 0, 0, 32768);
- add_to_inventory(3, 8, 0, 0, 524288);
- add_to_inventory(3, 9, 0, 0, 64);
- add_to_inventory(3, 1, 0, 0, 67108864);
- add_to_inventory(12, 3, 0, 0, 16);
- add_to_inventory(8, 7, 17, 0, 16777472);
- add_to_inventory(8, 0, 0, 0, 1);
- add_to_inventory(2, 1, 0, 13, 2);
- add_to_inventory(2, 2, 0, 2, 0);
- add_to_inventory(2, 2, 0, 1, 0);
- add_to_inventory(7, 14, 0, 0, 6);
-
- return 0;
-}
+++ /dev/null
-/*
- * irixioctl.c: A fucking mess...
- *
- * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
- */
-
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/fs.h>
-#include <linux/mm.h>
-#include <linux/smp.h>
-#include <linux/sockios.h>
-#include <linux/syscalls.h>
-#include <linux/tty.h>
-#include <linux/file.h>
-#include <linux/rcupdate.h>
-
-#include <asm/uaccess.h>
-#include <asm/ioctl.h>
-#include <asm/ioctls.h>
-
-#undef DEBUG_IOCTLS
-#undef DEBUG_MISSING_IOCTL
-
-struct irix_termios {
- tcflag_t c_iflag, c_oflag, c_cflag, c_lflag;
- cc_t c_cc[NCCS];
-};
-
-asmlinkage int irix_ioctl(int fd, unsigned long cmd, unsigned long arg)
-{
- struct tty_struct *tp, *rtp;
- mm_segment_t old_fs;
- int i, error = 0;
-
-#ifdef DEBUG_IOCTLS
- printk("[%s:%d] irix_ioctl(%d, ", current->comm, current->pid, fd);
-#endif
- switch(cmd) {
- case 0x00005401:
-#ifdef DEBUG_IOCTLS
- printk("TCGETA, %08lx) ", arg);
-#endif
- error = sys_ioctl(fd, TCGETA, arg);
- break;
-
- case 0x0000540d: {
- struct termios kt;
- struct irix_termios __user *it =
- (struct irix_termios __user *) arg;
-
-#ifdef DEBUG_IOCTLS
- printk("TCGETS, %08lx) ", arg);
-#endif
- if (!access_ok(VERIFY_WRITE, it, sizeof(*it))) {
- error = -EFAULT;
- break;
- }
- old_fs = get_fs(); set_fs(get_ds());
- error = sys_ioctl(fd, TCGETS, (unsigned long) &kt);
- set_fs(old_fs);
- if (error)
- break;
-
- error = __put_user(kt.c_iflag, &it->c_iflag);
- error |= __put_user(kt.c_oflag, &it->c_oflag);
- error |= __put_user(kt.c_cflag, &it->c_cflag);
- error |= __put_user(kt.c_lflag, &it->c_lflag);
-
- for (i = 0; i < NCCS; i++)
- error |= __put_user(kt.c_cc[i], &it->c_cc[i]);
- break;
- }
-
- case 0x0000540e: {
- struct termios kt;
- struct irix_termios *it = (struct irix_termios *) arg;
-
-#ifdef DEBUG_IOCTLS
- printk("TCSETS, %08lx) ", arg);
-#endif
- if (!access_ok(VERIFY_READ, it, sizeof(*it))) {
- error = -EFAULT;
- break;
- }
- old_fs = get_fs(); set_fs(get_ds());
- error = sys_ioctl(fd, TCGETS, (unsigned long) &kt);
- set_fs(old_fs);
- if (error)
- break;
-
- error = __get_user(kt.c_iflag, &it->c_iflag);
- error |= __get_user(kt.c_oflag, &it->c_oflag);
- error |= __get_user(kt.c_cflag, &it->c_cflag);
- error |= __get_user(kt.c_lflag, &it->c_lflag);
-
- for (i = 0; i < NCCS; i++)
- error |= __get_user(kt.c_cc[i], &it->c_cc[i]);
-
- if (error)
- break;
- old_fs = get_fs(); set_fs(get_ds());
- error = sys_ioctl(fd, TCSETS, (unsigned long) &kt);
- set_fs(old_fs);
- break;
- }
-
- case 0x0000540f:
-#ifdef DEBUG_IOCTLS
- printk("TCSETSW, %08lx) ", arg);
-#endif
- error = sys_ioctl(fd, TCSETSW, arg);
- break;
-
- case 0x00005471:
-#ifdef DEBUG_IOCTLS
- printk("TIOCNOTTY, %08lx) ", arg);
-#endif
- error = sys_ioctl(fd, TIOCNOTTY, arg);
- break;
-
- case 0x00007416: {
- pid_t pid;
-#ifdef DEBUG_IOCTLS
- printk("TIOCGSID, %08lx) ", arg);
-#endif
- old_fs = get_fs(); set_fs(get_ds());
- error = sys_ioctl(fd, TIOCGSID, (unsigned long)&pid);
- set_fs(old_fs);
- if (!error)
- error = put_user(pid, (unsigned long __user *) arg);
- break;
- }
- case 0x746e:
- /* TIOCSTART, same effect as hitting ^Q */
-#ifdef DEBUG_IOCTLS
- printk("TIOCSTART, %08lx) ", arg);
-#endif
- error = sys_ioctl(fd, TCXONC, TCOON);
- break;
-
- case 0x20006968:
-#ifdef DEBUG_IOCTLS
- printk("SIOCGETLABEL, %08lx) ", arg);
-#endif
- error = -ENOPKG;
- break;
-
- case 0x40047477:
-#ifdef DEBUG_IOCTLS
- printk("TIOCGPGRP, %08lx) ", arg);
-#endif
- error = sys_ioctl(fd, TIOCGPGRP, arg);
-#ifdef DEBUG_IOCTLS
- printk("arg=%d ", *(int *)arg);
-#endif
- break;
-
- case 0x40087468:
-#ifdef DEBUG_IOCTLS
- printk("TIOCGWINSZ, %08lx) ", arg);
-#endif
- error = sys_ioctl(fd, TIOCGWINSZ, arg);
- break;
-
- case 0x8004667e:
- error = sys_ioctl(fd, FIONBIO, arg);
- break;
-
- case 0x80047476:
- error = sys_ioctl(fd, TIOCSPGRP, arg);
- break;
-
- case 0x8020690c:
- error = sys_ioctl(fd, SIOCSIFADDR, arg);
- break;
-
- case 0x80206910:
- error = sys_ioctl(fd, SIOCSIFFLAGS, arg);
- break;
-
- case 0xc0206911:
- error = sys_ioctl(fd, SIOCGIFFLAGS, arg);
- break;
-
- case 0xc020691b:
- error = sys_ioctl(fd, SIOCGIFMETRIC, arg);
- break;
-
- default: {
-#ifdef DEBUG_MISSING_IOCTL
- char *msg = "Unimplemented IOCTL cmd tell linux-mips@linux-mips.org\n";
-
-#ifdef DEBUG_IOCTLS
- printk("UNIMP_IOCTL, %08lx)\n", arg);
-#endif
- old_fs = get_fs(); set_fs(get_ds());
- sys_write(2, msg, strlen(msg));
- set_fs(old_fs);
- printk("[%s:%d] Does unimplemented IRIX ioctl cmd %08lx\n",
- current->comm, current->pid, cmd);
- do_exit(255);
-#else
- error = sys_ioctl(fd, cmd, arg);
-#endif
- }
-
- };
-#ifdef DEBUG_IOCTLS
- printk("error=%d\n", error);
-#endif
- return error;
-}
+++ /dev/null
-/*
- * irixsig.c: WHEEE, IRIX signals! YOW, am I compatible or what?!?!
- *
- * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
- * Copyright (C) 1997 - 2000 Ralf Baechle (ralf@gnu.org)
- * Copyright (C) 2000 Silicon Graphics, Inc.
- */
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/mm.h>
-#include <linux/errno.h>
-#include <linux/smp.h>
-#include <linux/time.h>
-#include <linux/ptrace.h>
-#include <linux/resource.h>
-
-#include <asm/ptrace.h>
-#include <asm/uaccess.h>
-#include <asm/unistd.h>
-
-#undef DEBUG_SIG
-
-#define _S(nr) (1<<((nr)-1))
-
-#define _BLOCKABLE (~(_S(SIGKILL) | _S(SIGSTOP)))
-
-#define _IRIX_NSIG 128
-#define _IRIX_NSIG_BPW BITS_PER_LONG
-#define _IRIX_NSIG_WORDS (_IRIX_NSIG / _IRIX_NSIG_BPW)
-
-typedef struct {
- unsigned long sig[_IRIX_NSIG_WORDS];
-} irix_sigset_t;
-
-struct sigctx_irix5 {
- u32 rmask, cp0_status;
- u64 pc;
- u64 regs[32];
- u64 fpregs[32];
- u32 usedfp, fpcsr, fpeir, sstk_flags;
- u64 hi, lo;
- u64 cp0_cause, cp0_badvaddr, _unused0;
- irix_sigset_t sigset;
- u64 weird_fpu_thing;
- u64 _unused1[31];
-};
-
-#ifdef DEBUG_SIG
-/* Debugging */
-static inline void dump_irix5_sigctx(struct sigctx_irix5 *c)
-{
- int i;
-
- printk("misc: rmask[%08lx] status[%08lx] pc[%08lx]\n",
- (unsigned long) c->rmask,
- (unsigned long) c->cp0_status,
- (unsigned long) c->pc);
- printk("regs: ");
- for(i = 0; i < 16; i++)
- printk("[%d]<%08lx> ", i, (unsigned long) c->regs[i]);
- printk("\nregs: ");
- for(i = 16; i < 32; i++)
- printk("[%d]<%08lx> ", i, (unsigned long) c->regs[i]);
- printk("\nfpregs: ");
- for(i = 0; i < 16; i++)
- printk("[%d]<%08lx> ", i, (unsigned long) c->fpregs[i]);
- printk("\nfpregs: ");
- for(i = 16; i < 32; i++)
- printk("[%d]<%08lx> ", i, (unsigned long) c->fpregs[i]);
- printk("misc: usedfp[%d] fpcsr[%08lx] fpeir[%08lx] stk_flgs[%08lx]\n",
- (int) c->usedfp, (unsigned long) c->fpcsr,
- (unsigned long) c->fpeir, (unsigned long) c->sstk_flags);
- printk("misc: hi[%08lx] lo[%08lx] cause[%08lx] badvaddr[%08lx]\n",
- (unsigned long) c->hi, (unsigned long) c->lo,
- (unsigned long) c->cp0_cause, (unsigned long) c->cp0_badvaddr);
- printk("misc: sigset<0>[%08lx] sigset<1>[%08lx] sigset<2>[%08lx] "
- "sigset<3>[%08lx]\n", (unsigned long) c->sigset.sig[0],
- (unsigned long) c->sigset.sig[1],
- (unsigned long) c->sigset.sig[2],
- (unsigned long) c->sigset.sig[3]);
-}
-#endif
-
-static int setup_irix_frame(struct k_sigaction *ka, struct pt_regs *regs,
- int signr, sigset_t *oldmask)
-{
- struct sigctx_irix5 __user *ctx;
- unsigned long sp;
- int error, i;
-
- sp = regs->regs[29];
- sp -= sizeof(struct sigctx_irix5);
- sp &= ~(0xf);
- ctx = (struct sigctx_irix5 __user *) sp;
- if (!access_ok(VERIFY_WRITE, ctx, sizeof(*ctx)))
- goto segv_and_exit;
-
- error = __put_user(0, &ctx->weird_fpu_thing);
- error |= __put_user(~(0x00000001), &ctx->rmask);
- error |= __put_user(0, &ctx->regs[0]);
- for(i = 1; i < 32; i++)
- error |= __put_user((u64) regs->regs[i], &ctx->regs[i]);
-
- error |= __put_user((u64) regs->hi, &ctx->hi);
- error |= __put_user((u64) regs->lo, &ctx->lo);
- error |= __put_user((u64) regs->cp0_epc, &ctx->pc);
- error |= __put_user(!!used_math(), &ctx->usedfp);
- error |= __put_user((u64) regs->cp0_cause, &ctx->cp0_cause);
- error |= __put_user((u64) regs->cp0_badvaddr, &ctx->cp0_badvaddr);
-
- error |= __put_user(0, &ctx->sstk_flags); /* XXX sigstack unimp... todo... */
-
- error |= __copy_to_user(&ctx->sigset, oldmask, sizeof(irix_sigset_t)) ? -EFAULT : 0;
-
- if (error)
- goto segv_and_exit;
-
-#ifdef DEBUG_SIG
- dump_irix5_sigctx(ctx);
-#endif
-
- regs->regs[4] = (unsigned long) signr;
- regs->regs[5] = 0; /* XXX sigcode XXX */
- regs->regs[6] = regs->regs[29] = sp;
- regs->regs[7] = (unsigned long) ka->sa.sa_handler;
- regs->regs[25] = regs->cp0_epc = (unsigned long) ka->sa_restorer;
-
- return 1;
-
-segv_and_exit:
- force_sigsegv(signr, current);
- return 0;
-}
-
-static int inline
-setup_irix_rt_frame(struct k_sigaction * ka, struct pt_regs *regs,
- int signr, sigset_t *oldmask, siginfo_t *info)
-{
- printk("Aiee: setup_tr_frame wants to be written");
- do_exit(SIGSEGV);
-}
-
-static inline int handle_signal(unsigned long sig, siginfo_t *info,
- struct k_sigaction *ka, sigset_t *oldset, struct pt_regs * regs)
-{
- int ret;
-
- switch(regs->regs[0]) {
- case ERESTARTNOHAND:
- regs->regs[2] = EINTR;
- break;
- case ERESTARTSYS:
- if(!(ka->sa.sa_flags & SA_RESTART)) {
- regs->regs[2] = EINTR;
- break;
- }
- /* fallthrough */
- case ERESTARTNOINTR: /* Userland will reload $v0. */
- regs->cp0_epc -= 8;
- }
-
- regs->regs[0] = 0; /* Don't deal with this again. */
-
- if (ka->sa.sa_flags & SA_SIGINFO)
- ret = setup_irix_rt_frame(ka, regs, sig, oldset, info);
- else
- ret = setup_irix_frame(ka, regs, sig, oldset);
-
- spin_lock_irq(¤t->sighand->siglock);
- sigorsets(¤t->blocked, ¤t->blocked, &ka->sa.sa_mask);
- if (!(ka->sa.sa_flags & SA_NODEFER))
- sigaddset(¤t->blocked, sig);
- recalc_sigpending();
- spin_unlock_irq(¤t->sighand->siglock);
-
- return ret;
-}
-
-void do_irix_signal(struct pt_regs *regs)
-{
- struct k_sigaction ka;
- siginfo_t info;
- int signr;
- sigset_t *oldset;
-
- /*
- * We want the common case to go fast, which is why we may in certain
- * cases get here from kernel mode. Just return without doing anything
- * if so.
- */
- if (!user_mode(regs))
- return;
-
- if (test_thread_flag(TIF_RESTORE_SIGMASK))
- oldset = ¤t->saved_sigmask;
- else
- oldset = ¤t->blocked;
-
- signr = get_signal_to_deliver(&info, &ka, regs, NULL);
- if (signr > 0) {
- /* Whee! Actually deliver the signal. */
- if (handle_signal(signr, &info, &ka, oldset, regs) == 0) {
- /* a signal was successfully delivered; the saved
- * sigmask will have been stored in the signal frame,
- * and will be restored by sigreturn, so we can simply
- * clear the TIF_RESTORE_SIGMASK flag */
- if (test_thread_flag(TIF_RESTORE_SIGMASK))
- clear_thread_flag(TIF_RESTORE_SIGMASK);
- }
-
- return;
- }
-
- /*
- * Who's code doesn't conform to the restartable syscall convention
- * dies here!!! The li instruction, a single machine instruction,
- * must directly be followed by the syscall instruction.
- */
- if (regs->regs[0]) {
- if (regs->regs[2] == ERESTARTNOHAND ||
- regs->regs[2] == ERESTARTSYS ||
- regs->regs[2] == ERESTARTNOINTR) {
- regs->cp0_epc -= 8;
- }
- if (regs->regs[2] == ERESTART_RESTARTBLOCK) {
- regs->regs[2] = __NR_restart_syscall;
- regs->regs[7] = regs->regs[26];
- regs->cp0_epc -= 4;
- }
- regs->regs[0] = 0; /* Don't deal with this again. */
- }
-
- /*
- * If there's no signal to deliver, we just put the saved sigmask
- * back
- */
- if (test_thread_flag(TIF_RESTORE_SIGMASK)) {
- clear_thread_flag(TIF_RESTORE_SIGMASK);
- sigprocmask(SIG_SETMASK, ¤t->saved_sigmask, NULL);
- }
-}
-
-asmlinkage void
-irix_sigreturn(struct pt_regs *regs)
-{
- struct sigctx_irix5 __user *context, *magic;
- unsigned long umask, mask;
- u64 *fregs;
- u32 usedfp;
- int error, sig, i, base = 0;
- sigset_t blocked;
-
- /* Always make any pending restarted system calls return -EINTR */
- current_thread_info()->restart_block.fn = do_no_restart_syscall;
-
- if (regs->regs[2] == 1000)
- base = 1;
-
- context = (struct sigctx_irix5 __user *) regs->regs[base + 4];
- magic = (struct sigctx_irix5 __user *) regs->regs[base + 5];
- sig = (int) regs->regs[base + 6];
-#ifdef DEBUG_SIG
- printk("[%s:%d] IRIX sigreturn(scp[%p],ucp[%p],sig[%d])\n",
- current->comm, current->pid, context, magic, sig);
-#endif
- if (!context)
- context = magic;
- if (!access_ok(VERIFY_READ, context, sizeof(struct sigctx_irix5)))
- goto badframe;
-
-#ifdef DEBUG_SIG
- dump_irix5_sigctx(context);
-#endif
-
- error = __get_user(regs->cp0_epc, &context->pc);
- error |= __get_user(umask, &context->rmask);
-
- mask = 2;
- for (i = 1; i < 32; i++, mask <<= 1) {
- if (umask & mask)
- error |= __get_user(regs->regs[i], &context->regs[i]);
- }
- error |= __get_user(regs->hi, &context->hi);
- error |= __get_user(regs->lo, &context->lo);
-
- error |= __get_user(usedfp, &context->usedfp);
- if ((umask & 1) && usedfp) {
- fregs = (u64 *) ¤t->thread.fpu;
-
- for(i = 0; i < 32; i++)
- error |= __get_user(fregs[i], &context->fpregs[i]);
- error |= __get_user(current->thread.fpu.fcr31, &context->fpcsr);
- }
-
- /* XXX do sigstack crapola here... XXX */
-
- error |= __copy_from_user(&blocked, &context->sigset, sizeof(blocked)) ? -EFAULT : 0;
-
- if (error)
- goto badframe;
-
- sigdelsetmask(&blocked, ~_BLOCKABLE);
- spin_lock_irq(¤t->sighand->siglock);
- current->blocked = blocked;
- recalc_sigpending();
- spin_unlock_irq(¤t->sighand->siglock);
-
- /*
- * Don't let your children do this ...
- */
- __asm__ __volatile__(
- "move\t$29,%0\n\t"
- "j\tsyscall_exit"
- :/* no outputs */
- :"r" (®s));
- /* Unreached */
-
-badframe:
- force_sig(SIGSEGV, current);
-}
-
-struct sigact_irix5 {
- int flags;
- void (*handler)(int);
- u32 sigset[4];
- int _unused0[2];
-};
-
-#define SIG_SETMASK32 256 /* Goodie from SGI for BSD compatibility:
- set only the low 32 bit of the sigset. */
-
-#ifdef DEBUG_SIG
-static inline void dump_sigact_irix5(struct sigact_irix5 *p)
-{
- printk("<f[%d] hndlr[%08lx] msk[%08lx]>", p->flags,
- (unsigned long) p->handler,
- (unsigned long) p->sigset[0]);
-}
-#endif
-
-asmlinkage int
-irix_sigaction(int sig, const struct sigaction __user *act,
- struct sigaction __user *oact, void __user *trampoline)
-{
- struct k_sigaction new_ka, old_ka;
- int ret;
-
-#ifdef DEBUG_SIG
- printk(" (%d,%s,%s,%08lx) ", sig, (!new ? "0" : "NEW"),
- (!old ? "0" : "OLD"), trampoline);
- if(new) {
- dump_sigact_irix5(new); printk(" ");
- }
-#endif
- if (act) {
- sigset_t mask;
- int err;
-
- if (!access_ok(VERIFY_READ, act, sizeof(*act)))
- return -EFAULT;
- err = __get_user(new_ka.sa.sa_handler, &act->sa_handler);
- err |= __get_user(new_ka.sa.sa_flags, &act->sa_flags);
-
- err |= __copy_from_user(&mask, &act->sa_mask, sizeof(sigset_t)) ? -EFAULT : 0;
- if (err)
- return err;
-
- /*
- * Hmmm... methinks IRIX libc always passes a valid trampoline
- * value for all invocations of sigaction. Will have to
- * investigate. POSIX POSIX, die die die...
- */
- new_ka.sa_restorer = trampoline;
- }
-
-/* XXX Implement SIG_SETMASK32 for IRIX compatibility */
- ret = do_sigaction(sig, act ? &new_ka : NULL, oact ? &old_ka : NULL);
-
- if (!ret && oact) {
- int err;
-
- if (!access_ok(VERIFY_WRITE, oact, sizeof(*oact)))
- return -EFAULT;
-
- err = __put_user(old_ka.sa.sa_handler, &oact->sa_handler);
- err |= __put_user(old_ka.sa.sa_flags, &oact->sa_flags);
- err |= __copy_to_user(&oact->sa_mask, &old_ka.sa.sa_mask,
- sizeof(sigset_t)) ? -EFAULT : 0;
- if (err)
- return -EFAULT;
- }
-
- return ret;
-}
-
-asmlinkage int irix_sigpending(irix_sigset_t __user *set)
-{
- return do_sigpending(set, sizeof(*set));
-}
-
-asmlinkage int irix_sigprocmask(int how, irix_sigset_t __user *new,
- irix_sigset_t __user *old)
-{
- sigset_t oldbits, newbits;
-
- if (new) {
- if (!access_ok(VERIFY_READ, new, sizeof(*new)))
- return -EFAULT;
- if (__copy_from_user(&newbits, new, sizeof(unsigned long)*4))
- return -EFAULT;
- sigdelsetmask(&newbits, ~_BLOCKABLE);
-
- spin_lock_irq(¤t->sighand->siglock);
- oldbits = current->blocked;
-
- switch(how) {
- case 1:
- sigorsets(&newbits, &oldbits, &newbits);
- break;
-
- case 2:
- sigandsets(&newbits, &oldbits, &newbits);
- break;
-
- case 3:
- break;
-
- case 256:
- siginitset(&newbits, newbits.sig[0]);
- break;
-
- default:
- spin_unlock_irq(¤t->sighand->siglock);
- return -EINVAL;
- }
- recalc_sigpending();
- spin_unlock_irq(¤t->sighand->siglock);
- }
- if (old)
- return copy_to_user(old, ¤t->blocked,
- sizeof(unsigned long)*4) ? -EFAULT : 0;
-
- return 0;
-}
-
-asmlinkage int irix_sigsuspend(struct pt_regs *regs)
-{
- sigset_t newset;
- sigset_t __user *uset;
-
- uset = (sigset_t __user *) regs->regs[4];
- if (copy_from_user(&newset, uset, sizeof(sigset_t)))
- return -EFAULT;
- sigdelsetmask(&newset, ~_BLOCKABLE);
-
- spin_lock_irq(¤t->sighand->siglock);
- current->saved_sigmask = current->blocked;
- current->blocked = newset;
- recalc_sigpending();
- spin_unlock_irq(¤t->sighand->siglock);
-
- current->state = TASK_INTERRUPTIBLE;
- schedule();
- set_thread_flag(TIF_RESTORE_SIGMASK);
- return -ERESTARTNOHAND;
-}
-
-/* hate hate hate... */
-struct irix5_siginfo {
- int sig, code, error;
- union {
- char unused[128 - (3 * 4)]; /* Safety net. */
- struct {
- int pid;
- union {
- int uid;
- struct {
- int utime, status, stime;
- } child;
- } procdata;
- } procinfo;
-
- unsigned long fault_addr;
-
- struct {
- int fd;
- long band;
- } fileinfo;
-
- unsigned long sigval;
- } stuff;
-};
-
-asmlinkage int irix_sigpoll_sys(unsigned long __user *set,
- struct irix5_siginfo __user *info, struct timespec __user *tp)
-{
- long expire = MAX_SCHEDULE_TIMEOUT;
- sigset_t kset;
- int i, sig, error, timeo = 0;
- struct timespec ktp;
-
-#ifdef DEBUG_SIG
- printk("[%s:%d] irix_sigpoll_sys(%p,%p,%p)\n",
- current->comm, current->pid, set, info, tp);
-#endif
-
- /* Must always specify the signal set. */
- if (!set)
- return -EINVAL;
-
- if (copy_from_user(&kset, set, sizeof(set)))
- return -EFAULT;
-
- if (info && clear_user(info, sizeof(*info))) {
- error = -EFAULT;
- goto out;
- }
-
- if (tp) {
- if (copy_from_user(&ktp, tp, sizeof(*tp)))
- return -EFAULT;
-
- if (!ktp.tv_sec && !ktp.tv_nsec)
- return -EINVAL;
-
- expire = timespec_to_jiffies(&ktp) +
- (ktp.tv_sec || ktp.tv_nsec);
- }
-
- while(1) {
- long tmp = 0;
-
- expire = schedule_timeout_interruptible(expire);
-
- for (i=0; i < _IRIX_NSIG_WORDS; i++)
- tmp |= (current->pending.signal.sig[i] & kset.sig[i]);
-
- if (tmp)
- break;
- if (!expire) {
- timeo = 1;
- break;
- }
- if (signal_pending(current))
- return -EINTR;
- }
- if (timeo)
- return -EAGAIN;
-
- for (sig = 1; i <= 65 /* IRIX_NSIG */; sig++) {
- if (sigismember (&kset, sig))
- continue;
- if (sigismember (¤t->pending.signal, sig)) {
- /* XXX need more than this... */
- if (info)
- return copy_to_user(&info->sig, &sig, sizeof(sig));
- return 0;
- }
- }
-
- /* Should not get here, but do something sane if we do. */
- error = -EINTR;
-
-out:
- return error;
-}
-
-/* This is here because of irix5_siginfo definition. */
-#define IRIX_P_PID 0
-#define IRIX_P_PGID 2
-#define IRIX_P_ALL 7
-
-#define W_EXITED 1
-#define W_TRAPPED 2
-#define W_STOPPED 4
-#define W_CONT 8
-#define W_NOHANG 64
-
-#define W_MASK (W_EXITED | W_TRAPPED | W_STOPPED | W_CONT | W_NOHANG)
-
-asmlinkage int irix_waitsys(int type, int upid,
- struct irix5_siginfo __user *info, int options,
- struct rusage __user *ru)
-{
- struct pid *pid = NULL;
- int flag, retval;
- DECLARE_WAITQUEUE(wait, current);
- struct task_struct *tsk;
- struct task_struct *p;
- struct list_head *_p;
-
- if (!info)
- return -EINVAL;
-
- if (!access_ok(VERIFY_WRITE, info, sizeof(*info)))
- return -EFAULT;
-
- if (ru)
- if (!access_ok(VERIFY_WRITE, ru, sizeof(*ru)))
- return -EFAULT;
-
- if (options & ~W_MASK)
- return -EINVAL;
-
- if (type != IRIX_P_PID && type != IRIX_P_PGID && type != IRIX_P_ALL)
- return -EINVAL;
-
- if (type != IRIX_P_ALL)
- pid = find_get_pid(upid);
- add_wait_queue(¤t->signal->wait_chldexit, &wait);
-repeat:
- flag = 0;
- current->state = TASK_INTERRUPTIBLE;
- read_lock(&tasklist_lock);
- tsk = current;
- list_for_each(_p, &tsk->children) {
- p = list_entry(_p, struct task_struct, sibling);
- if ((type == IRIX_P_PID) && task_pid(p) != pid)
- continue;
- if ((type == IRIX_P_PGID) && task_pgrp(p) != pid)
- continue;
- if ((p->exit_signal != SIGCHLD))
- continue;
- flag = 1;
- switch (p->state) {
- case TASK_STOPPED:
- if (!p->exit_code)
- continue;
- if (!(options & (W_TRAPPED|W_STOPPED)) &&
- !(p->ptrace & PT_PTRACED))
- continue;
- read_unlock(&tasklist_lock);
-
- /* move to end of parent's list to avoid starvation */
- write_lock_irq(&tasklist_lock);
- remove_parent(p);
- add_parent(p);
- write_unlock_irq(&tasklist_lock);
- retval = ru ? getrusage(p, RUSAGE_BOTH, ru) : 0;
- if (retval)
- goto end_waitsys;
-
- retval = __put_user(SIGCHLD, &info->sig);
- retval |= __put_user(0, &info->code);
- retval |= __put_user(task_pid_vnr(p), &info->stuff.procinfo.pid);
- retval |= __put_user((p->exit_code >> 8) & 0xff,
- &info->stuff.procinfo.procdata.child.status);
- retval |= __put_user(p->utime, &info->stuff.procinfo.procdata.child.utime);
- retval |= __put_user(p->stime, &info->stuff.procinfo.procdata.child.stime);
- if (retval)
- goto end_waitsys;
-
- p->exit_code = 0;
- goto end_waitsys;
-
- case EXIT_ZOMBIE:
- current->signal->cutime += p->utime + p->signal->cutime;
- current->signal->cstime += p->stime + p->signal->cstime;
- if (ru != NULL)
- getrusage(p, RUSAGE_BOTH, ru);
- retval = __put_user(SIGCHLD, &info->sig);
- retval |= __put_user(1, &info->code); /* CLD_EXITED */
- retval |= __put_user(task_pid_vnr(p), &info->stuff.procinfo.pid);
- retval |= __put_user((p->exit_code >> 8) & 0xff,
- &info->stuff.procinfo.procdata.child.status);
- retval |= __put_user(p->utime,
- &info->stuff.procinfo.procdata.child.utime);
- retval |= __put_user(p->stime,
- &info->stuff.procinfo.procdata.child.stime);
- if (retval)
- goto end_waitsys;
-
- if (p->real_parent != p->parent) {
- write_lock_irq(&tasklist_lock);
- remove_parent(p);
- p->parent = p->real_parent;
- add_parent(p);
- do_notify_parent(p, SIGCHLD);
- write_unlock_irq(&tasklist_lock);
- } else
- release_task(p);
- goto end_waitsys;
- default:
- continue;
- }
- tsk = next_thread(tsk);
- }
- read_unlock(&tasklist_lock);
- if (flag) {
- retval = 0;
- if (options & W_NOHANG)
- goto end_waitsys;
- retval = -ERESTARTSYS;
- if (signal_pending(current))
- goto end_waitsys;
- current->state = TASK_INTERRUPTIBLE;
- schedule();
- goto repeat;
- }
- retval = -ECHILD;
-end_waitsys:
- current->state = TASK_RUNNING;
- remove_wait_queue(¤t->signal->wait_chldexit, &wait);
- put_pid(pid);
-
- return retval;
-}
-
-struct irix5_context {
- u32 flags;
- u32 link;
- u32 sigmask[4];
- struct { u32 sp, size, flags; } stack;
- int regs[36];
- u32 fpregs[32];
- u32 fpcsr;
- u32 _unused0;
- u32 _unused1[47];
- u32 weird_graphics_thing;
-};
-
-asmlinkage int irix_getcontext(struct pt_regs *regs)
-{
- int error, i, base = 0;
- struct irix5_context __user *ctx;
- unsigned long flags;
-
- if (regs->regs[2] == 1000)
- base = 1;
- ctx = (struct irix5_context __user *) regs->regs[base + 4];
-
-#ifdef DEBUG_SIG
- printk("[%s:%d] irix_getcontext(%p)\n",
- current->comm, current->pid, ctx);
-#endif
-
- if (!access_ok(VERIFY_WRITE, ctx, sizeof(*ctx)))
- return -EFAULT;
-
- error = __put_user(current->thread.irix_oldctx, &ctx->link);
-
- error |= __copy_to_user(&ctx->sigmask, ¤t->blocked, sizeof(irix_sigset_t)) ? -EFAULT : 0;
-
- /* XXX Do sigstack stuff someday... */
- error |= __put_user(0, &ctx->stack.sp);
- error |= __put_user(0, &ctx->stack.size);
- error |= __put_user(0, &ctx->stack.flags);
-
- error |= __put_user(0, &ctx->weird_graphics_thing);
- error |= __put_user(0, &ctx->regs[0]);
- for (i = 1; i < 32; i++)
- error |= __put_user(regs->regs[i], &ctx->regs[i]);
- error |= __put_user(regs->lo, &ctx->regs[32]);
- error |= __put_user(regs->hi, &ctx->regs[33]);
- error |= __put_user(regs->cp0_cause, &ctx->regs[34]);
- error |= __put_user(regs->cp0_epc, &ctx->regs[35]);
-
- flags = 0x0f;
- if (!used_math()) {
- flags &= ~(0x08);
- } else {
- /* XXX wheee... */
- printk("Wheee, no code for saving IRIX FPU context yet.\n");
- }
- error |= __put_user(flags, &ctx->flags);
-
- return error;
-}
-
-asmlinkage void irix_setcontext(struct pt_regs *regs)
-{
- struct irix5_context __user *ctx;
- int err, base = 0;
- u32 flags;
-
- if (regs->regs[2] == 1000)
- base = 1;
- ctx = (struct irix5_context __user *) regs->regs[base + 4];
-
-#ifdef DEBUG_SIG
- printk("[%s:%d] irix_setcontext(%p)\n",
- current->comm, current->pid, ctx);
-#endif
-
- if (!access_ok(VERIFY_READ, ctx, sizeof(*ctx)))
- goto segv_and_exit;
-
- err = __get_user(flags, &ctx->flags);
- if (flags & 0x02) {
- /* XXX sigstack garbage, todo... */
- printk("Wheee, cannot do sigstack stuff in setcontext\n");
- }
-
- if (flags & 0x04) {
- int i;
-
- /* XXX extra control block stuff... todo... */
- for (i = 1; i < 32; i++)
- err |= __get_user(regs->regs[i], &ctx->regs[i]);
- err |= __get_user(regs->lo, &ctx->regs[32]);
- err |= __get_user(regs->hi, &ctx->regs[33]);
- err |= __get_user(regs->cp0_epc, &ctx->regs[35]);
- }
-
- if (flags & 0x08)
- /* XXX fpu context, blah... */
- printk(KERN_ERR "Wheee, cannot restore FPU context yet...\n");
-
- err |= __get_user(current->thread.irix_oldctx, &ctx->link);
- if (err)
- goto segv_and_exit;
-
- /*
- * Don't let your children do this ...
- */
- __asm__ __volatile__(
- "move\t$29,%0\n\t"
- "j\tsyscall_exit"
- :/* no outputs */
- :"r" (®s));
- /* Unreached */
-
-segv_and_exit:
- force_sigsegv(SIGSEGV, current);
-}
-
-struct irix_sigstack {
- unsigned long sp;
- int status;
-};
-
-asmlinkage int irix_sigstack(struct irix_sigstack __user *new,
- struct irix_sigstack __user *old)
-{
-#ifdef DEBUG_SIG
- printk("[%s:%d] irix_sigstack(%p,%p)\n",
- current->comm, current->pid, new, old);
-#endif
- if (new) {
- if (!access_ok(VERIFY_READ, new, sizeof(*new)))
- return -EFAULT;
- }
-
- if (old) {
- if (!access_ok(VERIFY_WRITE, old, sizeof(*old)))
- return -EFAULT;
- }
-
- return 0;
-}
-
-struct irix_sigaltstack { unsigned long sp; int size; int status; };
-
-asmlinkage int irix_sigaltstack(struct irix_sigaltstack __user *new,
- struct irix_sigaltstack __user *old)
-{
-#ifdef DEBUG_SIG
- printk("[%s:%d] irix_sigaltstack(%p,%p)\n",
- current->comm, current->pid, new, old);
-#endif
- if (new)
- if (!access_ok(VERIFY_READ, new, sizeof(*new)))
- return -EFAULT;
-
- if (old) {
- if (!access_ok(VERIFY_WRITE, old, sizeof(*old)))
- return -EFAULT;
- }
-
- return 0;
-}
-
-struct irix_procset {
- int cmd, ltype, lid, rtype, rid;
-};
-
-asmlinkage int irix_sigsendset(struct irix_procset __user *pset, int sig)
-{
- if (!access_ok(VERIFY_READ, pset, sizeof(*pset)))
- return -EFAULT;
-#ifdef DEBUG_SIG
- printk("[%s:%d] irix_sigsendset([%d,%d,%d,%d,%d],%d)\n",
- current->comm, current->pid,
- pset->cmd, pset->ltype, pset->lid, pset->rtype, pset->rid,
- sig);
-#endif
- return -EINVAL;
-}
return irq;
}
-EXPORT_SYMBOL_GPL(allocate_irqno);
-
/*
* Allocate the 16 legacy interrupts for i8259 devices. This happens early
* in the kernel initialization so treating allocation failure as BUG() is
smp_mb__after_clear_bit();
}
-EXPORT_SYMBOL_GPL(free_irqno);
-
/*
* 'what should we do if we get a hw irq event on an illegal vector'.
* each architecture has to answer this themselves.
*/
#include <linux/device.h>
-#include <linux/kallsyms.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/module.h>
read_vpe_c0_vpeconf0());
printk(" VPE%d.Status : %08lx\n",
i, read_vpe_c0_status());
- printk(" VPE%d.EPC : %08lx ",
- i, read_vpe_c0_epc());
- print_symbol("%s\n", read_vpe_c0_epc());
+ printk(" VPE%d.EPC : %08lx %pS\n",
+ i, read_vpe_c0_epc(),
+ (void *) read_vpe_c0_epc());
printk(" VPE%d.Cause : %08lx\n",
i, read_vpe_c0_cause());
printk(" VPE%d.Config7 : %08lx\n",
}
printk(" TCStatus : %08lx\n", tcstatval);
printk(" TCBind : %08lx\n", read_tc_c0_tcbind());
- printk(" TCRestart : %08lx ", read_tc_c0_tcrestart());
- print_symbol("%s\n", read_tc_c0_tcrestart());
+ printk(" TCRestart : %08lx %pS\n",
+ read_tc_c0_tcrestart(), (void *) read_tc_c0_tcrestart());
printk(" TCHalt : %08lx\n", haltval);
printk(" TCContext : %08lx\n", read_tc_c0_tccontext());
if (!haltval)
*childregs = *regs;
childregs->regs[7] = 0; /* Clear error flag */
-#if defined(CONFIG_BINFMT_IRIX)
- if (current->personality != PER_LINUX) {
- /* Under IRIX things are a little different. */
- childregs->regs[3] = 1;
- regs->regs[3] = 0;
- }
-#endif
childregs->regs[2] = 0; /* Child gets zero as return value */
regs->regs[2] = p->pid;
lw t1, PT_EPC(sp) # skip syscall on return
-#if defined(CONFIG_BINFMT_IRIX)
- sltiu t0, v0, MAX_SYSCALL_NO + 1 # check syscall number
-#else
subu v0, v0, __NR_O32_Linux # check syscall number
sltiu t0, v0, __NR_O32_Linux_syscalls + 1
-#endif
addiu t1, 4 # skip to next instruction
sw t1, PT_EPC(sp)
beqz t0, illegal_syscall
END(sys_sysmips)
LEAF(sys_syscall)
-#if defined(CONFIG_BINFMT_IRIX)
- sltiu v0, a0, MAX_SYSCALL_NO + 1 # check syscall number
-#else
subu t0, a0, __NR_O32_Linux # check syscall number
sltiu v0, t0, __NR_O32_Linux_syscalls + 1
-#endif
sll t1, t0, 3
beqz v0, einval
lw t2, sys_call_table(t1) # syscall routine
-#if defined(CONFIG_BINFMT_IRIX)
- li v1, 4000 # nr of sys_syscall
-#else
li v1, 4000 - __NR_O32_Linux # index of sys_syscall
-#endif
beq t0, v1, einval # do not recurse
/* Some syscalls like execve get their arguments from struct pt_regs
.endm
.macro syscalltable
-#if defined(CONFIG_BINFMT_IRIX)
- mille sys_ni_syscall 0 /* 0 - 999 SVR4 flavour */
- mille sys_ni_syscall 0 /* 1000 - 1999 32-bit IRIX */
- mille sys_ni_syscall 0 /* 2000 - 2999 BSD43 flavour */
- mille sys_ni_syscall 0 /* 3000 - 3999 POSIX flavour */
-#endif
-
sys sys_syscall 8 /* 4000 */
sys sys_exit 1
sys sys_fork 0
const unsigned long mips_io_port_base __read_mostly = -1;
EXPORT_SYMBOL(mips_io_port_base);
-/*
- * isa_slot_offset is the address where E(ISA) busaddress 0 is mapped
- * for the processor.
- */
-unsigned long isa_slot_offset;
-EXPORT_SYMBOL(isa_slot_offset);
-
static struct resource code_resource = { .name = "Kernel code", };
static struct resource data_resource = { .name = "Kernel data", };
prom_init();
#ifdef CONFIG_EARLY_PRINTK
- {
- extern void setup_early_printk(void);
-
- setup_early_printk();
- }
+ setup_early_printk();
#endif
cpu_report();
check_bugs_early();
+++ /dev/null
-/*
- * sysirix.c: IRIX system call emulation.
- *
- * Copyright (C) 1996 David S. Miller
- * Copyright (C) 1997 Miguel de Icaza
- * Copyright (C) 1997, 1998, 1999, 2000 Ralf Baechle
- */
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/binfmts.h>
-#include <linux/capability.h>
-#include <linux/highuid.h>
-#include <linux/pagemap.h>
-#include <linux/mm.h>
-#include <linux/mman.h>
-#include <linux/slab.h>
-#include <linux/swap.h>
-#include <linux/errno.h>
-#include <linux/time.h>
-#include <linux/timex.h>
-#include <linux/times.h>
-#include <linux/elf.h>
-#include <linux/msg.h>
-#include <linux/shm.h>
-#include <linux/smp.h>
-#include <linux/smp_lock.h>
-#include <linux/utsname.h>
-#include <linux/file.h>
-#include <linux/vfs.h>
-#include <linux/namei.h>
-#include <linux/socket.h>
-#include <linux/security.h>
-#include <linux/syscalls.h>
-#include <linux/resource.h>
-
-#include <asm/ptrace.h>
-#include <asm/page.h>
-#include <asm/uaccess.h>
-#include <asm/inventory.h>
-
-/* 2,191 lines of complete and utter shit coming up... */
-
-extern int max_threads;
-
-/* The sysmp commands supported thus far. */
-#define MP_NPROCS 1 /* # processor in complex */
-#define MP_NAPROCS 2 /* # active processors in complex */
-#define MP_PGSIZE 14 /* Return system page size in v1. */
-
-asmlinkage int irix_sysmp(struct pt_regs *regs)
-{
- unsigned long cmd;
- int base = 0;
- int error = 0;
-
- if(regs->regs[2] == 1000)
- base = 1;
- cmd = regs->regs[base + 4];
- switch(cmd) {
- case MP_PGSIZE:
- error = PAGE_SIZE;
- break;
- case MP_NPROCS:
- case MP_NAPROCS:
- error = num_online_cpus();
- break;
- default:
- printk("SYSMP[%s:%d]: Unsupported opcode %d\n",
- current->comm, current->pid, (int)cmd);
- error = -EINVAL;
- break;
- }
-
- return error;
-}
-
-/* The prctl commands. */
-#define PR_MAXPROCS 1 /* Tasks/user. */
-#define PR_ISBLOCKED 2 /* If blocked, return 1. */
-#define PR_SETSTACKSIZE 3 /* Set largest task stack size. */
-#define PR_GETSTACKSIZE 4 /* Get largest task stack size. */
-#define PR_MAXPPROCS 5 /* Num parallel tasks. */
-#define PR_UNBLKONEXEC 6 /* When task exec/exit's, unblock. */
-#define PR_SETEXITSIG 8 /* When task exit's, set signal. */
-#define PR_RESIDENT 9 /* Make task unswappable. */
-#define PR_ATTACHADDR 10 /* (Re-)Connect a vma to a task. */
-#define PR_DETACHADDR 11 /* Disconnect a vma from a task. */
-#define PR_TERMCHILD 12 /* Kill child if the parent dies. */
-#define PR_GETSHMASK 13 /* Get the sproc() share mask. */
-#define PR_GETNSHARE 14 /* Number of share group members. */
-#define PR_COREPID 15 /* Add task pid to name when it core. */
-#define PR_ATTACHADDRPERM 16 /* (Re-)Connect vma, with specified prot. */
-#define PR_PTHREADEXIT 17 /* Kill a pthread, only for IRIX 6.[234] */
-
-asmlinkage int irix_prctl(unsigned option, ...)
-{
- va_list args;
- int error = 0;
-
- va_start(args, option);
- switch (option) {
- case PR_MAXPROCS:
- printk("irix_prctl[%s:%d]: Wants PR_MAXPROCS\n",
- current->comm, current->pid);
- error = max_threads;
- break;
-
- case PR_ISBLOCKED: {
- struct task_struct *task;
-
- printk("irix_prctl[%s:%d]: Wants PR_ISBLOCKED\n",
- current->comm, current->pid);
- read_lock(&tasklist_lock);
- task = find_task_by_vpid(va_arg(args, pid_t));
- error = -ESRCH;
- if (error)
- error = (task->run_list.next != NULL);
- read_unlock(&tasklist_lock);
- /* Can _your_ OS find this out that fast? */
- break;
- }
-
- case PR_SETSTACKSIZE: {
- long value = va_arg(args, long);
-
- printk("irix_prctl[%s:%d]: Wants PR_SETSTACKSIZE<%08lx>\n",
- current->comm, current->pid, (unsigned long) value);
- if (value > RLIM_INFINITY)
- value = RLIM_INFINITY;
- if (capable(CAP_SYS_ADMIN)) {
- task_lock(current->group_leader);
- current->signal->rlim[RLIMIT_STACK].rlim_max =
- current->signal->rlim[RLIMIT_STACK].rlim_cur = value;
- task_unlock(current->group_leader);
- error = value;
- break;
- }
- task_lock(current->group_leader);
- if (value > current->signal->rlim[RLIMIT_STACK].rlim_max) {
- error = -EINVAL;
- task_unlock(current->group_leader);
- break;
- }
- current->signal->rlim[RLIMIT_STACK].rlim_cur = value;
- task_unlock(current->group_leader);
- error = value;
- break;
- }
-
- case PR_GETSTACKSIZE:
- printk("irix_prctl[%s:%d]: Wants PR_GETSTACKSIZE\n",
- current->comm, current->pid);
- error = current->signal->rlim[RLIMIT_STACK].rlim_cur;
- break;
-
- case PR_MAXPPROCS:
- printk("irix_prctl[%s:%d]: Wants PR_MAXPROCS\n",
- current->comm, current->pid);
- error = 1;
- break;
-
- case PR_UNBLKONEXEC:
- printk("irix_prctl[%s:%d]: Wants PR_UNBLKONEXEC\n",
- current->comm, current->pid);
- error = -EINVAL;
- break;
-
- case PR_SETEXITSIG:
- printk("irix_prctl[%s:%d]: Wants PR_SETEXITSIG\n",
- current->comm, current->pid);
-
- /* We can probably play some game where we set the task
- * exit_code to some non-zero value when this is requested,
- * and check whether exit_code is already set in do_exit().
- */
- error = -EINVAL;
- break;
-
- case PR_RESIDENT:
- printk("irix_prctl[%s:%d]: Wants PR_RESIDENT\n",
- current->comm, current->pid);
- error = 0; /* Compatibility indeed. */
- break;
-
- case PR_ATTACHADDR:
- printk("irix_prctl[%s:%d]: Wants PR_ATTACHADDR\n",
- current->comm, current->pid);
- error = -EINVAL;
- break;
-
- case PR_DETACHADDR:
- printk("irix_prctl[%s:%d]: Wants PR_DETACHADDR\n",
- current->comm, current->pid);
- error = -EINVAL;
- break;
-
- case PR_TERMCHILD:
- printk("irix_prctl[%s:%d]: Wants PR_TERMCHILD\n",
- current->comm, current->pid);
- error = -EINVAL;
- break;
-
- case PR_GETSHMASK:
- printk("irix_prctl[%s:%d]: Wants PR_GETSHMASK\n",
- current->comm, current->pid);
- error = -EINVAL; /* Until I have the sproc() stuff in. */
- break;
-
- case PR_GETNSHARE:
- error = 0; /* Until I have the sproc() stuff in. */
- break;
-
- case PR_COREPID:
- printk("irix_prctl[%s:%d]: Wants PR_COREPID\n",
- current->comm, current->pid);
- error = -EINVAL;
- break;
-
- case PR_ATTACHADDRPERM:
- printk("irix_prctl[%s:%d]: Wants PR_ATTACHADDRPERM\n",
- current->comm, current->pid);
- error = -EINVAL;
- break;
-
- default:
- printk("irix_prctl[%s:%d]: Non-existant opcode %d\n",
- current->comm, current->pid, option);
- error = -EINVAL;
- break;
- }
- va_end(args);
-
- return error;
-}
-
-#undef DEBUG_PROCGRPS
-
-extern unsigned long irix_mapelf(int fd, struct elf_phdr __user *user_phdrp, int cnt);
-extern char *prom_getenv(char *name);
-extern long prom_setenv(char *name, char *value);
-
-/* The syssgi commands supported thus far. */
-#define SGI_SYSID 1 /* Return unique per-machine identifier. */
-#define SGI_INVENT 5 /* Fetch inventory */
-# define SGI_INV_SIZEOF 1
-# define SGI_INV_READ 2
-#define SGI_RDNAME 6 /* Return string name of a process. */
-#define SGI_SETNVRAM 8 /* Set PROM variable. */
-#define SGI_GETNVRAM 9 /* Get PROM variable. */
-#define SGI_SETPGID 21 /* Set process group id. */
-#define SGI_SYSCONF 22 /* POSIX sysconf garbage. */
-#define SGI_PATHCONF 24 /* POSIX sysconf garbage. */
-#define SGI_SETGROUPS 40 /* POSIX sysconf garbage. */
-#define SGI_GETGROUPS 41 /* POSIX sysconf garbage. */
-#define SGI_RUSAGE 56 /* BSD style rusage(). */
-#define SGI_SSYNC 62 /* Synchronous fs sync. */
-#define SGI_GETSID 65 /* SysVr4 get session id. */
-#define SGI_ELFMAP 68 /* Map an elf image. */
-#define SGI_TOSSTSAVE 108 /* Toss saved vma's. */
-#define SGI_FP_BCOPY 129 /* Should FPU bcopy be used on this machine? */
-#define SGI_PHYSP 1011 /* Translate virtual into physical page. */
-
-asmlinkage int irix_syssgi(struct pt_regs *regs)
-{
- unsigned long cmd;
- int retval, base = 0;
-
- if (regs->regs[2] == 1000)
- base = 1;
-
- cmd = regs->regs[base + 4];
- switch(cmd) {
- case SGI_SYSID: {
- char __user *buf = (char __user *) regs->regs[base + 5];
-
- /* XXX Use ethernet addr.... */
- retval = clear_user(buf, 64) ? -EFAULT : 0;
- break;
- }
-#if 0
- case SGI_RDNAME: {
- int pid = (int) regs->regs[base + 5];
- char __user *buf = (char __user *) regs->regs[base + 6];
- struct task_struct *p;
- char tcomm[sizeof(current->comm)];
-
- read_lock(&tasklist_lock);
- p = find_task_by_pid(pid);
- if (!p) {
- read_unlock(&tasklist_lock);
- retval = -ESRCH;
- break;
- }
- get_task_comm(tcomm, p);
- read_unlock(&tasklist_lock);
-
- /* XXX Need to check sizes. */
- retval = copy_to_user(buf, tcomm, sizeof(tcomm)) ? -EFAULT : 0;
- break;
- }
-
- case SGI_GETNVRAM: {
- char __user *name = (char __user *) regs->regs[base+5];
- char __user *buf = (char __user *) regs->regs[base+6];
- char *value;
- return -EINVAL; /* til I fix it */
- value = prom_getenv(name); /* PROM lock? */
- if (!value) {
- retval = -EINVAL;
- break;
- }
- /* Do I strlen() for the length? */
- retval = copy_to_user(buf, value, 128) ? -EFAULT : 0;
- break;
- }
-
- case SGI_SETNVRAM: {
- char __user *name = (char __user *) regs->regs[base+5];
- char __user *value = (char __user *) regs->regs[base+6];
- return -EINVAL; /* til I fix it */
- retval = prom_setenv(name, value);
- /* XXX make sure retval conforms to syssgi(2) */
- printk("[%s:%d] setnvram(\"%s\", \"%s\"): retval %d",
- current->comm, current->pid, name, value, retval);
-/* if (retval == PROM_ENOENT)
- retval = -ENOENT; */
- break;
- }
-#endif
-
- case SGI_SETPGID: {
-#ifdef DEBUG_PROCGRPS
- printk("[%s:%d] setpgid(%d, %d) ",
- current->comm, current->pid,
- (int) regs->regs[base + 5], (int)regs->regs[base + 6]);
-#endif
- retval = sys_setpgid(regs->regs[base + 5], regs->regs[base + 6]);
-
-#ifdef DEBUG_PROCGRPS
- printk("retval=%d\n", retval);
-#endif
- }
-
- case SGI_SYSCONF: {
- switch(regs->regs[base + 5]) {
- case 1:
- retval = (MAX_ARG_PAGES >> 4); /* XXX estimate... */
- goto out;
- case 2:
- retval = max_threads;
- goto out;
- case 3:
- retval = HZ;
- goto out;
- case 4:
- retval = NGROUPS_MAX;
- goto out;
- case 5:
- retval = sysctl_nr_open;
- goto out;
- case 6:
- retval = 1;
- goto out;
- case 7:
- retval = 1;
- goto out;
- case 8:
- retval = 199009;
- goto out;
- case 11:
- retval = PAGE_SIZE;
- goto out;
- case 12:
- retval = 4;
- goto out;
- case 25:
- case 26:
- case 27:
- case 28:
- case 29:
- case 30:
- retval = 0;
- goto out;
- case 31:
- retval = 32;
- goto out;
- default:
- retval = -EINVAL;
- goto out;
- };
- }
-
- case SGI_SETGROUPS:
- retval = sys_setgroups((int) regs->regs[base + 5],
- (gid_t __user *) regs->regs[base + 6]);
- break;
-
- case SGI_GETGROUPS:
- retval = sys_getgroups((int) regs->regs[base + 5],
- (gid_t __user *) regs->regs[base + 6]);
- break;
-
- case SGI_RUSAGE: {
- struct rusage __user *ru = (struct rusage __user *) regs->regs[base + 6];
-
- switch((int) regs->regs[base + 5]) {
- case 0:
- /* rusage self */
- retval = getrusage(current, RUSAGE_SELF, ru);
- goto out;
-
- case -1:
- /* rusage children */
- retval = getrusage(current, RUSAGE_CHILDREN, ru);
- goto out;
-
- default:
- retval = -EINVAL;
- goto out;
- };
- }
-
- case SGI_SSYNC:
- sys_sync();
- retval = 0;
- break;
-
- case SGI_GETSID:
-#ifdef DEBUG_PROCGRPS
- printk("[%s:%d] getsid(%d) ", current->comm, current->pid,
- (int) regs->regs[base + 5]);
-#endif
- retval = sys_getsid(regs->regs[base + 5]);
-#ifdef DEBUG_PROCGRPS
- printk("retval=%d\n", retval);
-#endif
- break;
-
- case SGI_ELFMAP:
- retval = irix_mapelf((int) regs->regs[base + 5],
- (struct elf_phdr __user *) regs->regs[base + 6],
- (int) regs->regs[base + 7]);
- break;
-
- case SGI_TOSSTSAVE:
- /* XXX We don't need to do anything? */
- retval = 0;
- break;
-
- case SGI_FP_BCOPY:
- retval = 0;
- break;
-
- case SGI_PHYSP: {
- unsigned long addr = regs->regs[base + 5];
- int __user *pageno = (int __user *) (regs->regs[base + 6]);
- struct mm_struct *mm = current->mm;
- pgd_t *pgdp;
- pud_t *pudp;
- pmd_t *pmdp;
- pte_t *ptep;
-
- down_read(&mm->mmap_sem);
- pgdp = pgd_offset(mm, addr);
- pudp = pud_offset(pgdp, addr);
- pmdp = pmd_offset(pudp, addr);
- ptep = pte_offset(pmdp, addr);
- retval = -EINVAL;
- if (ptep) {
- pte_t pte = *ptep;
-
- if (pte_val(pte) & (_PAGE_VALID | _PAGE_PRESENT)) {
- /* b0rked on 64-bit */
- retval = put_user((pte_val(pte) & PAGE_MASK) >>
- PAGE_SHIFT, pageno);
- }
- }
- up_read(&mm->mmap_sem);
- break;
- }
-
- case SGI_INVENT: {
- int arg1 = (int) regs->regs [base + 5];
- void __user *buffer = (void __user *) regs->regs [base + 6];
- int count = (int) regs->regs [base + 7];
-
- switch (arg1) {
- case SGI_INV_SIZEOF:
- retval = sizeof(inventory_t);
- break;
- case SGI_INV_READ:
- retval = dump_inventory_to_user(buffer, count);
- break;
- default:
- retval = -EINVAL;
- }
- break;
- }
-
- default:
- printk("irix_syssgi: Unsupported command %d\n", (int)cmd);
- retval = -EINVAL;
- break;
- };
-
-out:
- return retval;
-}
-
-asmlinkage int irix_gtime(struct pt_regs *regs)
-{
- return get_seconds();
-}
-
-/*
- * IRIX is completely broken... it returns 0 on success, otherwise
- * ENOMEM.
- */
-asmlinkage int irix_brk(unsigned long brk)
-{
- unsigned long rlim;
- unsigned long newbrk, oldbrk;
- struct mm_struct *mm = current->mm;
- int ret;
-
- down_write(&mm->mmap_sem);
- if (brk < mm->end_code) {
- ret = -ENOMEM;
- goto out;
- }
-
- newbrk = PAGE_ALIGN(brk);
- oldbrk = PAGE_ALIGN(mm->brk);
- if (oldbrk == newbrk) {
- mm->brk = brk;
- ret = 0;
- goto out;
- }
-
- /*
- * Always allow shrinking brk
- */
- if (brk <= mm->brk) {
- mm->brk = brk;
- do_munmap(mm, newbrk, oldbrk-newbrk);
- ret = 0;
- goto out;
- }
- /*
- * Check against rlimit and stack..
- */
- rlim = current->signal->rlim[RLIMIT_DATA].rlim_cur;
- if (rlim >= RLIM_INFINITY)
- rlim = ~0;
- if (brk - mm->end_code > rlim) {
- ret = -ENOMEM;
- goto out;
- }
-
- /*
- * Check against existing mmap mappings.
- */
- if (find_vma_intersection(mm, oldbrk, newbrk+PAGE_SIZE)) {
- ret = -ENOMEM;
- goto out;
- }
-
- /*
- * Ok, looks good - let it rip.
- */
- if (do_brk(oldbrk, newbrk-oldbrk) != oldbrk) {
- ret = -ENOMEM;
- goto out;
- }
- mm->brk = brk;
- ret = 0;
-
-out:
- up_write(&mm->mmap_sem);
- return ret;
-}
-
-asmlinkage int irix_getpid(struct pt_regs *regs)
-{
- regs->regs[3] = task_pid_vnr(current->real_parent);
- return task_pid_vnr(current);
-}
-
-asmlinkage int irix_getuid(struct pt_regs *regs)
-{
- regs->regs[3] = current->euid;
- return current->uid;
-}
-
-asmlinkage int irix_getgid(struct pt_regs *regs)
-{
- regs->regs[3] = current->egid;
- return current->gid;
-}
-
-asmlinkage int irix_stime(int value)
-{
- int err;
- struct timespec tv;
-
- tv.tv_sec = value;
- tv.tv_nsec = 0;
- err = security_settime(&tv, NULL);
- if (err)
- return err;
-
- write_seqlock_irq(&xtime_lock);
- xtime.tv_sec = value;
- xtime.tv_nsec = 0;
- ntp_clear();
- write_sequnlock_irq(&xtime_lock);
-
- return 0;
-}
-
-static inline void jiffiestotv(unsigned long jiffies, struct timeval *value)
-{
- value->tv_usec = (jiffies % HZ) * (1000000 / HZ);
- value->tv_sec = jiffies / HZ;
-}
-
-static inline void getitimer_real(struct itimerval *value)
-{
- register unsigned long val, interval;
-
- interval = current->it_real_incr;
- val = 0;
- if (del_timer(¤t->real_timer)) {
- unsigned long now = jiffies;
- val = current->real_timer.expires;
- add_timer(¤t->real_timer);
- /* look out for negative/zero itimer.. */
- if (val <= now)
- val = now+1;
- val -= now;
- }
- jiffiestotv(val, &value->it_value);
- jiffiestotv(interval, &value->it_interval);
-}
-
-asmlinkage unsigned int irix_alarm(unsigned int seconds)
-{
- return alarm_setitimer(seconds);
-}
-
-asmlinkage int irix_pause(void)
-{
- current->state = TASK_INTERRUPTIBLE;
- schedule();
-
- return -EINTR;
-}
-
-/* XXX need more than this... */
-asmlinkage int irix_mount(char __user *dev_name, char __user *dir_name,
- unsigned long flags, char __user *type, void __user *data, int datalen)
-{
- printk("[%s:%d] irix_mount(%p,%p,%08lx,%p,%p,%d)\n",
- current->comm, current->pid,
- dev_name, dir_name, flags, type, data, datalen);
-
- return sys_mount(dev_name, dir_name, type, flags, data);
-}
-
-struct irix_statfs {
- short f_type;
- long f_bsize, f_frsize, f_blocks, f_bfree, f_files, f_ffree;
- char f_fname[6], f_fpack[6];
-};
-
-asmlinkage int irix_statfs(const char __user *path,
- struct irix_statfs __user *buf, int len, int fs_type)
-{
- struct nameidata nd;
- struct kstatfs kbuf;
- int error, i;
-
- /* We don't support this feature yet. */
- if (fs_type) {
- error = -EINVAL;
- goto out;
- }
- if (!access_ok(VERIFY_WRITE, buf, sizeof(struct irix_statfs))) {
- error = -EFAULT;
- goto out;
- }
-
- error = user_path_walk(path, &nd);
- if (error)
- goto out;
-
- error = vfs_statfs(nd.path.dentry, &kbuf);
- if (error)
- goto dput_and_out;
-
- error = __put_user(kbuf.f_type, &buf->f_type);
- error |= __put_user(kbuf.f_bsize, &buf->f_bsize);
- error |= __put_user(kbuf.f_frsize, &buf->f_frsize);
- error |= __put_user(kbuf.f_blocks, &buf->f_blocks);
- error |= __put_user(kbuf.f_bfree, &buf->f_bfree);
- error |= __put_user(kbuf.f_files, &buf->f_files);
- error |= __put_user(kbuf.f_ffree, &buf->f_ffree);
- for (i = 0; i < 6; i++) {
- error |= __put_user(0, &buf->f_fname[i]);
- error |= __put_user(0, &buf->f_fpack[i]);
- }
-
-dput_and_out:
- path_put(&nd.path);
-out:
- return error;
-}
-
-asmlinkage int irix_fstatfs(unsigned int fd, struct irix_statfs __user *buf)
-{
- struct kstatfs kbuf;
- struct file *file;
- int error, i;
-
- if (!access_ok(VERIFY_WRITE, buf, sizeof(struct irix_statfs))) {
- error = -EFAULT;
- goto out;
- }
-
- if (!(file = fget(fd))) {
- error = -EBADF;
- goto out;
- }
-
- error = vfs_statfs(file->f_path.dentry, &kbuf);
- if (error)
- goto out_f;
-
- error = __put_user(kbuf.f_type, &buf->f_type);
- error |= __put_user(kbuf.f_bsize, &buf->f_bsize);
- error |= __put_user(kbuf.f_frsize, &buf->f_frsize);
- error |= __put_user(kbuf.f_blocks, &buf->f_blocks);
- error |= __put_user(kbuf.f_bfree, &buf->f_bfree);
- error |= __put_user(kbuf.f_files, &buf->f_files);
- error |= __put_user(kbuf.f_ffree, &buf->f_ffree);
-
- for (i = 0; i < 6; i++) {
- error |= __put_user(0, &buf->f_fname[i]);
- error |= __put_user(0, &buf->f_fpack[i]);
- }
-
-out_f:
- fput(file);
-out:
- return error;
-}
-
-asmlinkage int irix_setpgrp(int flags)
-{
- int error;
-
-#ifdef DEBUG_PROCGRPS
- printk("[%s:%d] setpgrp(%d) ", current->comm, current->pid, flags);
-#endif
- if(!flags)
- error = task_pgrp_vnr(current);
- else
- error = sys_setsid();
-#ifdef DEBUG_PROCGRPS
- printk("returning %d\n", error);
-#endif
-
- return error;
-}
-
-asmlinkage int irix_times(struct tms __user *tbuf)
-{
- int err = 0;
-
- if (tbuf) {
- if (!access_ok(VERIFY_WRITE, tbuf, sizeof *tbuf))
- return -EFAULT;
-
- err = __put_user(current->utime, &tbuf->tms_utime);
- err |= __put_user(current->stime, &tbuf->tms_stime);
- err |= __put_user(current->signal->cutime, &tbuf->tms_cutime);
- err |= __put_user(current->signal->cstime, &tbuf->tms_cstime);
- }
-
- return err;
-}
-
-asmlinkage int irix_exec(struct pt_regs *regs)
-{
- int error, base = 0;
- char *filename;
-
- if(regs->regs[2] == 1000)
- base = 1;
- filename = getname((char __user *) (long)regs->regs[base + 4]);
- error = PTR_ERR(filename);
- if (IS_ERR(filename))
- return error;
-
- error = do_execve(filename, (char __user * __user *) (long)regs->regs[base + 5],
- NULL, regs);
- putname(filename);
-
- return error;
-}
-
-asmlinkage int irix_exece(struct pt_regs *regs)
-{
- int error, base = 0;
- char *filename;
-
- if (regs->regs[2] == 1000)
- base = 1;
- filename = getname((char __user *) (long)regs->regs[base + 4]);
- error = PTR_ERR(filename);
- if (IS_ERR(filename))
- return error;
- error = do_execve(filename, (char __user * __user *) (long)regs->regs[base + 5],
- (char __user * __user *) (long)regs->regs[base + 6], regs);
- putname(filename);
-
- return error;
-}
-
-asmlinkage unsigned long irix_gethostid(void)
-{
- printk("[%s:%d]: irix_gethostid() called...\n",
- current->comm, current->pid);
-
- return -EINVAL;
-}
-
-asmlinkage unsigned long irix_sethostid(unsigned long val)
-{
- printk("[%s:%d]: irix_sethostid(%08lx) called...\n",
- current->comm, current->pid, val);
-
- return -EINVAL;
-}
-
-asmlinkage int irix_socket(int family, int type, int protocol)
-{
- switch(type) {
- case 1:
- type = SOCK_DGRAM;
- break;
-
- case 2:
- type = SOCK_STREAM;
- break;
-
- case 3:
- type = 9; /* Invalid... */
- break;
-
- case 4:
- type = SOCK_RAW;
- break;
-
- case 5:
- type = SOCK_RDM;
- break;
-
- case 6:
- type = SOCK_SEQPACKET;
- break;
-
- default:
- break;
- }
-
- return sys_socket(family, type, protocol);
-}
-
-asmlinkage int irix_getdomainname(char __user *name, int len)
-{
- int err;
-
- down_read(&uts_sem);
- if (len > __NEW_UTS_LEN)
- len = __NEW_UTS_LEN;
- err = copy_to_user(name, utsname()->domainname, len) ? -EFAULT : 0;
- up_read(&uts_sem);
-
- return err;
-}
-
-asmlinkage unsigned long irix_getpagesize(void)
-{
- return PAGE_SIZE;
-}
-
-asmlinkage int irix_msgsys(int opcode, unsigned long arg0, unsigned long arg1,
- unsigned long arg2, unsigned long arg3,
- unsigned long arg4)
-{
- switch (opcode) {
- case 0:
- return sys_msgget((key_t) arg0, (int) arg1);
- case 1:
- return sys_msgctl((int) arg0, (int) arg1,
- (struct msqid_ds __user *)arg2);
- case 2:
- return sys_msgrcv((int) arg0, (struct msgbuf __user *) arg1,
- (size_t) arg2, (long) arg3, (int) arg4);
- case 3:
- return sys_msgsnd((int) arg0, (struct msgbuf __user *) arg1,
- (size_t) arg2, (int) arg3);
- default:
- return -EINVAL;
- }
-}
-
-asmlinkage int irix_shmsys(int opcode, unsigned long arg0, unsigned long arg1,
- unsigned long arg2, unsigned long arg3)
-{
- switch (opcode) {
- case 0:
- return do_shmat((int) arg0, (char __user *) arg1, (int) arg2,
- (unsigned long *) arg3);
- case 1:
- return sys_shmctl((int)arg0, (int)arg1,
- (struct shmid_ds __user *)arg2);
- case 2:
- return sys_shmdt((char __user *)arg0);
- case 3:
- return sys_shmget((key_t) arg0, (int) arg1, (int) arg2);
- default:
- return -EINVAL;
- }
-}
-
-asmlinkage int irix_semsys(int opcode, unsigned long arg0, unsigned long arg1,
- unsigned long arg2, int arg3)
-{
- switch (opcode) {
- case 0:
- return sys_semctl((int) arg0, (int) arg1, (int) arg2,
- (union semun) arg3);
- case 1:
- return sys_semget((key_t) arg0, (int) arg1, (int) arg2);
- case 2:
- return sys_semop((int) arg0, (struct sembuf __user *)arg1,
- (unsigned int) arg2);
- default:
- return -EINVAL;
- }
-}
-
-static inline loff_t llseek(struct file *file, loff_t offset, int origin)
-{
- loff_t (*fn)(struct file *, loff_t, int);
- loff_t retval;
-
- fn = default_llseek;
- if (file->f_op && file->f_op->llseek)
- fn = file->f_op->llseek;
- lock_kernel();
- retval = fn(file, offset, origin);
- unlock_kernel();
-
- return retval;
-}
-
-asmlinkage int irix_lseek64(int fd, int _unused, int offhi, int offlow,
- int origin)
-{
- struct file * file;
- loff_t offset;
- int retval;
-
- retval = -EBADF;
- file = fget(fd);
- if (!file)
- goto bad;
- retval = -EINVAL;
- if (origin > 2)
- goto out_putf;
-
- offset = llseek(file, ((loff_t) offhi << 32) | offlow, origin);
- retval = (int) offset;
-
-out_putf:
- fput(file);
-bad:
- return retval;
-}
-
-asmlinkage int irix_sginap(int ticks)
-{
- schedule_timeout_interruptible(ticks);
- return 0;
-}
-
-asmlinkage int irix_sgikopt(char __user *istring, char __user *ostring, int len)
-{
- return -EINVAL;
-}
-
-asmlinkage int irix_gettimeofday(struct timeval __user *tv)
-{
- time_t sec;
- long nsec, seq;
- int err;
-
- if (!access_ok(VERIFY_WRITE, tv, sizeof(struct timeval)))
- return -EFAULT;
-
- do {
- seq = read_seqbegin(&xtime_lock);
- sec = xtime.tv_sec;
- nsec = xtime.tv_nsec;
- } while (read_seqretry(&xtime_lock, seq));
-
- err = __put_user(sec, &tv->tv_sec);
- err |= __put_user((nsec / 1000), &tv->tv_usec);
-
- return err;
-}
-
-#define IRIX_MAP_AUTOGROW 0x40
-
-asmlinkage unsigned long irix_mmap32(unsigned long addr, size_t len, int prot,
- int flags, int fd, off_t offset)
-{
- struct file *file = NULL;
- unsigned long retval;
-
- if (!(flags & MAP_ANONYMOUS)) {
- if (!(file = fget(fd)))
- return -EBADF;
-
- /* Ok, bad taste hack follows, try to think in something else
- * when reading this. */
- if (flags & IRIX_MAP_AUTOGROW) {
- unsigned long old_pos;
- long max_size = offset + len;
-
- if (max_size > file->f_path.dentry->d_inode->i_size) {
- old_pos = sys_lseek(fd, max_size - 1, 0);
- sys_write(fd, (void __user *) "", 1);
- sys_lseek(fd, old_pos, 0);
- }
- }
- }
-
- flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
-
- down_write(¤t->mm->mmap_sem);
- retval = do_mmap(file, addr, len, prot, flags, offset);
- up_write(¤t->mm->mmap_sem);
- if (file)
- fput(file);
-
- return retval;
-}
-
-asmlinkage int irix_madvise(unsigned long addr, int len, int behavior)
-{
- printk("[%s:%d] Wheee.. irix_madvise(%08lx,%d,%d)\n",
- current->comm, current->pid, addr, len, behavior);
-
- return -EINVAL;
-}
-
-asmlinkage int irix_pagelock(char __user *addr, int len, int op)
-{
- printk("[%s:%d] Wheee.. irix_pagelock(%p,%d,%d)\n",
- current->comm, current->pid, addr, len, op);
-
- return -EINVAL;
-}
-
-asmlinkage int irix_quotactl(struct pt_regs *regs)
-{
- printk("[%s:%d] Wheee.. irix_quotactl()\n",
- current->comm, current->pid);
-
- return -EINVAL;
-}
-
-asmlinkage int irix_BSDsetpgrp(int pid, int pgrp)
-{
- int error;
-
-#ifdef DEBUG_PROCGRPS
- printk("[%s:%d] BSDsetpgrp(%d, %d) ", current->comm, current->pid,
- pid, pgrp);
-#endif
- if(!pid)
- pid = task_pid_vnr(current);
-
- /* Wheee, weird sysv thing... */
- if ((pgrp == 0) && (pid == task_pid_vnr(current)))
- error = sys_setsid();
- else
- error = sys_setpgid(pid, pgrp);
-
-#ifdef DEBUG_PROCGRPS
- printk("error = %d\n", error);
-#endif
-
- return error;
-}
-
-asmlinkage int irix_systeminfo(int cmd, char __user *buf, int cnt)
-{
- printk("[%s:%d] Wheee.. irix_systeminfo(%d,%p,%d)\n",
- current->comm, current->pid, cmd, buf, cnt);
-
- return -EINVAL;
-}
-
-struct iuname {
- char sysname[257], nodename[257], release[257];
- char version[257], machine[257];
- char m_type[257], base_rel[257];
- char _unused0[257], _unused1[257], _unused2[257];
- char _unused3[257], _unused4[257], _unused5[257];
-};
-
-asmlinkage int irix_uname(struct iuname __user *buf)
-{
- down_read(&uts_sem);
- if (copy_from_user(utsname()->sysname, buf->sysname, 65)
- || copy_from_user(utsname()->nodename, buf->nodename, 65)
- || copy_from_user(utsname()->release, buf->release, 65)
- || copy_from_user(utsname()->version, buf->version, 65)
- || copy_from_user(utsname()->machine, buf->machine, 65)) {
- return -EFAULT;
- }
- up_read(&uts_sem);
-
- return 1;
-}
-
-#undef DEBUG_XSTAT
-
-static int irix_xstat32_xlate(struct kstat *stat, void __user *ubuf)
-{
- struct xstat32 {
- u32 st_dev, st_pad1[3], st_ino, st_mode, st_nlink, st_uid, st_gid;
- u32 st_rdev, st_pad2[2], st_size, st_pad3;
- u32 st_atime0, st_atime1;
- u32 st_mtime0, st_mtime1;
- u32 st_ctime0, st_ctime1;
- u32 st_blksize, st_blocks;
- char st_fstype[16];
- u32 st_pad4[8];
- } ub;
-
- if (!sysv_valid_dev(stat->dev) || !sysv_valid_dev(stat->rdev))
- return -EOVERFLOW;
- ub.st_dev = sysv_encode_dev(stat->dev);
- ub.st_ino = stat->ino;
- ub.st_mode = stat->mode;
- ub.st_nlink = stat->nlink;
- SET_UID(ub.st_uid, stat->uid);
- SET_GID(ub.st_gid, stat->gid);
- ub.st_rdev = sysv_encode_dev(stat->rdev);
-#if BITS_PER_LONG == 32
- if (stat->size > MAX_NON_LFS)
- return -EOVERFLOW;
-#endif
- ub.st_size = stat->size;
- ub.st_atime0 = stat->atime.tv_sec;
- ub.st_atime1 = stat->atime.tv_nsec;
- ub.st_mtime0 = stat->mtime.tv_sec;
- ub.st_mtime1 = stat->atime.tv_nsec;
- ub.st_ctime0 = stat->ctime.tv_sec;
- ub.st_ctime1 = stat->atime.tv_nsec;
- ub.st_blksize = stat->blksize;
- ub.st_blocks = stat->blocks;
- strcpy(ub.st_fstype, "efs");
-
- return copy_to_user(ubuf, &ub, sizeof(ub)) ? -EFAULT : 0;
-}
-
-static int irix_xstat64_xlate(struct kstat *stat, void __user *ubuf)
-{
- struct xstat64 {
- u32 st_dev; s32 st_pad1[3];
- unsigned long long st_ino;
- u32 st_mode;
- u32 st_nlink; s32 st_uid; s32 st_gid; u32 st_rdev;
- s32 st_pad2[2];
- long long st_size;
- s32 st_pad3;
- struct { s32 tv_sec, tv_nsec; } st_atime, st_mtime, st_ctime;
- s32 st_blksize;
- long long st_blocks;
- char st_fstype[16];
- s32 st_pad4[8];
- } ks;
-
- if (!sysv_valid_dev(stat->dev) || !sysv_valid_dev(stat->rdev))
- return -EOVERFLOW;
-
- ks.st_dev = sysv_encode_dev(stat->dev);
- ks.st_pad1[0] = ks.st_pad1[1] = ks.st_pad1[2] = 0;
- ks.st_ino = (unsigned long long) stat->ino;
- ks.st_mode = (u32) stat->mode;
- ks.st_nlink = (u32) stat->nlink;
- ks.st_uid = (s32) stat->uid;
- ks.st_gid = (s32) stat->gid;
- ks.st_rdev = sysv_encode_dev(stat->rdev);
- ks.st_pad2[0] = ks.st_pad2[1] = 0;
- ks.st_size = (long long) stat->size;
- ks.st_pad3 = 0;
-
- /* XXX hackety hack... */
- ks.st_atime.tv_sec = (s32) stat->atime.tv_sec;
- ks.st_atime.tv_nsec = stat->atime.tv_nsec;
- ks.st_mtime.tv_sec = (s32) stat->mtime.tv_sec;
- ks.st_mtime.tv_nsec = stat->mtime.tv_nsec;
- ks.st_ctime.tv_sec = (s32) stat->ctime.tv_sec;
- ks.st_ctime.tv_nsec = stat->ctime.tv_nsec;
-
- ks.st_blksize = (s32) stat->blksize;
- ks.st_blocks = (long long) stat->blocks;
- memset(ks.st_fstype, 0, 16);
- ks.st_pad4[0] = ks.st_pad4[1] = ks.st_pad4[2] = ks.st_pad4[3] = 0;
- ks.st_pad4[4] = ks.st_pad4[5] = ks.st_pad4[6] = ks.st_pad4[7] = 0;
-
- /* Now write it all back. */
- return copy_to_user(ubuf, &ks, sizeof(ks)) ? -EFAULT : 0;
-}
-
-asmlinkage int irix_xstat(int version, char __user *filename, struct stat __user *statbuf)
-{
- int retval;
- struct kstat stat;
-
-#ifdef DEBUG_XSTAT
- printk("[%s:%d] Wheee.. irix_xstat(%d,%s,%p) ",
- current->comm, current->pid, version, filename, statbuf);
-#endif
-
- retval = vfs_stat(filename, &stat);
- if (!retval) {
- switch(version) {
- case 2:
- retval = irix_xstat32_xlate(&stat, statbuf);
- break;
- case 3:
- retval = irix_xstat64_xlate(&stat, statbuf);
- break;
- default:
- retval = -EINVAL;
- }
- }
- return retval;
-}
-
-asmlinkage int irix_lxstat(int version, char __user *filename, struct stat __user *statbuf)
-{
- int error;
- struct kstat stat;
-
-#ifdef DEBUG_XSTAT
- printk("[%s:%d] Wheee.. irix_lxstat(%d,%s,%p) ",
- current->comm, current->pid, version, filename, statbuf);
-#endif
-
- error = vfs_lstat(filename, &stat);
-
- if (!error) {
- switch (version) {
- case 2:
- error = irix_xstat32_xlate(&stat, statbuf);
- break;
- case 3:
- error = irix_xstat64_xlate(&stat, statbuf);
- break;
- default:
- error = -EINVAL;
- }
- }
- return error;
-}
-
-asmlinkage int irix_fxstat(int version, int fd, struct stat __user *statbuf)
-{
- int error;
- struct kstat stat;
-
-#ifdef DEBUG_XSTAT
- printk("[%s:%d] Wheee.. irix_fxstat(%d,%d,%p) ",
- current->comm, current->pid, version, fd, statbuf);
-#endif
-
- error = vfs_fstat(fd, &stat);
- if (!error) {
- switch (version) {
- case 2:
- error = irix_xstat32_xlate(&stat, statbuf);
- break;
- case 3:
- error = irix_xstat64_xlate(&stat, statbuf);
- break;
- default:
- error = -EINVAL;
- }
- }
- return error;
-}
-
-asmlinkage int irix_xmknod(int ver, char __user *filename, int mode, unsigned dev)
-{
- int retval;
- printk("[%s:%d] Wheee.. irix_xmknod(%d,%s,%x,%x)\n",
- current->comm, current->pid, ver, filename, mode, dev);
-
- switch(ver) {
- case 2:
- /* shouldn't we convert here as well as on stat()? */
- retval = sys_mknod(filename, mode, dev);
- break;
-
- default:
- retval = -EINVAL;
- break;
- };
-
- return retval;
-}
-
-asmlinkage int irix_swapctl(int cmd, char __user *arg)
-{
- printk("[%s:%d] Wheee.. irix_swapctl(%d,%p)\n",
- current->comm, current->pid, cmd, arg);
-
- return -EINVAL;
-}
-
-struct irix_statvfs {
- u32 f_bsize; u32 f_frsize; u32 f_blocks;
- u32 f_bfree; u32 f_bavail; u32 f_files; u32 f_ffree; u32 f_favail;
- u32 f_fsid; char f_basetype[16];
- u32 f_flag; u32 f_namemax;
- char f_fstr[32]; u32 f_filler[16];
-};
-
-asmlinkage int irix_statvfs(char __user *fname, struct irix_statvfs __user *buf)
-{
- struct nameidata nd;
- struct kstatfs kbuf;
- int error, i;
-
- printk("[%s:%d] Wheee.. irix_statvfs(%s,%p)\n",
- current->comm, current->pid, fname, buf);
- if (!access_ok(VERIFY_WRITE, buf, sizeof(struct irix_statvfs)))
- return -EFAULT;
-
- error = user_path_walk(fname, &nd);
- if (error)
- goto out;
- error = vfs_statfs(nd.path.dentry, &kbuf);
- if (error)
- goto dput_and_out;
-
- error |= __put_user(kbuf.f_bsize, &buf->f_bsize);
- error |= __put_user(kbuf.f_frsize, &buf->f_frsize);
- error |= __put_user(kbuf.f_blocks, &buf->f_blocks);
- error |= __put_user(kbuf.f_bfree, &buf->f_bfree);
- error |= __put_user(kbuf.f_bfree, &buf->f_bavail); /* XXX hackety hack... */
- error |= __put_user(kbuf.f_files, &buf->f_files);
- error |= __put_user(kbuf.f_ffree, &buf->f_ffree);
- error |= __put_user(kbuf.f_ffree, &buf->f_favail); /* XXX hackety hack... */
-#ifdef __MIPSEB__
- error |= __put_user(kbuf.f_fsid.val[1], &buf->f_fsid);
-#else
- error |= __put_user(kbuf.f_fsid.val[0], &buf->f_fsid);
-#endif
- for (i = 0; i < 16; i++)
- error |= __put_user(0, &buf->f_basetype[i]);
- error |= __put_user(0, &buf->f_flag);
- error |= __put_user(kbuf.f_namelen, &buf->f_namemax);
- for (i = 0; i < 32; i++)
- error |= __put_user(0, &buf->f_fstr[i]);
-
-dput_and_out:
- path_put(&nd.path);
-out:
- return error;
-}
-
-asmlinkage int irix_fstatvfs(int fd, struct irix_statvfs __user *buf)
-{
- struct kstatfs kbuf;
- struct file *file;
- int error, i;
-
- printk("[%s:%d] Wheee.. irix_fstatvfs(%d,%p)\n",
- current->comm, current->pid, fd, buf);
-
- if (!access_ok(VERIFY_WRITE, buf, sizeof(struct irix_statvfs)))
- return -EFAULT;
-
- if (!(file = fget(fd))) {
- error = -EBADF;
- goto out;
- }
- error = vfs_statfs(file->f_path.dentry, &kbuf);
- if (error)
- goto out_f;
-
- error = __put_user(kbuf.f_bsize, &buf->f_bsize);
- error |= __put_user(kbuf.f_frsize, &buf->f_frsize);
- error |= __put_user(kbuf.f_blocks, &buf->f_blocks);
- error |= __put_user(kbuf.f_bfree, &buf->f_bfree);
- error |= __put_user(kbuf.f_bfree, &buf->f_bavail); /* XXX hackety hack... */
- error |= __put_user(kbuf.f_files, &buf->f_files);
- error |= __put_user(kbuf.f_ffree, &buf->f_ffree);
- error |= __put_user(kbuf.f_ffree, &buf->f_favail); /* XXX hackety hack... */
-#ifdef __MIPSEB__
- error |= __put_user(kbuf.f_fsid.val[1], &buf->f_fsid);
-#else
- error |= __put_user(kbuf.f_fsid.val[0], &buf->f_fsid);
-#endif
- for(i = 0; i < 16; i++)
- error |= __put_user(0, &buf->f_basetype[i]);
- error |= __put_user(0, &buf->f_flag);
- error |= __put_user(kbuf.f_namelen, &buf->f_namemax);
- error |= __clear_user(&buf->f_fstr, sizeof(buf->f_fstr)) ? -EFAULT : 0;
-
-out_f:
- fput(file);
-out:
- return error;
-}
-
-asmlinkage int irix_priocntl(struct pt_regs *regs)
-{
- printk("[%s:%d] Wheee.. irix_priocntl()\n",
- current->comm, current->pid);
-
- return -EINVAL;
-}
-
-asmlinkage int irix_sigqueue(int pid, int sig, int code, int val)
-{
- printk("[%s:%d] Wheee.. irix_sigqueue(%d,%d,%d,%d)\n",
- current->comm, current->pid, pid, sig, code, val);
-
- return -EINVAL;
-}
-
-asmlinkage int irix_truncate64(char __user *name, int pad, int size1, int size2)
-{
- int retval;
-
- if (size1) {
- retval = -EINVAL;
- goto out;
- }
- retval = sys_truncate(name, size2);
-
-out:
- return retval;
-}
-
-asmlinkage int irix_ftruncate64(int fd, int pad, int size1, int size2)
-{
- int retval;
-
- if (size1) {
- retval = -EINVAL;
- goto out;
- }
- retval = sys_ftruncate(fd, size2);
-
-out:
- return retval;
-}
-
-asmlinkage int irix_mmap64(struct pt_regs *regs)
-{
- int len, prot, flags, fd, off1, off2, error, base = 0;
- unsigned long addr, pgoff, *sp;
- struct file *file = NULL;
- int err;
-
- if (regs->regs[2] == 1000)
- base = 1;
- sp = (unsigned long *) (regs->regs[29] + 16);
- addr = regs->regs[base + 4];
- len = regs->regs[base + 5];
- prot = regs->regs[base + 6];
- if (!base) {
- flags = regs->regs[base + 7];
- if (!access_ok(VERIFY_READ, sp, (4 * sizeof(unsigned long))))
- return -EFAULT;
- fd = sp[0];
- err = __get_user(off1, &sp[1]);
- err |= __get_user(off2, &sp[2]);
- } else {
- if (!access_ok(VERIFY_READ, sp, (5 * sizeof(unsigned long))))
- return -EFAULT;
- err = __get_user(flags, &sp[0]);
- err |= __get_user(fd, &sp[1]);
- err |= __get_user(off1, &sp[2]);
- err |= __get_user(off2, &sp[3]);
- }
-
- if (err)
- return err;
-
- if (off1 & PAGE_MASK)
- return -EOVERFLOW;
-
- pgoff = (off1 << (32 - PAGE_SHIFT)) | (off2 >> PAGE_SHIFT);
-
- if (!(flags & MAP_ANONYMOUS)) {
- if (!(file = fget(fd)))
- return -EBADF;
-
- /* Ok, bad taste hack follows, try to think in something else
- when reading this */
- if (flags & IRIX_MAP_AUTOGROW) {
- unsigned long old_pos;
- long max_size = off2 + len;
-
- if (max_size > file->f_path.dentry->d_inode->i_size) {
- old_pos = sys_lseek(fd, max_size - 1, 0);
- sys_write(fd, (void __user *) "", 1);
- sys_lseek(fd, old_pos, 0);
- }
- }
- }
-
- flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
-
- down_write(¤t->mm->mmap_sem);
- error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff);
- up_write(¤t->mm->mmap_sem);
-
- if (file)
- fput(file);
-
- return error;
-}
-
-asmlinkage int irix_dmi(struct pt_regs *regs)
-{
- printk("[%s:%d] Wheee.. irix_dmi()\n",
- current->comm, current->pid);
-
- return -EINVAL;
-}
-
-asmlinkage int irix_pread(int fd, char __user *buf, int cnt, int off64,
- int off1, int off2)
-{
- printk("[%s:%d] Wheee.. irix_pread(%d,%p,%d,%d,%d,%d)\n",
- current->comm, current->pid, fd, buf, cnt, off64, off1, off2);
-
- return -EINVAL;
-}
-
-asmlinkage int irix_pwrite(int fd, char __user *buf, int cnt, int off64,
- int off1, int off2)
-{
- printk("[%s:%d] Wheee.. irix_pwrite(%d,%p,%d,%d,%d,%d)\n",
- current->comm, current->pid, fd, buf, cnt, off64, off1, off2);
-
- return -EINVAL;
-}
-
-asmlinkage int irix_sgifastpath(int cmd, unsigned long arg0, unsigned long arg1,
- unsigned long arg2, unsigned long arg3,
- unsigned long arg4, unsigned long arg5)
-{
- printk("[%s:%d] Wheee.. irix_fastpath(%d,%08lx,%08lx,%08lx,%08lx,"
- "%08lx,%08lx)\n",
- current->comm, current->pid, cmd, arg0, arg1, arg2,
- arg3, arg4, arg5);
-
- return -EINVAL;
-}
-
-struct irix_statvfs64 {
- u32 f_bsize; u32 f_frsize;
- u64 f_blocks; u64 f_bfree; u64 f_bavail;
- u64 f_files; u64 f_ffree; u64 f_favail;
- u32 f_fsid;
- char f_basetype[16];
- u32 f_flag; u32 f_namemax;
- char f_fstr[32];
- u32 f_filler[16];
-};
-
-asmlinkage int irix_statvfs64(char __user *fname, struct irix_statvfs64 __user *buf)
-{
- struct nameidata nd;
- struct kstatfs kbuf;
- int error, i;
-
- printk("[%s:%d] Wheee.. irix_statvfs64(%s,%p)\n",
- current->comm, current->pid, fname, buf);
- if (!access_ok(VERIFY_WRITE, buf, sizeof(struct irix_statvfs64))) {
- error = -EFAULT;
- goto out;
- }
-
- error = user_path_walk(fname, &nd);
- if (error)
- goto out;
- error = vfs_statfs(nd.path.dentry, &kbuf);
- if (error)
- goto dput_and_out;
-
- error = __put_user(kbuf.f_bsize, &buf->f_bsize);
- error |= __put_user(kbuf.f_frsize, &buf->f_frsize);
- error |= __put_user(kbuf.f_blocks, &buf->f_blocks);
- error |= __put_user(kbuf.f_bfree, &buf->f_bfree);
- error |= __put_user(kbuf.f_bfree, &buf->f_bavail); /* XXX hackety hack... */
- error |= __put_user(kbuf.f_files, &buf->f_files);
- error |= __put_user(kbuf.f_ffree, &buf->f_ffree);
- error |= __put_user(kbuf.f_ffree, &buf->f_favail); /* XXX hackety hack... */
-#ifdef __MIPSEB__
- error |= __put_user(kbuf.f_fsid.val[1], &buf->f_fsid);
-#else
- error |= __put_user(kbuf.f_fsid.val[0], &buf->f_fsid);
-#endif
- for(i = 0; i < 16; i++)
- error |= __put_user(0, &buf->f_basetype[i]);
- error |= __put_user(0, &buf->f_flag);
- error |= __put_user(kbuf.f_namelen, &buf->f_namemax);
- for(i = 0; i < 32; i++)
- error |= __put_user(0, &buf->f_fstr[i]);
-
-dput_and_out:
- path_put(&nd.path);
-out:
- return error;
-}
-
-asmlinkage int irix_fstatvfs64(int fd, struct irix_statvfs __user *buf)
-{
- struct kstatfs kbuf;
- struct file *file;
- int error, i;
-
- printk("[%s:%d] Wheee.. irix_fstatvfs64(%d,%p)\n",
- current->comm, current->pid, fd, buf);
-
- if (!access_ok(VERIFY_WRITE, buf, sizeof(struct irix_statvfs))) {
- error = -EFAULT;
- goto out;
- }
- if (!(file = fget(fd))) {
- error = -EBADF;
- goto out;
- }
- error = vfs_statfs(file->f_path.dentry, &kbuf);
- if (error)
- goto out_f;
-
- error = __put_user(kbuf.f_bsize, &buf->f_bsize);
- error |= __put_user(kbuf.f_frsize, &buf->f_frsize);
- error |= __put_user(kbuf.f_blocks, &buf->f_blocks);
- error |= __put_user(kbuf.f_bfree, &buf->f_bfree);
- error |= __put_user(kbuf.f_bfree, &buf->f_bavail); /* XXX hackety hack... */
- error |= __put_user(kbuf.f_files, &buf->f_files);
- error |= __put_user(kbuf.f_ffree, &buf->f_ffree);
- error |= __put_user(kbuf.f_ffree, &buf->f_favail); /* XXX hackety hack... */
-#ifdef __MIPSEB__
- error |= __put_user(kbuf.f_fsid.val[1], &buf->f_fsid);
-#else
- error |= __put_user(kbuf.f_fsid.val[0], &buf->f_fsid);
-#endif
- for(i = 0; i < 16; i++)
- error |= __put_user(0, &buf->f_basetype[i]);
- error |= __put_user(0, &buf->f_flag);
- error |= __put_user(kbuf.f_namelen, &buf->f_namemax);
- error |= __clear_user(buf->f_fstr, sizeof(buf->f_fstr[i])) ? -EFAULT : 0;
-
-out_f:
- fput(file);
-out:
- return error;
-}
-
-asmlinkage int irix_getmountid(char __user *fname, unsigned long __user *midbuf)
-{
- int err;
-
- printk("[%s:%d] irix_getmountid(%s, %p)\n",
- current->comm, current->pid, fname, midbuf);
- if (!access_ok(VERIFY_WRITE, midbuf, (sizeof(unsigned long) * 4)))
- return -EFAULT;
-
- /*
- * The idea with this system call is that when trying to determine
- * 'pwd' and it's a toss-up for some reason, userland can use the
- * fsid of the filesystem to try and make the right decision, but
- * we don't have this so for now. XXX
- */
- err = __put_user(0, &midbuf[0]);
- err |= __put_user(0, &midbuf[1]);
- err |= __put_user(0, &midbuf[2]);
- err |= __put_user(0, &midbuf[3]);
-
- return err;
-}
-
-asmlinkage int irix_nsproc(unsigned long entry, unsigned long mask,
- unsigned long arg, unsigned long sp, int slen)
-{
- printk("[%s:%d] Wheee.. irix_nsproc(%08lx,%08lx,%08lx,%08lx,%d)\n",
- current->comm, current->pid, entry, mask, arg, sp, slen);
-
- return -EINVAL;
-}
-
-#undef DEBUG_GETDENTS
-
-struct irix_dirent32 {
- u32 d_ino;
- u32 d_off;
- unsigned short d_reclen;
- char d_name[1];
-};
-
-struct irix_dirent32_callback {
- struct irix_dirent32 __user *current_dir;
- struct irix_dirent32 __user *previous;
- int count;
- int error;
-};
-
-#define NAME_OFFSET32(de) ((int) ((de)->d_name - (char *) (de)))
-#define ROUND_UP32(x) (((x)+sizeof(u32)-1) & ~(sizeof(u32)-1))
-
-static int irix_filldir32(void *__buf, const char *name,
- int namlen, loff_t offset, u64 ino, unsigned int d_type)
-{
- struct irix_dirent32 __user *dirent;
- struct irix_dirent32_callback *buf = __buf;
- unsigned short reclen = ROUND_UP32(NAME_OFFSET32(dirent) + namlen + 1);
- int err = 0;
- u32 d_ino;
-
-#ifdef DEBUG_GETDENTS
- printk("\nirix_filldir32[reclen<%d>namlen<%d>count<%d>]",
- reclen, namlen, buf->count);
-#endif
- buf->error = -EINVAL; /* only used if we fail.. */
- if (reclen > buf->count)
- return -EINVAL;
- d_ino = ino;
- if (sizeof(d_ino) < sizeof(ino) && d_ino != ino)
- return -EOVERFLOW;
- dirent = buf->previous;
- if (dirent)
- err = __put_user(offset, &dirent->d_off);
- dirent = buf->current_dir;
- err |= __put_user(dirent, &buf->previous);
- err |= __put_user(d_ino, &dirent->d_ino);
- err |= __put_user(reclen, &dirent->d_reclen);
- err |= copy_to_user((char __user *)dirent->d_name, name, namlen) ? -EFAULT : 0;
- err |= __put_user(0, &dirent->d_name[namlen]);
- dirent = (struct irix_dirent32 __user *) ((char __user *) dirent + reclen);
-
- buf->current_dir = dirent;
- buf->count -= reclen;
-
- return err;
-}
-
-asmlinkage int irix_ngetdents(unsigned int fd, void __user * dirent,
- unsigned int count, int __user *eob)
-{
- struct file *file;
- struct irix_dirent32 __user *lastdirent;
- struct irix_dirent32_callback buf;
- int error;
-
-#ifdef DEBUG_GETDENTS
- printk("[%s:%d] ngetdents(%d, %p, %d, %p) ", current->comm,
- current->pid, fd, dirent, count, eob);
-#endif
- error = -EBADF;
- file = fget(fd);
- if (!file)
- goto out;
-
- buf.current_dir = (struct irix_dirent32 __user *) dirent;
- buf.previous = NULL;
- buf.count = count;
- buf.error = 0;
-
- error = vfs_readdir(file, irix_filldir32, &buf);
- if (error < 0)
- goto out_putf;
-
- error = buf.error;
- lastdirent = buf.previous;
- if (lastdirent) {
- put_user(file->f_pos, &lastdirent->d_off);
- error = count - buf.count;
- }
-
- if (put_user(0, eob) < 0) {
- error = -EFAULT;
- goto out_putf;
- }
-
-#ifdef DEBUG_GETDENTS
- printk("eob=%d returning %d\n", *eob, count - buf.count);
-#endif
- error = count - buf.count;
-
-out_putf:
- fput(file);
-out:
- return error;
-}
-
-struct irix_dirent64 {
- u64 d_ino;
- u64 d_off;
- unsigned short d_reclen;
- char d_name[1];
-};
-
-struct irix_dirent64_callback {
- struct irix_dirent64 __user *curr;
- struct irix_dirent64 __user *previous;
- int count;
- int error;
-};
-
-#define NAME_OFFSET64(de) ((int) ((de)->d_name - (char *) (de)))
-#define ROUND_UP64(x) (((x)+sizeof(u64)-1) & ~(sizeof(u64)-1))
-
-static int irix_filldir64(void *__buf, const char *name,
- int namlen, loff_t offset, u64 ino, unsigned int d_type)
-{
- struct irix_dirent64 __user *dirent;
- struct irix_dirent64_callback * buf = __buf;
- unsigned short reclen = ROUND_UP64(NAME_OFFSET64(dirent) + namlen + 1);
- int err = 0;
-
- if (!access_ok(VERIFY_WRITE, buf, sizeof(*buf)))
- return -EFAULT;
-
- if (__put_user(-EINVAL, &buf->error)) /* only used if we fail.. */
- return -EFAULT;
- if (reclen > buf->count)
- return -EINVAL;
- dirent = buf->previous;
- if (dirent)
- err = __put_user(offset, &dirent->d_off);
- dirent = buf->curr;
- buf->previous = dirent;
- err |= __put_user(ino, &dirent->d_ino);
- err |= __put_user(reclen, &dirent->d_reclen);
- err |= __copy_to_user((char __user *)dirent->d_name, name, namlen)
- ? -EFAULT : 0;
- err |= __put_user(0, &dirent->d_name[namlen]);
-
- dirent = (struct irix_dirent64 __user *) ((char __user *) dirent + reclen);
-
- buf->curr = dirent;
- buf->count -= reclen;
-
- return err;
-}
-
-asmlinkage int irix_getdents64(int fd, void __user *dirent, int cnt)
-{
- struct file *file;
- struct irix_dirent64 __user *lastdirent;
- struct irix_dirent64_callback buf;
- int error;
-
-#ifdef DEBUG_GETDENTS
- printk("[%s:%d] getdents64(%d, %p, %d) ", current->comm,
- current->pid, fd, dirent, cnt);
-#endif
- error = -EBADF;
- if (!(file = fget(fd)))
- goto out;
-
- error = -EFAULT;
- if (!access_ok(VERIFY_WRITE, dirent, cnt))
- goto out_f;
-
- error = -EINVAL;
- if (cnt < (sizeof(struct irix_dirent64) + 255))
- goto out_f;
-
- buf.curr = (struct irix_dirent64 __user *) dirent;
- buf.previous = NULL;
- buf.count = cnt;
- buf.error = 0;
- error = vfs_readdir(file, irix_filldir64, &buf);
- if (error < 0)
- goto out_f;
- lastdirent = buf.previous;
- if (!lastdirent) {
- error = buf.error;
- goto out_f;
- }
- if (put_user(file->f_pos, &lastdirent->d_off))
- return -EFAULT;
-#ifdef DEBUG_GETDENTS
- printk("returning %d\n", cnt - buf.count);
-#endif
- error = cnt - buf.count;
-
-out_f:
- fput(file);
-out:
- return error;
-}
-
-asmlinkage int irix_ngetdents64(int fd, void __user *dirent, int cnt, int *eob)
-{
- struct file *file;
- struct irix_dirent64 __user *lastdirent;
- struct irix_dirent64_callback buf;
- int error;
-
-#ifdef DEBUG_GETDENTS
- printk("[%s:%d] ngetdents64(%d, %p, %d) ", current->comm,
- current->pid, fd, dirent, cnt);
-#endif
- error = -EBADF;
- if (!(file = fget(fd)))
- goto out;
-
- error = -EFAULT;
- if (!access_ok(VERIFY_WRITE, dirent, cnt) ||
- !access_ok(VERIFY_WRITE, eob, sizeof(*eob)))
- goto out_f;
-
- error = -EINVAL;
- if (cnt < (sizeof(struct irix_dirent64) + 255))
- goto out_f;
-
- *eob = 0;
- buf.curr = (struct irix_dirent64 __user *) dirent;
- buf.previous = NULL;
- buf.count = cnt;
- buf.error = 0;
- error = vfs_readdir(file, irix_filldir64, &buf);
- if (error < 0)
- goto out_f;
- lastdirent = buf.previous;
- if (!lastdirent) {
- error = buf.error;
- goto out_f;
- }
- if (put_user(file->f_pos, &lastdirent->d_off))
- return -EFAULT;
-#ifdef DEBUG_GETDENTS
- printk("eob=%d returning %d\n", *eob, cnt - buf.count);
-#endif
- error = cnt - buf.count;
-
-out_f:
- fput(file);
-out:
- return error;
-}
-
-asmlinkage int irix_uadmin(unsigned long op, unsigned long func, unsigned long arg)
-{
- int retval;
-
- switch (op) {
- case 1:
- /* Reboot */
- printk("[%s:%d] irix_uadmin: Wants to reboot...\n",
- current->comm, current->pid);
- retval = -EINVAL;
- goto out;
-
- case 2:
- /* Shutdown */
- printk("[%s:%d] irix_uadmin: Wants to shutdown...\n",
- current->comm, current->pid);
- retval = -EINVAL;
- goto out;
-
- case 4:
- /* Remount-root */
- printk("[%s:%d] irix_uadmin: Wants to remount root...\n",
- current->comm, current->pid);
- retval = -EINVAL;
- goto out;
-
- case 8:
- /* Kill all tasks. */
- printk("[%s:%d] irix_uadmin: Wants to kill all tasks...\n",
- current->comm, current->pid);
- retval = -EINVAL;
- goto out;
-
- case 256:
- /* Set magic mushrooms... */
- printk("[%s:%d] irix_uadmin: Wants to set magic mushroom[%d]...\n",
- current->comm, current->pid, (int) func);
- retval = -EINVAL;
- goto out;
-
- default:
- printk("[%s:%d] irix_uadmin: Unknown operation [%d]...\n",
- current->comm, current->pid, (int) op);
- retval = -EINVAL;
- goto out;
- };
-
-out:
- return retval;
-}
-
-asmlinkage int irix_utssys(char __user *inbuf, int arg, int type, char __user *outbuf)
-{
- int retval;
-
- switch(type) {
- case 0:
- /* uname() */
- retval = irix_uname((struct iuname __user *)inbuf);
- goto out;
-
- case 2:
- /* ustat() */
- printk("[%s:%d] irix_utssys: Wants to do ustat()\n",
- current->comm, current->pid);
- retval = -EINVAL;
- goto out;
-
- case 3:
- /* fusers() */
- printk("[%s:%d] irix_utssys: Wants to do fusers()\n",
- current->comm, current->pid);
- retval = -EINVAL;
- goto out;
-
- default:
- printk("[%s:%d] irix_utssys: Wants to do unknown type[%d]\n",
- current->comm, current->pid, (int) type);
- retval = -EINVAL;
- goto out;
- }
-
-out:
- return retval;
-}
-
-#undef DEBUG_FCNTL
-
-#define IRIX_F_ALLOCSP 10
-
-asmlinkage int irix_fcntl(int fd, int cmd, int arg)
-{
- int retval;
-
-#ifdef DEBUG_FCNTL
- printk("[%s:%d] irix_fcntl(%d, %d, %d) ", current->comm,
- current->pid, fd, cmd, arg);
-#endif
- if (cmd == IRIX_F_ALLOCSP){
- return 0;
- }
- retval = sys_fcntl(fd, cmd, arg);
-#ifdef DEBUG_FCNTL
- printk("%d\n", retval);
-#endif
- return retval;
-}
-
-asmlinkage int irix_ulimit(int cmd, int arg)
-{
- int retval;
-
- switch(cmd) {
- case 1:
- printk("[%s:%d] irix_ulimit: Wants to get file size limit.\n",
- current->comm, current->pid);
- retval = -EINVAL;
- goto out;
-
- case 2:
- printk("[%s:%d] irix_ulimit: Wants to set file size limit.\n",
- current->comm, current->pid);
- retval = -EINVAL;
- goto out;
-
- case 3:
- printk("[%s:%d] irix_ulimit: Wants to get brk limit.\n",
- current->comm, current->pid);
- retval = -EINVAL;
- goto out;
-
- case 4:
-#if 0
- printk("[%s:%d] irix_ulimit: Wants to get fd limit.\n",
- current->comm, current->pid);
- retval = -EINVAL;
- goto out;
-#endif
- retval = current->signal->rlim[RLIMIT_NOFILE].rlim_cur;
- goto out;
-
- case 5:
- printk("[%s:%d] irix_ulimit: Wants to get txt offset.\n",
- current->comm, current->pid);
- retval = -EINVAL;
- goto out;
-
- default:
- printk("[%s:%d] irix_ulimit: Unknown command [%d].\n",
- current->comm, current->pid, cmd);
- retval = -EINVAL;
- goto out;
- }
-out:
- return retval;
-}
-
-asmlinkage int irix_unimp(struct pt_regs *regs)
-{
- printk("irix_unimp [%s:%d] v0=%d v1=%d a0=%08lx a1=%08lx a2=%08lx "
- "a3=%08lx\n", current->comm, current->pid,
- (int) regs->regs[2], (int) regs->regs[3],
- regs->regs[4], regs->regs[5], regs->regs[6], regs->regs[7]);
-
- return -ENOSYS;
-}
extern int fpu_emulator_cop1Handler(struct pt_regs *xcp,
struct mips_fpu_struct *ctx, int has_fpu);
-void (*board_watchpoint_handler)(struct pt_regs *regs);
void (*board_be_init)(void);
int (*board_be_handler)(struct pt_regs *regs, int is_fixup);
void (*board_nmi_handler_setup)(void);
/*
* Saved cp0 registers
*/
- printk("epc : %0*lx ", field, regs->cp0_epc);
- print_symbol("%s ", regs->cp0_epc);
+ printk("epc : %0*lx %pS\n", field, regs->cp0_epc,
+ (void *) regs->cp0_epc);
printk(" %s\n", print_tainted());
- printk("ra : %0*lx ", field, regs->regs[31]);
- print_symbol("%s\n", regs->regs[31]);
+ printk("ra : %0*lx %pS\n", field, regs->regs[31],
+ (void *) regs->regs[31]);
printk("Status: %08x ", (uint32_t) regs->cp0_status);
asmlinkage void do_watch(struct pt_regs *regs)
{
- if (board_watchpoint_handler) {
- (*board_watchpoint_handler)(regs);
- return;
- }
-
/*
* We use the watch exception where available to detect stack
* overflows.
#include <linux/interrupt.h>
#include <linux/irq.h>
-#include <asm/bootinfo.h>
#include <asm/irq_cpu.h>
+#include <asm/lasat/lasat.h>
#include <asm/lasat/lasatint.h>
#include <irq.h>
{
int i;
- switch (mips_machtype) {
- case MACH_LASAT_100:
- lasat_int_status = (void *)LASAT_INT_STATUS_REG_100;
- lasat_int_mask = (void *)LASAT_INT_MASK_REG_100;
- lasat_int_mask_shift = LASATINT_MASK_SHIFT_100;
- get_int_status = get_int_status_100;
- *lasat_int_mask = 0;
- break;
- case MACH_LASAT_200:
+ if (IS_LASAT_200()) {
lasat_int_status = (void *)LASAT_INT_STATUS_REG_200;
lasat_int_mask = (void *)LASAT_INT_MASK_REG_200;
lasat_int_mask_shift = LASATINT_MASK_SHIFT_200;
get_int_status = get_int_status_200;
*lasat_int_mask &= 0xffff;
- break;
- default:
- panic("arch_init_irq: mips_machtype incorrect");
+ } else {
+ lasat_int_status = (void *)LASAT_INT_STATUS_REG_100;
+ lasat_int_mask = (void *)LASAT_INT_MASK_REG_100;
+ lasat_int_mask_shift = LASATINT_MASK_SHIFT_100;
+ get_int_status = get_int_status_100;
+ *lasat_int_mask = 0;
}
mips_cpu_irq_init();
#include <linux/string.h>
#include <linux/ctype.h>
#include <linux/mutex.h>
-#include <asm/bootinfo.h>
#include <asm/addrspace.h>
#include "at93c.h"
/* New model description table */
ls[LASAT_MTD_SERVICE] = 0xC0000;
ls[LASAT_MTD_NORMAL] = 0x100000;
- if (mips_machtype == MACH_LASAT_100) {
+ if (!IS_LASAT_200()) {
lasat_board_info.li_flash_base = 0x1e000000;
lb[LASAT_MTD_BOOTLOADER] = 0x1e400000;
setup_prom_vectors();
- if (current_cpu_data.cputype == CPU_R5000) {
+ if (IS_LASAT_200()) {
printk(KERN_INFO "LASAT 200 board\n");
- mips_machtype = MACH_LASAT_200;
lasat_ndelay_divider = LASAT_200_DIVIDER;
+ at93c = &at93c_defs[1];
} else {
printk(KERN_INFO "LASAT 100 board\n");
- mips_machtype = MACH_LASAT_100;
lasat_ndelay_divider = LASAT_100_DIVIDER;
+ at93c = &at93c_defs[0];
}
- at93c = &at93c_defs[mips_machtype];
-
lasat_init_board_info(); /* Read info from EEPROM */
/* Get the command line */
#include <linux/platform_device.h>
#include <linux/serial_8250.h>
-#include <asm/bootinfo.h>
#include <asm/lasat/lasat.h>
#include <asm/lasat/serial.h>
if (!pdev)
return -ENOMEM;
- if (mips_machtype == MACH_LASAT_100) {
+ if (!IS_LASAT_200()) {
lasat_serial_res[0].start = KSEG1ADDR(LASAT_UART_REGS_BASE_100);
lasat_serial_res[0].end = lasat_serial_res[0].start + LASAT_UART_REGS_SHIFT_100 * 8 - 1;
lasat_serial_res[0].flags = IORESOURCE_MEM;
void __init plat_mem_setup(void)
{
int i;
- lasat_misc = &lasat_misc_info[mips_machtype];
+ int lasat_type = IS_LASAT_200() ? 1 : 0;
+
+ lasat_misc = &lasat_misc_info[lasat_type];
#ifdef CONFIG_PICVUE
- picvue = &pvc_defs[mips_machtype];
+ picvue = &pvc_defs[lasat_type];
#endif
/* Set up panic notifier */
lasat_reboot_setup();
#ifdef CONFIG_DS1603
- ds1603 = &ds_defs[mips_machtype];
+ ds1603 = &ds_defs[lasat_type];
#endif
#ifdef DYNAMIC_SERIAL_INIT
+++ /dev/null
-#
-# Carsten Langgaard, carstenl@mips.com
-# Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
-#
-# This program is free software; you can distribute it and/or modify it
-# under the terms of the GNU General Public License (Version 2) as
-# published by the Free Software Foundation.
-#
-# This program is distributed in the hope it will be useful, but WITHOUT
-# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-# for more details.
-#
-# You should have received a copy of the GNU General Public License along
-# with this program; if not, write to the Free Software Foundation, Inc.,
-# 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
-#
-
-obj-y := atlas_int.o atlas_setup.o
-obj-$(CONFIG_KGDB) += atlas_gdb.o
-
-EXTRA_CFLAGS += -Werror
+++ /dev/null
-/*
- * Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
- *
- * This program is free software; you can distribute it and/or modify it
- * under the terms of the GNU General Public License (Version 2) as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * This is the interface to the remote debugger stub.
- */
-#include <asm/io.h>
-#include <asm/mips-boards/atlas.h>
-#include <asm/mips-boards/saa9730_uart.h>
-
-#define INB(a) inb((unsigned long)a)
-#define OUTB(x, a) outb(x, (unsigned long)a)
-
-/*
- * This is the interface to the remote debugger stub
- * if the Philips part is used for the debug port,
- * called from the platform setup code.
- */
-void *saa9730_base = (void *)ATLAS_SAA9730_REG;
-
-static int saa9730_kgdb_active = 0;
-
-#define SAA9730_BAUDCLOCK(baud) (((ATLAS_SAA9730_BAUDCLOCK/(baud))/16)-1)
-
-int saa9730_kgdb_hook(int speed)
-{
- int baudclock;
- t_uart_saa9730_regmap *kgdb_uart = (t_uart_saa9730_regmap *)(saa9730_base + SAA9730_UART_REGS_ADDR);
-
- /*
- * Clear all interrupts
- */
- (void) INB(&kgdb_uart->Lsr);
- (void) INB(&kgdb_uart->Msr);
- (void) INB(&kgdb_uart->Thr_Rbr);
- (void) INB(&kgdb_uart->Iir_Fcr);
-
- /*
- * Now, initialize the UART
- */
- /* 8 data bits, one stop bit, no parity */
- OUTB(SAA9730_LCR_DATA8, &kgdb_uart->Lcr);
-
- baudclock = SAA9730_BAUDCLOCK(speed);
-
- OUTB((baudclock >> 16) & 0xff, &kgdb_uart->BaudDivMsb);
- OUTB( baudclock & 0xff, &kgdb_uart->BaudDivLsb);
-
- /* Set RTS/DTR active */
- OUTB(SAA9730_MCR_DTR | SAA9730_MCR_RTS, &kgdb_uart->Mcr);
- saa9730_kgdb_active = 1;
-
- return speed;
-}
-
-int saa9730_putDebugChar(char c)
-{
- t_uart_saa9730_regmap *kgdb_uart = (t_uart_saa9730_regmap *)(saa9730_base + SAA9730_UART_REGS_ADDR);
-
- if (!saa9730_kgdb_active) { /* need to init device first */
- return 0;
- }
-
- while (!(INB(&kgdb_uart->Lsr) & SAA9730_LSR_THRE))
- ;
- OUTB(c, &kgdb_uart->Thr_Rbr);
-
- return 1;
-}
-
-char saa9730_getDebugChar(void)
-{
- t_uart_saa9730_regmap *kgdb_uart = (t_uart_saa9730_regmap *)(saa9730_base + SAA9730_UART_REGS_ADDR);
- char c;
-
- if (!saa9730_kgdb_active) { /* need to init device first */
- return 0;
- }
- while (!(INB(&kgdb_uart->Lsr) & SAA9730_LSR_DR))
- ;
-
- c = INB(&kgdb_uart->Thr_Rbr);
- return(c);
-}
+++ /dev/null
-/*
- * Copyright (C) 1999, 2000, 2006 MIPS Technologies, Inc.
- * All rights reserved.
- * Authors: Carsten Langgaard <carstenl@mips.com>
- * Maciej W. Rozycki <macro@mips.com>
- *
- * ########################################################################
- *
- * This program is free software; you can distribute it and/or modify it
- * under the terms of the GNU General Public License (Version 2) as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * ########################################################################
- *
- * Routines for generic manipulation of the interrupts found on the MIPS
- * Atlas board.
- *
- */
-#include <linux/compiler.h>
-#include <linux/init.h>
-#include <linux/irq.h>
-#include <linux/sched.h>
-#include <linux/slab.h>
-#include <linux/interrupt.h>
-#include <linux/kernel_stat.h>
-#include <linux/kernel.h>
-
-#include <asm/gdb-stub.h>
-#include <asm/io.h>
-#include <asm/irq_cpu.h>
-#include <asm/msc01_ic.h>
-
-#include <asm/mips-boards/atlas.h>
-#include <asm/mips-boards/atlasint.h>
-#include <asm/mips-boards/generic.h>
-
-static struct atlas_ictrl_regs *atlas_hw0_icregs;
-
-#if 0
-#define DEBUG_INT(x...) printk(x)
-#else
-#define DEBUG_INT(x...)
-#endif
-
-void disable_atlas_irq(unsigned int irq_nr)
-{
- atlas_hw0_icregs->intrsten = 1 << (irq_nr - ATLAS_INT_BASE);
- iob();
-}
-
-void enable_atlas_irq(unsigned int irq_nr)
-{
- atlas_hw0_icregs->intseten = 1 << (irq_nr - ATLAS_INT_BASE);
- iob();
-}
-
-static void end_atlas_irq(unsigned int irq)
-{
- if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
- enable_atlas_irq(irq);
-}
-
-static struct irq_chip atlas_irq_type = {
- .name = "Atlas",
- .ack = disable_atlas_irq,
- .mask = disable_atlas_irq,
- .mask_ack = disable_atlas_irq,
- .unmask = enable_atlas_irq,
- .eoi = enable_atlas_irq,
- .end = end_atlas_irq,
-};
-
-static inline int ls1bit32(unsigned int x)
-{
- int b = 31, s;
-
- s = 16; if (x << 16 == 0) s = 0; b -= s; x <<= s;
- s = 8; if (x << 8 == 0) s = 0; b -= s; x <<= s;
- s = 4; if (x << 4 == 0) s = 0; b -= s; x <<= s;
- s = 2; if (x << 2 == 0) s = 0; b -= s; x <<= s;
- s = 1; if (x << 1 == 0) s = 0; b -= s;
-
- return b;
-}
-
-static inline void atlas_hw0_irqdispatch(void)
-{
- unsigned long int_status;
- int irq;
-
- int_status = atlas_hw0_icregs->intstatus;
-
- /* if int_status == 0, then the interrupt has already been cleared */
- if (unlikely(int_status == 0))
- return;
-
- irq = ATLAS_INT_BASE + ls1bit32(int_status);
-
- DEBUG_INT("atlas_hw0_irqdispatch: irq=%d\n", irq);
-
- do_IRQ(irq);
-}
-
-static inline int clz(unsigned long x)
-{
- __asm__(
- " .set push \n"
- " .set mips32 \n"
- " clz %0, %1 \n"
- " .set pop \n"
- : "=r" (x)
- : "r" (x));
-
- return x;
-}
-
-/*
- * Version of ffs that only looks at bits 12..15.
- */
-static inline unsigned int irq_ffs(unsigned int pending)
-{
-#if defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64)
- return -clz(pending) + 31 - CAUSEB_IP;
-#else
- unsigned int a0 = 7;
- unsigned int t0;
-
- t0 = s0 & 0xf000;
- t0 = t0 < 1;
- t0 = t0 << 2;
- a0 = a0 - t0;
- s0 = s0 << t0;
-
- t0 = s0 & 0xc000;
- t0 = t0 < 1;
- t0 = t0 << 1;
- a0 = a0 - t0;
- s0 = s0 << t0;
-
- t0 = s0 & 0x8000;
- t0 = t0 < 1;
- //t0 = t0 << 2;
- a0 = a0 - t0;
- //s0 = s0 << t0;
-
- return a0;
-#endif
-}
-
-/*
- * IRQs on the Atlas board look basically like (all external interrupt
- * sources are combined together on hardware interrupt 0 (MIPS IRQ 2)):
- *
- * MIPS IRQ Source
- * -------- ------
- * 0 Software 0 (reschedule IPI on MT)
- * 1 Software 1 (remote call IPI on MT)
- * 2 Combined Atlas hardware interrupt (hw0)
- * 3 Hardware (ignored)
- * 4 Hardware (ignored)
- * 5 Hardware (ignored)
- * 6 Hardware (ignored)
- * 7 R4k timer (what we use)
- *
- * We handle the IRQ according to _our_ priority which is:
- *
- * Highest ---- R4k Timer
- * Lowest ---- Software 0
- *
- * then we just return, if multiple IRQs are pending then we will just take
- * another exception, big deal.
- */
-asmlinkage void plat_irq_dispatch(void)
-{
- unsigned int pending = read_c0_cause() & read_c0_status() & ST0_IM;
- int irq;
-
- irq = irq_ffs(pending);
-
- if (irq == MIPSCPU_INT_ATLAS)
- atlas_hw0_irqdispatch();
- else if (irq >= 0)
- do_IRQ(MIPS_CPU_IRQ_BASE + irq);
- else
- spurious_interrupt();
-}
-
-static inline void init_atlas_irqs(int base)
-{
- int i;
-
- atlas_hw0_icregs = (struct atlas_ictrl_regs *)
- ioremap(ATLAS_ICTRL_REGS_BASE,
- sizeof(struct atlas_ictrl_regs *));
-
- /*
- * Mask out all interrupt by writing "1" to all bit position in
- * the interrupt reset reg.
- */
- atlas_hw0_icregs->intrsten = 0xffffffff;
-
- for (i = ATLAS_INT_BASE; i <= ATLAS_INT_END; i++)
- set_irq_chip_and_handler(i, &atlas_irq_type, handle_level_irq);
-}
-
-static struct irqaction atlasirq = {
- .handler = no_action,
- .name = "Atlas cascade"
-};
-
-msc_irqmap_t __initdata msc_irqmap[] = {
- {MSC01C_INT_TMR, MSC01_IRQ_EDGE, 0},
- {MSC01C_INT_PCI, MSC01_IRQ_LEVEL, 0},
-};
-int __initdata msc_nr_irqs = ARRAY_SIZE(msc_irqmap);
-
-msc_irqmap_t __initdata msc_eicirqmap[] = {
- {MSC01E_INT_SW0, MSC01_IRQ_LEVEL, 0},
- {MSC01E_INT_SW1, MSC01_IRQ_LEVEL, 0},
- {MSC01E_INT_ATLAS, MSC01_IRQ_LEVEL, 0},
- {MSC01E_INT_TMR, MSC01_IRQ_EDGE, 0},
- {MSC01E_INT_PCI, MSC01_IRQ_LEVEL, 0},
- {MSC01E_INT_PERFCTR, MSC01_IRQ_LEVEL, 0},
- {MSC01E_INT_CPUCTR, MSC01_IRQ_LEVEL, 0}
-};
-int __initdata msc_nr_eicirqs = ARRAY_SIZE(msc_eicirqmap);
-
-void __init arch_init_irq(void)
-{
- init_atlas_irqs(ATLAS_INT_BASE);
-
- if (!cpu_has_veic)
- mips_cpu_irq_init();
-
- switch(mips_revision_corid) {
- case MIPS_REVISION_CORID_CORE_MSC:
- case MIPS_REVISION_CORID_CORE_FPGA2:
- case MIPS_REVISION_CORID_CORE_FPGA3:
- case MIPS_REVISION_CORID_CORE_FPGA4:
- case MIPS_REVISION_CORID_CORE_24K:
- case MIPS_REVISION_CORID_CORE_EMUL_MSC:
- if (cpu_has_veic)
- init_msc_irqs(MSC01E_INT_BASE, MSC01E_INT_BASE,
- msc_eicirqmap, msc_nr_eicirqs);
- else
- init_msc_irqs(MSC01E_INT_BASE, MSC01C_INT_BASE,
- msc_irqmap, msc_nr_irqs);
- }
-
- if (cpu_has_veic) {
- set_vi_handler(MSC01E_INT_ATLAS, atlas_hw0_irqdispatch);
- setup_irq(MSC01E_INT_BASE + MSC01E_INT_ATLAS, &atlasirq);
- } else if (cpu_has_vint) {
- set_vi_handler(MIPSCPU_INT_ATLAS, atlas_hw0_irqdispatch);
-#ifdef CONFIG_MIPS_MT_SMTC
- setup_irq_smtc(MIPS_CPU_IRQ_BASE + MIPSCPU_INT_ATLAS,
- &atlasirq, (0x100 << MIPSCPU_INT_ATLAS));
-#else /* Not SMTC */
- setup_irq(MIPS_CPU_IRQ_BASE + MIPSCPU_INT_ATLAS, &atlasirq);
-#endif /* CONFIG_MIPS_MT_SMTC */
- } else
- setup_irq(MIPS_CPU_IRQ_BASE + MIPSCPU_INT_ATLAS, &atlasirq);
-}
+++ /dev/null
-/*
- * Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
- *
- * This program is free software; you can distribute it and/or modify it
- * under the terms of the GNU General Public License (Version 2) as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- */
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <linux/sched.h>
-#include <linux/ioport.h>
-#include <linux/tty.h>
-#include <linux/serial.h>
-#include <linux/serial_core.h>
-#include <linux/serial_8250.h>
-
-#include <asm/cpu.h>
-#include <asm/bootinfo.h>
-#include <asm/irq.h>
-#include <asm/mips-boards/generic.h>
-#include <asm/mips-boards/prom.h>
-#include <asm/mips-boards/atlas.h>
-#include <asm/mips-boards/atlasint.h>
-#include <asm/time.h>
-#include <asm/traps.h>
-
-static void __init serial_init(void);
-
-const char *get_system_type(void)
-{
- return "MIPS Atlas";
-}
-
-const char display_string[] = " LINUX ON ATLAS ";
-
-void __init plat_mem_setup(void)
-{
- mips_pcibios_init();
-
- ioport_resource.end = 0x7fffffff;
-
- serial_init();
-
-#ifdef CONFIG_KGDB
- kgdb_config();
-#endif
- mips_reboot_setup();
-}
-
-static void __init serial_init(void)
-{
-#ifdef CONFIG_SERIAL_8250
- struct uart_port s;
-
- memset(&s, 0, sizeof(s));
-
-#ifdef CONFIG_CPU_LITTLE_ENDIAN
- s.iobase = ATLAS_UART_REGS_BASE;
-#else
- s.iobase = ATLAS_UART_REGS_BASE+3;
-#endif
- s.irq = ATLAS_INT_UART;
- s.uartclk = ATLAS_BASE_BAUD * 16;
- s.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_AUTO_IRQ;
- s.iotype = UPIO_PORT;
- s.regshift = 3;
-
- if (early_serial_setup(&s) != 0) {
- printk(KERN_ERR "Serial setup failed!\n");
- }
-#endif
-}
+++ /dev/null
-#
-# Carsten Langgaard, carstenl@mips.com
-# Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
-#
-# This program is free software; you can distribute it and/or modify it
-# under the terms of the GNU General Public License (Version 2) as
-# published by the Free Software Foundation.
-#
-# This program is distributed in the hope it will be useful, but WITHOUT
-# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-# for more details.
-#
-# You should have received a copy of the GNU General Public License along
-# with this program; if not, write to the Free Software Foundation, Inc.,
-# 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
-#
-# Makefile for the MIPS boards generic routines under Linux.
-#
-
-obj-y := reset.o display.o init.o memory.o \
- cmdline.o time.o
-obj-y += amon.o
-
-obj-$(CONFIG_EARLY_PRINTK) += console.o
-obj-$(CONFIG_PCI) += pci.o
-obj-$(CONFIG_KGDB) += gdb_hook.o
-
-EXTRA_CFLAGS += -Werror
+++ /dev/null
-#
-# Carsten Langgaard, carstenl@mips.com
-# Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
-#
-# This program is free software; you can distribute it and/or modify it
-# under the terms of the GNU General Public License (Version 2) as
-# published by the Free Software Foundation.
-#
-# This program is distributed in the hope it will be useful, but WITHOUT
-# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-# for more details.
-#
-# You should have received a copy of the GNU General Public License along
-# with this program; if not, write to the Free Software Foundation, Inc.,
-# 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
-#
-# Makefile for the MIPS Malta specific kernel interface routines
-# under Linux.
-#
-
-obj-y := malta_int.o malta_mtd.o malta_platform.o malta_setup.o
-
-# FIXME FIXME FIXME
-obj-$(CONFIG_MIPS_MT_SMTC) += malta_smtc.o
-
-EXTRA_CFLAGS += -Werror
+++ /dev/null
-#
-# Carsten Langgaard, carstenl@mips.com
-# Copyright (C) 2002 MIPS Technologies, Inc. All rights reserved.
-#
-# ########################################################################
-#
-# This program is free software; you can distribute it and/or modify it
-# under the terms of the GNU General Public License (Version 2) as
-# published by the Free Software Foundation.
-#
-# This program is distributed in the hope it will be useful, but WITHOUT
-# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-# for more details.
-#
-# You should have received a copy of the GNU General Public License along
-# with this program; if not, write to the Free Software Foundation, Inc.,
-# 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
-#
-# #######################################################################
-#
-# Makefile for the MIPS SEAD specific kernel interface routines
-# under Linux.
-#
-
-obj-y := sead_int.o sead_setup.o
-
-EXTRA_CFLAGS += -Werror
+++ /dev/null
-/*
- * Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 2002 MIPS Technologies, Inc. All rights reserved.
- * Copyright (C) 2003 Ralf Baechle (ralf@linux-mips.org)
- * Copyright (C) 2004 Maciej W. Rozycki
- *
- * This program is free software; you can distribute it and/or modify it
- * under the terms of the GNU General Public License (Version 2) as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * Routines for generic manipulation of the interrupts found on the MIPS
- * Sead board.
- */
-#include <linux/init.h>
-#include <linux/interrupt.h>
-
-#include <asm/irq_cpu.h>
-#include <asm/mipsregs.h>
-#include <asm/system.h>
-
-#include <asm/mips-boards/seadint.h>
-
-static inline int clz(unsigned long x)
-{
- __asm__(
- " .set push \n"
- " .set mips32 \n"
- " clz %0, %1 \n"
- " .set pop \n"
- : "=r" (x)
- : "r" (x));
-
- return x;
-}
-
-/*
- * Version of ffs that only looks at bits 12..15.
- */
-static inline unsigned int irq_ffs(unsigned int pending)
-{
-#if defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64)
- return -clz(pending) + 31 - CAUSEB_IP;
-#else
- unsigned int a0 = 7;
- unsigned int t0;
-
- t0 = s0 & 0xf000;
- t0 = t0 < 1;
- t0 = t0 << 2;
- a0 = a0 - t0;
- s0 = s0 << t0;
-
- t0 = s0 & 0xc000;
- t0 = t0 < 1;
- t0 = t0 << 1;
- a0 = a0 - t0;
- s0 = s0 << t0;
-
- t0 = s0 & 0x8000;
- t0 = t0 < 1;
- //t0 = t0 << 2;
- a0 = a0 - t0;
- //s0 = s0 << t0;
-
- return a0;
-#endif
-}
-
-/*
- * IRQs on the SEAD board look basically are combined together on hardware
- * interrupt 0 (MIPS IRQ 2)) like:
- *
- * MIPS IRQ Source
- * -------- ------
- * 0 Software (ignored)
- * 1 Software (ignored)
- * 2 UART0 (hw0)
- * 3 UART1 (hw1)
- * 4 Hardware (ignored)
- * 5 Hardware (ignored)
- * 6 Hardware (ignored)
- * 7 R4k timer (what we use)
- *
- * We handle the IRQ according to _our_ priority which is:
- *
- * Highest ---- R4k Timer
- * Lowest ---- Combined hardware interrupt
- *
- * then we just return, if multiple IRQs are pending then we will just take
- * another exception, big deal.
- */
-asmlinkage void plat_irq_dispatch(void)
-{
- unsigned int pending = read_c0_cause() & read_c0_status() & ST0_IM;
- int irq;
-
- irq = irq_ffs(pending);
-
- if (irq >= 0)
- do_IRQ(MIPS_CPU_IRQ_BASE + irq);
- else
- spurious_interrupt();
-}
-
-void __init arch_init_irq(void)
-{
- mips_cpu_irq_init();
-}
+++ /dev/null
-/*
- * Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 2002 MIPS Technologies, Inc. All rights reserved.
- *
- * This program is free software; you can distribute it and/or modify it
- * under the terms of the GNU General Public License (Version 2) as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * SEAD specific setup.
- */
-#include <linux/init.h>
-#include <linux/sched.h>
-#include <linux/ioport.h>
-#include <linux/tty.h>
-#include <linux/serial.h>
-#include <linux/serial_core.h>
-#include <linux/serial_8250.h>
-
-#include <asm/cpu.h>
-#include <asm/bootinfo.h>
-#include <asm/irq.h>
-#include <asm/mips-boards/generic.h>
-#include <asm/mips-boards/prom.h>
-#include <asm/mips-boards/sead.h>
-#include <asm/mips-boards/seadint.h>
-#include <asm/time.h>
-
-static void __init serial_init(void);
-
-const char *get_system_type(void)
-{
- return "MIPS SEAD";
-}
-
-const char display_string[] = " LINUX ON SEAD ";
-
-void __init plat_mem_setup(void)
-{
- ioport_resource.end = 0x7fffffff;
-
- serial_init();
-
- mips_reboot_setup();
-}
-
-static void __init serial_init(void)
-{
-#ifdef CONFIG_SERIAL_8250
- struct uart_port s;
-
- memset(&s, 0, sizeof(s));
-
-#ifdef CONFIG_CPU_LITTLE_ENDIAN
- s.iobase = SEAD_UART0_REGS_BASE;
-#else
- s.iobase = SEAD_UART0_REGS_BASE+3;
-#endif
- s.irq = MIPS_CPU_IRQ_BASE + MIPSCPU_INT_UART0;
- s.uartclk = SEAD_BASE_BAUD * 16;
- s.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_AUTO_IRQ;
- s.iotype = UPIO_PORT;
- s.regshift = 3;
-
- if (early_serial_setup(&s) != 0) {
- printk(KERN_ERR "Serial setup failed!\n");
- }
-#endif
-}
#endif
}
-int __cpuinit uasm_rel_highest(long val)
+static int __cpuinit uasm_rel_highest(long val)
{
#ifdef CONFIG_64BIT
return ((((val + 0x800080008000L) >> 48) & 0xffff) ^ 0x8000) - 0x8000;
#endif
}
-int __cpuinit uasm_rel_higher(long val)
+static int __cpuinit uasm_rel_higher(long val)
{
#ifdef CONFIG_64BIT
return ((((val + 0x80008000L) >> 32) & 0xffff) ^ 0x8000) - 0x8000;
void __cpuinit uasm_build_label(struct uasm_label **lab, u32 *addr, int lid);
#ifdef CONFIG_64BIT
int uasm_in_compat_space_p(long addr);
-int uasm_rel_highest(long val);
-int uasm_rel_higher(long val);
#endif
int uasm_rel_hi(long val);
int uasm_rel_lo(long val);
--- /dev/null
+#
+# Carsten Langgaard, carstenl@mips.com
+# Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
+#
+# Copyright (C) 2008 Wind River Systems, Inc.
+# written by Ralf Baechle <ralf@linux-mips.org>
+#
+obj-y := malta-amon.o malta-cmdline.o \
+ malta-display.o malta-init.o malta-int.o \
+ malta-memory.o malta-mtd.o \
+ malta-platform.o malta-reset.o \
+ malta-setup.o malta-time.o
+
+obj-$(CONFIG_EARLY_PRINTK) += malta-console.o
+obj-$(CONFIG_PCI) += malta-pci.o
+obj-$(CONFIG_KGDB) += malta-kgdb.o
+
+# FIXME FIXME FIXME
+obj-$(CONFIG_MIPS_MT_SMTC) += malta_smtc.o
+
+EXTRA_CFLAGS += -Werror
#include <linux/serial_reg.h>
#include <asm/io.h>
-#ifdef CONFIG_MIPS_ATLAS
-#include <asm/mips-boards/atlas.h>
-
-#ifdef CONFIG_CPU_LITTLE_ENDIAN
-#define PORT(offset) (ATLAS_UART_REGS_BASE + ((offset)<<3))
-#else
-#define PORT(offset) (ATLAS_UART_REGS_BASE + 3 + ((offset)<<3))
-#endif
-
-#elif defined(CONFIG_MIPS_SEAD)
-
-#include <asm/mips-boards/sead.h>
-
-#ifdef CONFIG_CPU_LITTLE_ENDIAN
-#define PORT(offset) (SEAD_UART0_REGS_BASE + ((offset)<<3))
-#else
-#define PORT(offset) (SEAD_UART0_REGS_BASE + 3 + ((offset)<<3))
-#endif
-
-#else
#define PORT(offset) (0x3f8 + (offset))
-#endif
static inline unsigned int serial_in(int offset)
{
#include <linux/timer.h>
#include <asm/io.h>
#include <asm/mips-boards/generic.h>
+#include <asm/mips-boards/prom.h>
extern const char display_string[];
static unsigned int display_count;
while ((c = *++argptr) && ('0' <= c && c <= '9'))
speed = speed * 10 + c - '0';
}
-#ifdef CONFIG_MIPS_ATLAS
- if (line == 1) {
- speed = saa9730_kgdb_hook(speed);
- generic_putDebugChar = saa9730_putDebugChar;
- generic_getDebugChar = saa9730_getDebugChar;
- }
- else
-#endif
{
speed = rs_kgdb_hook(line, speed);
generic_putDebugChar = rs_putDebugChar;
mips_display_message("LINUX");
-#ifdef CONFIG_MIPS_SEAD
- set_io_port_base(KSEG1);
-#else
/*
* early setup of _pcictrl_bonito so that we can determine
* the system controller on a CORE_EMUL board
mips_display_message("SC Error");
while (1); /* We die here... */
}
-#endif
board_nmi_handler_setup = mips_nmi_setup;
board_ejtag_handler_setup = mips_ejtag_setup;
static int __initdata msc_nr_eicirqs = ARRAY_SIZE(msc_eicirqmap);
+#if defined(CONFIG_MIPS_MT_SMP)
/*
* This GIC specific tabular array defines the association between External
* Interrupts and CPUs/Core Interrupts. The nature of the External
{ GIC_EXT_INTR(22), 3, GIC_CPU_INT1, GIC_POL_POS, GIC_TRIG_EDGE, 1 },
{ GIC_EXT_INTR(23), 3, GIC_CPU_INT2, GIC_POL_POS, GIC_TRIG_EDGE, 1 },
};
+#endif
/*
* GCMP needs to be detected before any SMP initialisation
*/
-int __init gcmp_probe(unsigned long addr, unsigned long size)
+static int __init gcmp_probe(unsigned long addr, unsigned long size)
{
if (gcmp_present >= 0)
return gcmp_present;
return gcmp_present;
}
-void __init fill_ipi_map(void)
+#if defined(CONFIG_MIPS_MT_SMP)
+static void __init fill_ipi_map(void)
{
int i;
(1 << (gic_intr_map[i].pin + 2));
}
}
+#endif
void __init arch_init_irq(void)
{
.call = GIC_IPI_EXT_INTR_CALLFNC_VPE3
}
};
-#define NIPI (sizeof(ipiirq)/sizeof(ipiirq[0]))
fill_ipi_map();
gic_init(GIC_BASE_ADDR, GIC_ADDRSPACE_SZ, gic_intr_map, ARRAY_SIZE(gic_intr_map), MIPS_GIC_IRQ_BASE);
if (!gcmp_present) {
printk("CPU%d: status register now %08x\n", smp_processor_id(), read_c0_status());
write_c0_status(0x1100dc00);
printk("CPU%d: status register frc %08x\n", smp_processor_id(), read_c0_status());
- for (i = 0; i < NIPI; i++) {
+ for (i = 0; i < ARRAY_SIZE(ipiirq); i++) {
setup_irq(MIPS_GIC_IRQ_BASE + ipiirq[i].resched, &irq_resched);
setup_irq(MIPS_GIC_IRQ_BASE + ipiirq[i].call, &irq_call);
mdesc[1].base = 0x00001000;
mdesc[1].size = 0x000ef000;
-#ifdef CONFIG_MIPS_MALTA
/*
* The area 0x000f0000-0x000fffff is allocated for BIOS memory by the
* south bridge and PCI access always forwarded to the ISA Bus and
mdesc[2].type = yamon_dontuse;
mdesc[2].base = 0x000f0000;
mdesc[2].size = 0x00010000;
-#else
- mdesc[2].type = yamon_prom;
- mdesc[2].base = 0x000f0000;
- mdesc[2].size = 0x00010000;
-#endif
mdesc[3].type = yamon_dontuse;
mdesc[3].base = 0x00100000;
#include <asm/io.h>
#include <asm/reboot.h>
#include <asm/mips-boards/generic.h>
-#if defined(CONFIG_MIPS_ATLAS)
-#include <asm/mips-boards/atlas.h>
-#endif
static void mips_machine_restart(char *command);
static void mips_machine_halt(void);
-#if defined(CONFIG_MIPS_ATLAS)
-static void atlas_machine_power_off(void);
-#endif
static void mips_machine_restart(char *command)
{
__raw_writel(GORESET, softres_reg);
}
-#if defined(CONFIG_MIPS_ATLAS)
-static void atlas_machine_power_off(void)
-{
- unsigned int __iomem *psustby_reg = ioremap(ATLAS_PSUSTBY_REG, sizeof(unsigned int));
-
- writew(ATLAS_GOSTBY, psustby_reg);
-}
-#endif
void mips_reboot_setup(void)
{
_machine_restart = mips_machine_restart;
_machine_halt = mips_machine_halt;
-#if defined(CONFIG_MIPS_ATLAS)
- pm_power_off = atlas_machine_power_off;
-#endif
-#if defined(CONFIG_MIPS_MALTA) || defined(CONFIG_MIPS_SEAD)
pm_power_off = mips_machine_halt;
-#endif
}
#include <asm/mips-boards/generic.h>
#include <asm/mips-boards/prom.h>
-#ifdef CONFIG_MIPS_ATLAS
-#include <asm/mips-boards/atlasint.h>
-#endif
-#ifdef CONFIG_MIPS_MALTA
#include <asm/mips-boards/maltaint.h>
-#endif
-#ifdef CONFIG_MIPS_SEAD
-#include <asm/mips-boards/seadint.h>
-#endif
unsigned long cpu_khz;
unsigned int prid = read_c0_prid() & 0xffff00;
unsigned int count;
-#if defined(CONFIG_MIPS_SEAD) || defined(CONFIG_MIPS_SIM)
- /*
- * The SEAD board doesn't have a real time clock, so we can't
- * really calculate the timer frequency
- * For now we hardwire the SEAD board frequency to 12MHz.
- */
-
- if ((prid == (PRID_COMP_MIPS | PRID_IMP_20KC)) ||
- (prid == (PRID_COMP_MIPS | PRID_IMP_25KF)))
- count = 12000000;
- else
- count = 6000000;
-#endif
-#if defined(CONFIG_MIPS_ATLAS) || defined(CONFIG_MIPS_MALTA)
unsigned long flags;
unsigned int start;
/* restore interrupts */
local_irq_restore(flags);
-#endif
mips_hpt_frequency = count;
if ((prid != (PRID_COMP_MIPS | PRID_IMP_20KC)) &&
* warranty of any kind, whether express or implied.
*/
#include <linux/device.h>
+#include <linux/dma-mapping.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/resource.h>
};
/* The dmamask must be set for OHCI to work */
-static u64 ohci_dmamask = ~(u32)0;
+static u64 ohci_dmamask = DMA_32BIT_MASK;
-static u64 uart_dmamask = ~(u32)0;
+static u64 uart_dmamask = DMA_32BIT_MASK;
static struct platform_device pnx8550_usb_ohci_device = {
.name = "pnx8550-ohci",
.id = -1,
.dev = {
.dma_mask = &ohci_dmamask,
- .coherent_dma_mask = 0xffffffff,
+ .coherent_dma_mask = DMA_32BIT_MASK,
},
.num_resources = ARRAY_SIZE(pnx8550_usb_ohci_resources),
.resource = pnx8550_usb_ohci_resources,
.id = -1,
.dev = {
.dma_mask = &uart_dmamask,
- .coherent_dma_mask = 0xffffffff,
+ .coherent_dma_mask = DMA_32BIT_MASK,
.platform_data = pnx8xxx_ports,
},
.num_resources = ARRAY_SIZE(pnx8550_uart_resources),
obj-$(CONFIG_PCI_GT64XXX_PCI0) += ops-gt64xxx_pci0.o
obj-$(CONFIG_MIPS_MSC) += ops-msc.o
obj-$(CONFIG_MIPS_NILE4) += ops-nile4.o
-obj-$(CONFIG_MIPS_TX3927) += ops-tx3927.o
+obj-$(CONFIG_SOC_TX3927) += ops-tx3927.o
obj-$(CONFIG_PCI_VR41XX) += ops-vr41xx.o pci-vr41xx.o
-obj-$(CONFIG_NEC_CMBVR4133) += fixup-vr4133.o
obj-$(CONFIG_MARKEINS) += ops-emma2rh.o pci-emma2rh.o fixup-emma2rh.o
+obj-$(CONFIG_PCI_TX4927) += ops-tx4927.o
#
# These are still pretty much in the old state, watch, go blind.
#
obj-$(CONFIG_BASLER_EXCITE) += ops-titan.o pci-excite.o fixup-excite.o
obj-$(CONFIG_LASAT) += pci-lasat.o
-obj-$(CONFIG_MIPS_ATLAS) += fixup-atlas.o
obj-$(CONFIG_MIPS_COBALT) += fixup-cobalt.o
obj-$(CONFIG_SOC_AU1500) += fixup-au1000.o ops-au1000.o
obj-$(CONFIG_SOC_AU1550) += fixup-au1000.o ops-au1000.o
obj-$(CONFIG_TANBAC_TB0219) += fixup-tb0219.o
obj-$(CONFIG_TANBAC_TB0226) += fixup-tb0226.o
obj-$(CONFIG_TANBAC_TB0287) += fixup-tb0287.o
-obj-$(CONFIG_TOSHIBA_JMR3927) += fixup-jmr3927.o pci-jmr3927.o
-obj-$(CONFIG_TOSHIBA_RBTX4927) += fixup-rbtx4927.o ops-tx4927.o
-obj-$(CONFIG_TOSHIBA_RBTX4938) += fixup-tx4938.o ops-tx4938.o
+obj-$(CONFIG_TOSHIBA_JMR3927) += fixup-jmr3927.o
+obj-$(CONFIG_SOC_TX4927) += pci-tx4927.o
+obj-$(CONFIG_SOC_TX4938) += pci-tx4938.o
+obj-$(CONFIG_TOSHIBA_RBTX4927) += fixup-rbtx4927.o
+obj-$(CONFIG_TOSHIBA_RBTX4938) += fixup-rbtx4938.o
obj-$(CONFIG_VICTOR_MPC30X) += fixup-mpc30x.o
obj-$(CONFIG_ZAO_CAPCELLA) += fixup-capcella.o
obj-$(CONFIG_WR_PPMC) += fixup-wrppmc.o
+++ /dev/null
-/*
- * Copyright (C) 2003, 2004 Ralf Baechle (ralf@linux-mips.org)
- * Copyright (C) 2005 MIPS Technologies, Inc. All rights reserved.
- * Author: Maciej W. Rozycki <macro@mips.com>
- *
- * This program is free software; you can distribute it and/or modify it
- * under the terms of the GNU General Public License (Version 2) as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- */
-#include <linux/init.h>
-#include <linux/pci.h>
-
-#include <asm/mips-boards/atlasint.h>
-
-#define PCIA ATLAS_INT_PCIA
-#define PCIB ATLAS_INT_PCIB
-#define PCIC ATLAS_INT_PCIC
-#define PCID ATLAS_INT_PCID
-#define INTA ATLAS_INT_INTA
-#define INTB ATLAS_INT_INTB
-#define ETH ATLAS_INT_ETH
-#define INTC ATLAS_INT_INTC
-#define SCSI ATLAS_INT_SCSI
-#define INTD ATLAS_INT_INTD
-
-static char irq_tab[][5] __initdata = {
- /* INTA INTB INTC INTD */
- {0, 0, 0, 0, 0 }, /* 0: Unused */
- {0, 0, 0, 0, 0 }, /* 1: Unused */
- {0, 0, 0, 0, 0 }, /* 2: Unused */
- {0, 0, 0, 0, 0 }, /* 3: Unused */
- {0, 0, 0, 0, 0 }, /* 4: Unused */
- {0, 0, 0, 0, 0 }, /* 5: Unused */
- {0, 0, 0, 0, 0 }, /* 6: Unused */
- {0, 0, 0, 0, 0 }, /* 7: Unused */
- {0, 0, 0, 0, 0 }, /* 8: Unused */
- {0, 0, 0, 0, 0 }, /* 9: Unused */
- {0, 0, 0, 0, 0 }, /* 10: Unused */
- {0, 0, 0, 0, 0 }, /* 11: Unused */
- {0, 0, 0, 0, 0 }, /* 12: Unused */
- {0, 0, 0, 0, 0 }, /* 13: Unused */
- {0, 0, 0, 0, 0 }, /* 14: Unused */
- {0, PCIA, PCIB, PCIC, PCID }, /* 15: cPCI (behind 21150) */
- {0, SCSI, 0, 0, 0 }, /* 16: SYM53C810A SCSI */
- {0, 0, 0, 0, 0 }, /* 17: Core */
- {0, INTA, INTB, INTC, INTD }, /* 18: PCI Slot */
- {0, ETH, 0, 0, 0 }, /* 19: SAA9730 Eth. et al. */
- {0, 0, 0, 0, 0 }, /* 20: Unused */
- {0, 0, 0, 0, 0 } /* 21: Unused */
-};
-
-int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
-{
- return irq_tab[slot][pin];
-}
-
-/* Do platform specific device initialization at pci_enable_device() time */
-int pcibios_plat_dev_init(struct pci_dev *dev)
-{
- return 0;
-}
-
-#ifdef CONFIG_KGDB
-/*
- * The PCI scan may have moved the saa9730 I/O address, so reread
- * the address here.
- * This does mean that it's not possible to debug the PCI bus configuration
- * code, but it is better than nothing...
- */
-
-static void atlas_saa9730_base_fixup(struct pci_dev *pdev)
-{
- extern void *saa9730_base;
- if (pdev->bus == 0 && PCI_SLOT(pdev->devfn) == 19)
- (void) pci_read_config_dword(pdev, 0x14, (u32 *)&saa9730_base);
- printk("saa9730_base = %x\n", saa9730_base);
-}
-
-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_PHILIPS, PCI_DEVICE_ID_PHILIPS_SAA9730,
- atlas_saa9730_base_fixup);
-
-#endif
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include <linux/types.h>
-#include <linux/pci.h>
-#include <linux/init.h>
+#include <asm/txx9/pci.h>
+#include <asm/txx9/jmr3927.h>
-#include <asm/jmr3927/jmr3927.h>
-
-int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
+int __init jmr3927_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
{
unsigned char irq = pin;
- /* SMSC SLC90E66 IDE uses irq 14, 15 (default) */
- if (dev->vendor == PCI_VENDOR_ID_EFAR &&
- dev->device == PCI_DEVICE_ID_EFAR_SLC90E66_1)
- return irq;
/* IRQ rotation (PICMG) */
irq--; /* 0-3 */
- if (dev->bus->parent == NULL &&
- slot == TX3927_PCIC_IDSEL_AD_TO_SLOT(23)) {
+ if (slot == TX3927_PCIC_IDSEL_AD_TO_SLOT(23)) {
/* PCI CardSlot (IDSEL=A23, DevNu=12) */
/* PCIA => PCIC (IDSEL=A23) */
/* NOTE: JMR3927 JP1 must be set to OPEN */
irq = (irq + 2) % 4;
- } else if (dev->bus->parent == NULL &&
- slot == TX3927_PCIC_IDSEL_AD_TO_SLOT(22)) {
+ } else if (slot == TX3927_PCIC_IDSEL_AD_TO_SLOT(22)) {
/* PCI CardSlot (IDSEL=A22, DevNu=11) */
/* PCIA => PCIA (IDSEL=A22) */
/* NOTE: JMR3927 JP1 must be set to OPEN */
irq = (irq + 0) % 4;
} else {
/* PCI Backplane */
- irq = (irq + 3 + slot) % 4;
+ if (txx9_pci_option & TXX9_PCI_OPT_PICMG)
+ irq = (irq + 33 - slot) % 4;
+ else
+ irq = (irq + 3 + slot) % 4;
}
irq++; /* 1-4 */
irq = JMR3927_IRQ_IOC_PCIA;
break;
case 2:
- // wrong for backplane irq = JMR3927_IRQ_IOC_PCIB;
- irq = JMR3927_IRQ_IOC_PCID;
+ irq = JMR3927_IRQ_IOC_PCIB;
break;
case 3:
irq = JMR3927_IRQ_IOC_PCIC;
break;
case 4:
- // wrong for backplane irq = JMR3927_IRQ_IOC_PCID;
- irq = JMR3927_IRQ_IOC_PCIB;
+ irq = JMR3927_IRQ_IOC_PCID;
break;
}
irq = JMR3927_IRQ_ETHER0;
return irq;
}
-
-/* Do platform specific device initialization at pci_enable_device() time */
-int pcibios_plat_dev_init(struct pci_dev *dev)
-{
- return 0;
-}
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include <linux/types.h>
-#include <linux/pci.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
+#include <asm/txx9/pci.h>
+#include <asm/txx9/rbtx4927.h>
-#include <asm/tx4927/tx4927.h>
-#include <asm/tx4927/tx4927_pci.h>
-
-#undef DEBUG
-#ifdef DEBUG
-#define DBG(x...) printk(x)
-#else
-#define DBG(x...)
-#endif
-
-/* look up table for backplane pci irq for slots 17-20 by pin # */
-static unsigned char backplane_pci_irq[4][4] = {
- /* PJ6 SLOT: 17, PIN: 1 */ {TX4927_IRQ_IOC_PCIA,
- /* PJ6 SLOT: 17, PIN: 2 */
- TX4927_IRQ_IOC_PCIB,
- /* PJ6 SLOT: 17, PIN: 3 */
- TX4927_IRQ_IOC_PCIC,
- /* PJ6 SLOT: 17, PIN: 4 */
- TX4927_IRQ_IOC_PCID},
- /* SB SLOT: 18, PIN: 1 */ {TX4927_IRQ_IOC_PCIB,
- /* SB SLOT: 18, PIN: 2 */
- TX4927_IRQ_IOC_PCIC,
- /* SB SLOT: 18, PIN: 3 */
- TX4927_IRQ_IOC_PCID,
- /* SB SLOT: 18, PIN: 4 */
- TX4927_IRQ_IOC_PCIA},
- /* PJ5 SLOT: 19, PIN: 1 */ {TX4927_IRQ_IOC_PCIC,
- /* PJ5 SLOT: 19, PIN: 2 */
- TX4927_IRQ_IOC_PCID,
- /* PJ5 SLOT: 19, PIN: 3 */
- TX4927_IRQ_IOC_PCIA,
- /* PJ5 SLOT: 19, PIN: 4 */
- TX4927_IRQ_IOC_PCIB},
- /* PJ4 SLOT: 20, PIN: 1 */ {TX4927_IRQ_IOC_PCID,
- /* PJ4 SLOT: 20, PIN: 2 */
- TX4927_IRQ_IOC_PCIA,
- /* PJ4 SLOT: 20, PIN: 3 */
- TX4927_IRQ_IOC_PCIB,
- /* PJ4 SLOT: 20, PIN: 4 */
- TX4927_IRQ_IOC_PCIC}
-};
-
-static int pci_get_irq(const struct pci_dev *dev, int pin)
+int __init rbtx4927_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
{
unsigned char irq = pin;
- DBG("pci_get_irq: pin is %d\n", pin);
/* IRQ rotation */
irq--; /* 0-3 */
- if (dev->bus->parent == NULL &&
- PCI_SLOT(dev->devfn) == TX4927_PCIC_IDSEL_AD_TO_SLOT(23)) {
- printk("Onboard PCI_SLOT(dev->devfn) is %d\n",
- PCI_SLOT(dev->devfn));
- /* IDSEL=A23 is tx4927 onboard pci slot */
- irq = (irq + PCI_SLOT(dev->devfn)) % 4;
- irq++; /* 1-4 */
- DBG("irq is now %d\n", irq);
-
- switch (irq) {
- case 1:
- irq = TX4927_IRQ_IOC_PCIA;
- break;
- case 2:
- irq = TX4927_IRQ_IOC_PCIB;
- break;
- case 3:
- irq = TX4927_IRQ_IOC_PCIC;
- break;
- case 4:
- irq = TX4927_IRQ_IOC_PCID;
- break;
- }
+ if (slot == TX4927_PCIC_IDSEL_AD_TO_SLOT(23)) {
+ /* PCI CardSlot (IDSEL=A23) */
+ /* PCIA => PCIA */
+ irq = (irq + 0 + slot) % 4;
} else {
/* PCI Backplane */
- DBG("PCI Backplane PCI_SLOT(dev->devfn) is %d\n",
- PCI_SLOT(dev->devfn));
- irq = backplane_pci_irq[PCI_SLOT(dev->devfn) - 17][irq];
+ if (txx9_pci_option & TXX9_PCI_OPT_PICMG)
+ irq = (irq + 33 - slot) % 4;
+ else
+ irq = (irq + 3 + slot) % 4;
}
- DBG("assigned irq %d\n", irq);
- return irq;
-}
-
-int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
-{
- unsigned char irq;
-
- printk("PCI Setup for pin %d \n", pin);
-
- if (dev->device == 0x9130) /* IDE */
- irq = 14;
- else
- irq = pci_get_irq(dev, pin);
+ irq++; /* 1-4 */
+ switch (irq) {
+ case 1:
+ irq = RBTX4927_IRQ_IOC_PCIA;
+ break;
+ case 2:
+ irq = RBTX4927_IRQ_IOC_PCIB;
+ break;
+ case 3:
+ irq = RBTX4927_IRQ_IOC_PCIC;
+ break;
+ case 4:
+ irq = RBTX4927_IRQ_IOC_PCID;
+ break;
+ }
return irq;
}
-
-/* Do platform specific device initialization at pci_enable_device() time */
-int pcibios_plat_dev_init(struct pci_dev *dev)
-{
- return 0;
-}
--- /dev/null
+/*
+ * Toshiba rbtx4938 pci routines
+ * Copyright (C) 2000-2001 Toshiba Corporation
+ *
+ * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
+ * terms of the GNU General Public License version 2. This program is
+ * licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ *
+ * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
+ */
+#include <linux/types.h>
+#include <asm/txx9/pci.h>
+#include <asm/txx9/rbtx4938.h>
+
+int __init rbtx4938_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
+{
+ int irq = tx4938_pcic1_map_irq(dev, slot);
+
+ if (irq >= 0)
+ return irq;
+ irq = pin;
+ /* IRQ rotation */
+ irq--; /* 0-3 */
+ if (slot == TX4927_PCIC_IDSEL_AD_TO_SLOT(23)) {
+ /* PCI CardSlot (IDSEL=A23) */
+ /* PCIA => PCIA (IDSEL=A23) */
+ irq = (irq + 0 + slot) % 4;
+ } else {
+ /* PCI Backplane */
+ if (txx9_pci_option & TXX9_PCI_OPT_PICMG)
+ irq = (irq + 33 - slot) % 4;
+ else
+ irq = (irq + 3 + slot) % 4;
+ }
+ irq++; /* 1-4 */
+
+ switch (irq) {
+ case 1:
+ irq = RBTX4938_IRQ_IOC_PCIA;
+ break;
+ case 2:
+ irq = RBTX4938_IRQ_IOC_PCIB;
+ break;
+ case 3:
+ irq = RBTX4938_IRQ_IOC_PCIC;
+ break;
+ case 4:
+ irq = RBTX4938_IRQ_IOC_PCID;
+ break;
+ }
+ return irq;
+}
+++ /dev/null
-/*
- * Toshiba rbtx4938 pci routines
- * Copyright (C) 2000-2001 Toshiba Corporation
- *
- * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
- * terms of the GNU General Public License version 2. This program is
- * licensed "as is" without any warranty of any kind, whether express
- * or implied.
- *
- * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
- */
-#include <linux/types.h>
-#include <linux/pci.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-
-#include <asm/tx4938/rbtx4938.h>
-
-extern struct pci_controller tx4938_pci_controller[];
-
-static int pci_get_irq(const struct pci_dev *dev, int pin)
-{
- int irq = pin;
- u8 slot = PCI_SLOT(dev->devfn);
- struct pci_controller *controller = (struct pci_controller *)dev->sysdata;
-
- if (controller == &tx4938_pci_controller[1]) {
- /* TX4938 PCIC1 */
- switch (slot) {
- case TX4938_PCIC_IDSEL_AD_TO_SLOT(31):
- if (tx4938_ccfgptr->pcfg & TX4938_PCFG_ETH0_SEL)
- return RBTX4938_IRQ_IRC + TX4938_IR_ETH0;
- break;
- case TX4938_PCIC_IDSEL_AD_TO_SLOT(30):
- if (tx4938_ccfgptr->pcfg & TX4938_PCFG_ETH1_SEL)
- return RBTX4938_IRQ_IRC + TX4938_IR_ETH1;
- break;
- }
- return 0;
- }
-
- /* IRQ rotation */
- irq--; /* 0-3 */
- if (dev->bus->parent == NULL &&
- (slot == TX4938_PCIC_IDSEL_AD_TO_SLOT(23))) {
- /* PCI CardSlot (IDSEL=A23) */
- /* PCIA => PCIA (IDSEL=A23) */
- irq = (irq + 0 + slot) % 4;
- } else {
- /* PCI Backplane */
- irq = (irq + 33 - slot) % 4;
- }
- irq++; /* 1-4 */
-
- switch (irq) {
- case 1:
- irq = RBTX4938_IRQ_IOC_PCIA;
- break;
- case 2:
- irq = RBTX4938_IRQ_IOC_PCIB;
- break;
- case 3:
- irq = RBTX4938_IRQ_IOC_PCIC;
- break;
- case 4:
- irq = RBTX4938_IRQ_IOC_PCID;
- break;
- }
- return irq;
-}
-
-int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
-{
- unsigned char irq = 0;
-
- irq = pci_get_irq(dev, pin);
-
- printk(KERN_INFO "PCI: 0x%02x:0x%02x(0x%02x,0x%02x) IRQ=%d\n",
- dev->bus->number, dev->devfn, PCI_SLOT(dev->devfn),
- PCI_FUNC(dev->devfn), irq);
-
- return irq;
-}
-
-/*
- * Do platform specific device initialization at pci_enable_device() time
- */
-int pcibios_plat_dev_init(struct pci_dev *dev)
-{
- return 0;
-}
-
+++ /dev/null
-/*
- * arch/mips/pci/fixup-vr4133.c
- *
- * The NEC CMB-VR4133 Board specific PCI fixups.
- *
- * Author: Yoichi Yuasa <yyuasa@mvista.com, or source@mvista.com> and
- * Alex Sapkov <asapkov@ru.mvista.com>
- *
- * 2003-2004 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- *
- * Modified for support in 2.6
- * Author: Manish Lachwani (mlachwani@mvista.com)
- *
- */
-#include <linux/init.h>
-#include <linux/pci.h>
-#include <linux/kernel.h>
-
-#include <asm/io.h>
-#include <asm/i8259.h>
-#include <asm/vr41xx/cmbvr4133.h>
-
-extern int vr4133_rockhopper;
-extern void ali_m1535plus_init(struct pci_dev *dev);
-extern void ali_m5229_init(struct pci_dev *dev);
-
-/* Do platform specific device initialization at pci_enable_device() time */
-int pcibios_plat_dev_init(struct pci_dev *dev)
-{
- /*
- * We have to reset AMD PCnet adapter on Rockhopper since
- * PMON leaves it enabled and generating interrupts. This leads
- * to a lock if some PCI device driver later enables the IRQ line
- * shared with PCnet and there is no AMD PCnet driver to catch its
- * interrupts.
- */
-#ifdef CONFIG_ROCKHOPPER
- if (dev->vendor == PCI_VENDOR_ID_AMD &&
- dev->device == PCI_DEVICE_ID_AMD_LANCE) {
- inl(pci_resource_start(dev, 0) + 0x18);
- }
-#endif
-
- /*
- * we have to open the bridges' windows down to 0 because otherwise
- * we cannot access ISA south bridge I/O registers that get mapped from
- * 0. for example, 8259 PIC would be unaccessible without that
- */
- if(dev->vendor == PCI_VENDOR_ID_INTEL && dev->device == PCI_DEVICE_ID_INTEL_S21152BB) {
- pci_write_config_byte(dev, PCI_IO_BASE, 0);
- if(dev->bus->number == 0) {
- pci_write_config_word(dev, PCI_IO_BASE_UPPER16, 0);
- } else {
- pci_write_config_word(dev, PCI_IO_BASE_UPPER16, 1);
- }
- }
-
- return 0;
-}
-
-/*
- * M1535 IRQ mapping
- * Feel free to change this, although it shouldn't be needed
- */
-#define M1535_IRQ_INTA 7
-#define M1535_IRQ_INTB 9
-#define M1535_IRQ_INTC 10
-#define M1535_IRQ_INTD 11
-
-#define M1535_IRQ_USB 9
-#define M1535_IRQ_IDE 14
-#define M1535_IRQ_IDE2 15
-#define M1535_IRQ_PS2 12
-#define M1535_IRQ_RTC 8
-#define M1535_IRQ_FDC 6
-#define M1535_IRQ_AUDIO 5
-#define M1535_IRQ_COM1 4
-#define M1535_IRQ_COM2 4
-#define M1535_IRQ_IRDA 3
-#define M1535_IRQ_KBD 1
-#define M1535_IRQ_TMR 0
-
-/* Rockhopper "slots" assignment; this is hard-coded ... */
-#define ROCKHOPPER_M5451_SLOT 1
-#define ROCKHOPPER_M1535_SLOT 2
-#define ROCKHOPPER_M5229_SLOT 11
-#define ROCKHOPPER_M5237_SLOT 15
-#define ROCKHOPPER_PMU_SLOT 12
-/* ... and hard-wired. */
-#define ROCKHOPPER_PCI1_SLOT 3
-#define ROCKHOPPER_PCI2_SLOT 4
-#define ROCKHOPPER_PCI3_SLOT 5
-#define ROCKHOPPER_PCI4_SLOT 6
-#define ROCKHOPPER_PCNET_SLOT 1
-
-#define M1535_IRQ_MASK(n) (1 << (n))
-
-#define M1535_IRQ_EDGE (M1535_IRQ_MASK(M1535_IRQ_TMR) | \
- M1535_IRQ_MASK(M1535_IRQ_KBD) | \
- M1535_IRQ_MASK(M1535_IRQ_COM1) | \
- M1535_IRQ_MASK(M1535_IRQ_COM2) | \
- M1535_IRQ_MASK(M1535_IRQ_IRDA) | \
- M1535_IRQ_MASK(M1535_IRQ_RTC) | \
- M1535_IRQ_MASK(M1535_IRQ_FDC) | \
- M1535_IRQ_MASK(M1535_IRQ_PS2))
-
-#define M1535_IRQ_LEVEL (M1535_IRQ_MASK(M1535_IRQ_IDE) | \
- M1535_IRQ_MASK(M1535_IRQ_USB) | \
- M1535_IRQ_MASK(M1535_IRQ_INTA) | \
- M1535_IRQ_MASK(M1535_IRQ_INTB) | \
- M1535_IRQ_MASK(M1535_IRQ_INTC) | \
- M1535_IRQ_MASK(M1535_IRQ_INTD))
-
-struct irq_map_entry {
- u16 bus;
- u8 slot;
- u8 irq;
-};
-static struct irq_map_entry int_map[] = {
- {1, ROCKHOPPER_M5451_SLOT, M1535_IRQ_AUDIO}, /* Audio controller */
- {1, ROCKHOPPER_PCI1_SLOT, M1535_IRQ_INTD}, /* PCI slot #1 */
- {1, ROCKHOPPER_PCI2_SLOT, M1535_IRQ_INTC}, /* PCI slot #2 */
- {1, ROCKHOPPER_M5237_SLOT, M1535_IRQ_USB}, /* USB host controller */
- {1, ROCKHOPPER_M5229_SLOT, IDE_PRIMARY_IRQ}, /* IDE controller */
- {2, ROCKHOPPER_PCNET_SLOT, M1535_IRQ_INTD}, /* AMD Am79c973 on-board
- ethernet */
- {2, ROCKHOPPER_PCI3_SLOT, M1535_IRQ_INTB}, /* PCI slot #3 */
- {2, ROCKHOPPER_PCI4_SLOT, M1535_IRQ_INTC} /* PCI slot #4 */
-};
-
-static int pci_intlines[] =
- { M1535_IRQ_INTA, M1535_IRQ_INTB, M1535_IRQ_INTC, M1535_IRQ_INTD };
-
-/* Determine the Rockhopper IRQ line number for the PCI device */
-int rockhopper_get_irq(struct pci_dev *dev, u8 pin, u8 slot)
-{
- struct pci_bus *bus;
- int i;
-
- bus = dev->bus;
- if (bus == NULL)
- return -1;
-
- for (i = 0; i < ARRAY_SIZE(int_map); i++) {
- if (int_map[i].bus == bus->number && int_map[i].slot == slot) {
- int line;
- for (line = 0; line < 4; line++)
- if (pci_intlines[line] == int_map[i].irq)
- break;
- if (line < 4)
- return pci_intlines[(line + (pin - 1)) % 4];
- else
- return int_map[i].irq;
- }
- }
- return -1;
-}
-
-#ifdef CONFIG_ROCKHOPPER
-void i8259_init(void)
-{
- init_i8259_irqs();
-
- outb(0x00, 0x4d0);
- outb(0x02, 0x4d1); /* USB IRQ9 is level */
-}
-#endif
-
-int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
-{
- extern int pci_probe_only;
- pci_probe_only = 1;
-
-#ifdef CONFIG_ROCKHOPPER
- if( dev->bus->number == 1 && vr4133_rockhopper ) {
- if(slot == ROCKHOPPER_PCI1_SLOT || slot == ROCKHOPPER_PCI2_SLOT)
- dev->irq = CMBVR41XX_INTA_IRQ;
- else
- dev->irq = rockhopper_get_irq(dev, pin, slot);
- } else
- dev->irq = CMBVR41XX_INTA_IRQ;
-#else
- dev->irq = CMBVR41XX_INTA_IRQ;
-#endif
-
- return dev->irq;
-}
-
-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, ali_m1535plus_init);
-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M5229, ali_m5229_init);
-
-
/* ack possible master abort */
mace->pci.error &= ~MACEPCI_ERROR_MASTER_ABORT;
mace->pci.control = control;
+ /*
+ * someone forgot to set the ultra bit for the onboard
+ * scsi chips; we fake it here
+ */
+ if (bus->number == 0 && reg == 0x40 && size == 4 &&
+ (devfn == (1 << 3) || devfn == (2 << 3)))
+ *val |= 0x1000;
DPRINTK("read%d: reg=%08x,val=%02x\n", size * 8, reg, *val);
*
* Based on arch/mips/ddb5xxx/ddb5477/pci_ops.c
*
- * Define the pci_ops for JMR3927.
+ * Define the pci_ops for TX3927.
*
* Much of the code is derived from the original DDB5074 port by
* Geert Uytterhoeven <geert@sonycom.com>
#include <linux/init.h>
#include <asm/addrspace.h>
-#include <asm/jmr3927/jmr3927.h>
+#include <asm/txx9/tx3927.h>
static inline int mkaddr(unsigned char bus, unsigned char dev_fn,
unsigned char where)
return PCIBIOS_SUCCESSFUL;
}
-static int jmr3927_pci_read_config(struct pci_bus *bus, unsigned int devfn,
+static int tx3927_pci_read_config(struct pci_bus *bus, unsigned int devfn,
int where, int size, u32 * val)
{
int ret;
return check_abort();
}
-static int jmr3927_pci_write_config(struct pci_bus *bus, unsigned int devfn,
+static int tx3927_pci_write_config(struct pci_bus *bus, unsigned int devfn,
int where, int size, u32 val)
{
int ret;
return check_abort();
}
-struct pci_ops jmr3927_pci_ops = {
- jmr3927_pci_read_config,
- jmr3927_pci_write_config,
+static struct pci_ops tx3927_pci_ops = {
+ .read = tx3927_pci_read_config,
+ .write = tx3927_pci_write_config,
};
+
+void __init tx3927_pcic_setup(struct pci_controller *channel,
+ unsigned long sdram_size, int extarb)
+{
+ unsigned long flags;
+ unsigned long io_base =
+ channel->io_resource->start + mips_io_port_base - IO_BASE;
+ unsigned long io_size =
+ channel->io_resource->end - channel->io_resource->start;
+ unsigned long io_pciaddr =
+ channel->io_resource->start - channel->io_offset;
+ unsigned long mem_base =
+ channel->mem_resource->start;
+ unsigned long mem_size =
+ channel->mem_resource->end - channel->mem_resource->start;
+ unsigned long mem_pciaddr =
+ channel->mem_resource->start - channel->mem_offset;
+
+ printk(KERN_INFO "TX3927 PCIC -- DID:%04x VID:%04x RID:%02x Arbiter:%s",
+ tx3927_pcicptr->did, tx3927_pcicptr->vid,
+ tx3927_pcicptr->rid,
+ extarb ? "External" : "Internal");
+ channel->pci_ops = &tx3927_pci_ops;
+
+ local_irq_save(flags);
+ /* Disable External PCI Config. Access */
+ tx3927_pcicptr->lbc = TX3927_PCIC_LBC_EPCAD;
+#ifdef __BIG_ENDIAN
+ tx3927_pcicptr->lbc |= TX3927_PCIC_LBC_IBSE |
+ TX3927_PCIC_LBC_TIBSE |
+ TX3927_PCIC_LBC_TMFBSE | TX3927_PCIC_LBC_MSDSE;
+#endif
+ /* LB->PCI mappings */
+ tx3927_pcicptr->iomas = ~(io_size - 1);
+ tx3927_pcicptr->ilbioma = io_base;
+ tx3927_pcicptr->ipbioma = io_pciaddr;
+ tx3927_pcicptr->mmas = ~(mem_size - 1);
+ tx3927_pcicptr->ilbmma = mem_base;
+ tx3927_pcicptr->ipbmma = mem_pciaddr;
+ /* PCI->LB mappings */
+ tx3927_pcicptr->iobas = 0xffffffff;
+ tx3927_pcicptr->ioba = 0;
+ tx3927_pcicptr->tlbioma = 0;
+ tx3927_pcicptr->mbas = ~(sdram_size - 1);
+ tx3927_pcicptr->mba = 0;
+ tx3927_pcicptr->tlbmma = 0;
+ /* Enable Direct mapping Address Space Decoder */
+ tx3927_pcicptr->lbc |= TX3927_PCIC_LBC_ILMDE | TX3927_PCIC_LBC_ILIDE;
+
+ /* Clear All Local Bus Status */
+ tx3927_pcicptr->lbstat = TX3927_PCIC_LBIM_ALL;
+ /* Enable All Local Bus Interrupts */
+ tx3927_pcicptr->lbim = TX3927_PCIC_LBIM_ALL;
+ /* Clear All PCI Status Error */
+ tx3927_pcicptr->pcistat = TX3927_PCIC_PCISTATIM_ALL;
+ /* Enable All PCI Status Error Interrupts */
+ tx3927_pcicptr->pcistatim = TX3927_PCIC_PCISTATIM_ALL;
+
+ /* PCIC Int => IRC IRQ10 */
+ tx3927_pcicptr->il = TX3927_IR_PCI;
+ /* Target Control (per errata) */
+ tx3927_pcicptr->tc = TX3927_PCIC_TC_OF8E | TX3927_PCIC_TC_IF8E;
+
+ /* Enable Bus Arbiter */
+ if (!extarb)
+ tx3927_pcicptr->pbapmc = TX3927_PCIC_PBAPMC_PBAEN;
+
+ tx3927_pcicptr->pcicmd = PCI_COMMAND_MASTER |
+ PCI_COMMAND_MEMORY |
+ PCI_COMMAND_IO |
+ PCI_COMMAND_PARITY | PCI_COMMAND_SERR;
+ local_irq_restore(flags);
+}
/*
- * Copyright 2001 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
- * ahennessy@mvista.com
+ * Define the pci_ops for the PCIC on Toshiba TX4927, TX4938, etc.
*
- * Copyright (C) 2000-2001 Toshiba Corporation
- * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
- *
- * Based on arch/mips/ddb5xxx/ddb5477/pci_ops.c
- *
- * Define the pci_ops for the Toshiba rbtx4927
- *
- * Much of the code is derived from the original DDB5074 port by
- * Geert Uytterhoeven <geert@sonycom.com>
- *
- * Copyright 2004 MontaVista Software Inc.
- * Author: Manish Lachwani (mlachwani@mvista.com)
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
+ * Based on linux/arch/mips/pci/ops-tx4938.c,
+ * linux/arch/mips/pci/fixup-rbtx4938.c,
+ * linux/arch/mips/txx9/rbtx4938/setup.c,
+ * and RBTX49xx patch from CELF patch archive.
*
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 2003-2005 (c) MontaVista Software, Inc.
+ * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
+ * (C) Copyright TOSHIBA CORPORATION 2000-2001, 2004-2007
*
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
*/
-#include <linux/types.h>
-#include <linux/pci.h>
#include <linux/kernel.h>
-#include <linux/init.h>
-
-#include <asm/addrspace.h>
-#include <asm/byteorder.h>
-#include <asm/tx4927/tx4927_pci.h>
-
-/* initialize in setup */
-struct resource pci_io_resource = {
- .name = "TX4927 PCI IO SPACE",
- .start = 0x1000,
- .end = (0x1000 + (TX4927_PCIIO_SIZE)) - 1,
- .flags = IORESOURCE_IO
-};
+#include <asm/txx9/tx4927pcic.h>
-/* initialize in setup */
-struct resource pci_mem_resource = {
- .name = "TX4927 PCI MEM SPACE",
- .start = TX4927_PCIMEM,
- .end = TX4927_PCIMEM + TX4927_PCIMEM_SIZE - 1,
- .flags = IORESOURCE_MEM
-};
+static struct {
+ struct pci_controller *channel;
+ struct tx4927_pcic_reg __iomem *pcicptr;
+} pcicptrs[2]; /* TX4938 has 2 pcic */
+
+static void __init set_tx4927_pcicptr(struct pci_controller *channel,
+ struct tx4927_pcic_reg __iomem *pcicptr)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(pcicptrs); i++) {
+ if (pcicptrs[i].channel == channel) {
+ pcicptrs[i].pcicptr = pcicptr;
+ return;
+ }
+ }
+ for (i = 0; i < ARRAY_SIZE(pcicptrs); i++) {
+ if (!pcicptrs[i].channel) {
+ pcicptrs[i].channel = channel;
+ pcicptrs[i].pcicptr = pcicptr;
+ return;
+ }
+ }
+ BUG();
+}
-static int mkaddr(int bus, int dev_fn, int where, int *flagsp)
+struct tx4927_pcic_reg __iomem *get_tx4927_pcicptr(
+ struct pci_controller *channel)
{
- if (bus > 0) {
- /* Type 1 configuration */
- tx4927_pcicptr->g2pcfgadrs = ((bus & 0xff) << 0x10) |
- ((dev_fn & 0xff) << 0x08) | (where & 0xfc) | 1;
- } else {
- if (dev_fn >= PCI_DEVFN(TX4927_PCIC_MAX_DEVNU, 0))
- return -1;
+ int i;
- /* Type 0 configuration */
- tx4927_pcicptr->g2pcfgadrs = ((bus & 0xff) << 0x10) |
- ((dev_fn & 0xff) << 0x08) | (where & 0xfc);
+ for (i = 0; i < ARRAY_SIZE(pcicptrs); i++) {
+ if (pcicptrs[i].channel == channel)
+ return pcicptrs[i].pcicptr;
}
+ return NULL;
+}
+
+static int mkaddr(struct pci_bus *bus, unsigned int devfn, int where,
+ struct tx4927_pcic_reg __iomem *pcicptr)
+{
+ if (bus->parent == NULL &&
+ devfn >= PCI_DEVFN(TX4927_PCIC_MAX_DEVNU, 0))
+ return -1;
+ __raw_writel(((bus->number & 0xff) << 0x10)
+ | ((devfn & 0xff) << 0x08) | (where & 0xfc)
+ | (bus->parent ? 1 : 0),
+ &pcicptr->g2pcfgadrs);
/* clear M_ABORT and Disable M_ABORT Int. */
- tx4927_pcicptr->pcistatus =
- (tx4927_pcicptr->pcistatus & 0x0000ffff) |
- (PCI_STATUS_REC_MASTER_ABORT << 16);
- tx4927_pcicptr->pcimask &= ~PCI_STATUS_REC_MASTER_ABORT;
+ __raw_writel((__raw_readl(&pcicptr->pcistatus) & 0x0000ffff)
+ | (PCI_STATUS_REC_MASTER_ABORT << 16),
+ &pcicptr->pcistatus);
return 0;
}
-static int check_abort(int flags)
+static int check_abort(struct tx4927_pcic_reg __iomem *pcicptr)
{
int code = PCIBIOS_SUCCESSFUL;
- if (tx4927_pcicptr->
- pcistatus & (PCI_STATUS_REC_MASTER_ABORT << 16)) {
- tx4927_pcicptr->pcistatus =
- (tx4927_pcicptr->
- pcistatus & 0x0000ffff) | (PCI_STATUS_REC_MASTER_ABORT
- << 16);
- tx4927_pcicptr->pcimask |= PCI_STATUS_REC_MASTER_ABORT;
+
+ /* wait write cycle completion before checking error status */
+ while (__raw_readl(&pcicptr->pcicstatus) & TX4927_PCIC_PCICSTATUS_IWB)
+ ;
+ if (__raw_readl(&pcicptr->pcistatus)
+ & (PCI_STATUS_REC_MASTER_ABORT << 16)) {
+ __raw_writel((__raw_readl(&pcicptr->pcistatus) & 0x0000ffff)
+ | (PCI_STATUS_REC_MASTER_ABORT << 16),
+ &pcicptr->pcistatus);
code = PCIBIOS_DEVICE_NOT_FOUND;
}
return code;
}
-static int tx4927_pcibios_read_config(struct pci_bus *bus, unsigned int devfn, int where,
- int size, u32 * val)
+static u8 icd_readb(int offset, struct tx4927_pcic_reg __iomem *pcicptr)
+{
+#ifdef __BIG_ENDIAN
+ offset ^= 3;
+#endif
+ return __raw_readb((void __iomem *)&pcicptr->g2pcfgdata + offset);
+}
+static u16 icd_readw(int offset, struct tx4927_pcic_reg __iomem *pcicptr)
+{
+#ifdef __BIG_ENDIAN
+ offset ^= 2;
+#endif
+ return __raw_readw((void __iomem *)&pcicptr->g2pcfgdata + offset);
+}
+static u32 icd_readl(struct tx4927_pcic_reg __iomem *pcicptr)
+{
+ return __raw_readl(&pcicptr->g2pcfgdata);
+}
+static void icd_writeb(u8 val, int offset,
+ struct tx4927_pcic_reg __iomem *pcicptr)
+{
+#ifdef __BIG_ENDIAN
+ offset ^= 3;
+#endif
+ __raw_writeb(val, (void __iomem *)&pcicptr->g2pcfgdata + offset);
+}
+static void icd_writew(u16 val, int offset,
+ struct tx4927_pcic_reg __iomem *pcicptr)
+{
+#ifdef __BIG_ENDIAN
+ offset ^= 2;
+#endif
+ __raw_writew(val, (void __iomem *)&pcicptr->g2pcfgdata + offset);
+}
+static void icd_writel(u32 val, struct tx4927_pcic_reg __iomem *pcicptr)
{
- int flags, retval, dev, busno, func;
+ __raw_writel(val, &pcicptr->g2pcfgdata);
+}
- busno = bus->number;
- dev = PCI_SLOT(devfn);
- func = PCI_FUNC(devfn);
+static struct tx4927_pcic_reg __iomem *pci_bus_to_pcicptr(struct pci_bus *bus)
+{
+ struct pci_controller *channel = bus->sysdata;
+ return get_tx4927_pcicptr(channel);
+}
- /* check if the bus is top-level */
- if (bus->parent != NULL) {
- busno = bus->number;
- } else {
- busno = 0;
- }
+static int tx4927_pci_config_read(struct pci_bus *bus, unsigned int devfn,
+ int where, int size, u32 *val)
+{
+ struct tx4927_pcic_reg __iomem *pcicptr = pci_bus_to_pcicptr(bus);
- if (mkaddr(busno, devfn, where, &flags))
+ if (mkaddr(bus, devfn, where, pcicptr)) {
+ *val = 0xffffffff;
return -1;
-
+ }
switch (size) {
case 1:
- *val = *(volatile u8 *) ((unsigned long) & tx4927_pcicptr->
- g2pcfgdata |
-#ifdef __LITTLE_ENDIAN
- (where & 3));
-#else
- ((where & 0x3) ^ 0x3));
-#endif
+ *val = icd_readb(where & 3, pcicptr);
break;
case 2:
- *val = *(volatile u16 *) ((unsigned long) & tx4927_pcicptr->
- g2pcfgdata |
-#ifdef __LITTLE_ENDIAN
- (where & 3));
-#else
- ((where & 0x3) ^ 0x2));
-#endif
- break;
- case 4:
- *val = tx4927_pcicptr->g2pcfgdata;
+ *val = icd_readw(where & 3, pcicptr);
break;
+ default:
+ *val = icd_readl(pcicptr);
}
+ return check_abort(pcicptr);
+}
- retval = check_abort(flags);
- if (retval == PCIBIOS_DEVICE_NOT_FOUND)
- *val = 0xffffffff;
+static int tx4927_pci_config_write(struct pci_bus *bus, unsigned int devfn,
+ int where, int size, u32 val)
+{
+ struct tx4927_pcic_reg __iomem *pcicptr = pci_bus_to_pcicptr(bus);
- return retval;
+ if (mkaddr(bus, devfn, where, pcicptr))
+ return -1;
+ switch (size) {
+ case 1:
+ icd_writeb(val, where & 3, pcicptr);
+ break;
+ case 2:
+ icd_writew(val, where & 3, pcicptr);
+ break;
+ default:
+ icd_writel(val, pcicptr);
+ }
+ return check_abort(pcicptr);
}
-static int tx4927_pcibios_write_config(struct pci_bus *bus, unsigned int devfn, int where,
- int size, u32 val)
+static struct pci_ops tx4927_pci_ops = {
+ .read = tx4927_pci_config_read,
+ .write = tx4927_pci_config_write,
+};
+
+static struct {
+ u8 trdyto;
+ u8 retryto;
+ u16 gbwc;
+} tx4927_pci_opts __devinitdata = {
+ .trdyto = 0,
+ .retryto = 0,
+ .gbwc = 0xfe0, /* 4064 GBUSCLK for CCFG.GTOT=0b11 */
+};
+
+void __init tx4927_pcic_setup(struct tx4927_pcic_reg __iomem *pcicptr,
+ struct pci_controller *channel, int extarb)
{
- int flags, dev, busno, func;
- busno = bus->number;
- dev = PCI_SLOT(devfn);
- func = PCI_FUNC(devfn);
+ int i;
+ unsigned long flags;
- /* check if the bus is top-level */
- if (bus->parent != NULL) {
- busno = bus->number;
- } else {
- busno = 0;
- }
+ set_tx4927_pcicptr(channel, pcicptr);
- if (mkaddr(busno, devfn, where, &flags))
- return -1;
+ if (!channel->pci_ops)
+ printk(KERN_INFO
+ "PCIC -- DID:%04x VID:%04x RID:%02x Arbiter:%s\n",
+ __raw_readl(&pcicptr->pciid) >> 16,
+ __raw_readl(&pcicptr->pciid) & 0xffff,
+ __raw_readl(&pcicptr->pciccrev) & 0xff,
+ extarb ? "External" : "Internal");
+ channel->pci_ops = &tx4927_pci_ops;
- switch (size) {
- case 1:
- *(volatile u8 *) ((unsigned long) & tx4927_pcicptr->
- g2pcfgdata |
-#ifdef __LITTLE_ENDIAN
- (where & 3)) = val;
+ local_irq_save(flags);
+
+ /* Disable All Initiator Space */
+ __raw_writel(__raw_readl(&pcicptr->pciccfg)
+ & ~(TX4927_PCIC_PCICCFG_G2PMEN(0)
+ | TX4927_PCIC_PCICCFG_G2PMEN(1)
+ | TX4927_PCIC_PCICCFG_G2PMEN(2)
+ | TX4927_PCIC_PCICCFG_G2PIOEN),
+ &pcicptr->pciccfg);
+
+ /* GB->PCI mappings */
+ __raw_writel((channel->io_resource->end - channel->io_resource->start)
+ >> 4,
+ &pcicptr->g2piomask);
+ ____raw_writeq((channel->io_resource->start +
+ channel->io_map_base - IO_BASE) |
+#ifdef __BIG_ENDIAN
+ TX4927_PCIC_G2PIOGBASE_ECHG
#else
- ((where & 0x3) ^ 0x3)) = val;
+ TX4927_PCIC_G2PIOGBASE_BSDIS
#endif
- break;
-
- case 2:
- *(volatile u16 *) ((unsigned long) & tx4927_pcicptr->
- g2pcfgdata |
-#ifdef __LITTLE_ENDIAN
- (where & 3)) = val;
+ , &pcicptr->g2piogbase);
+ ____raw_writeq(channel->io_resource->start - channel->io_offset,
+ &pcicptr->g2piopbase);
+ for (i = 0; i < 3; i++) {
+ __raw_writel(0, &pcicptr->g2pmmask[i]);
+ ____raw_writeq(0, &pcicptr->g2pmgbase[i]);
+ ____raw_writeq(0, &pcicptr->g2pmpbase[i]);
+ }
+ if (channel->mem_resource->end) {
+ __raw_writel((channel->mem_resource->end
+ - channel->mem_resource->start) >> 4,
+ &pcicptr->g2pmmask[0]);
+ ____raw_writeq(channel->mem_resource->start |
+#ifdef __BIG_ENDIAN
+ TX4927_PCIC_G2PMnGBASE_ECHG
#else
- ((where & 0x3) ^ 0x2)) = val;
+ TX4927_PCIC_G2PMnGBASE_BSDIS
#endif
- break;
- case 4:
- tx4927_pcicptr->g2pcfgdata = val;
- break;
+ , &pcicptr->g2pmgbase[0]);
+ ____raw_writeq(channel->mem_resource->start -
+ channel->mem_offset,
+ &pcicptr->g2pmpbase[0]);
+ }
+ /* PCI->GB mappings (I/O 256B) */
+ __raw_writel(0, &pcicptr->p2giopbase); /* 256B */
+ ____raw_writeq(0, &pcicptr->p2giogbase);
+ /* PCI->GB mappings (MEM 512MB (64MB on R1.x)) */
+ __raw_writel(0, &pcicptr->p2gm0plbase);
+ __raw_writel(0, &pcicptr->p2gm0pubase);
+ ____raw_writeq(TX4927_PCIC_P2GMnGBASE_TMEMEN |
+#ifdef __BIG_ENDIAN
+ TX4927_PCIC_P2GMnGBASE_TECHG
+#else
+ TX4927_PCIC_P2GMnGBASE_TBSDIS
+#endif
+ , &pcicptr->p2gmgbase[0]);
+ /* PCI->GB mappings (MEM 16MB) */
+ __raw_writel(0xffffffff, &pcicptr->p2gm1plbase);
+ __raw_writel(0xffffffff, &pcicptr->p2gm1pubase);
+ ____raw_writeq(0, &pcicptr->p2gmgbase[1]);
+ /* PCI->GB mappings (MEM 1MB) */
+ __raw_writel(0xffffffff, &pcicptr->p2gm2pbase); /* 1MB */
+ ____raw_writeq(0, &pcicptr->p2gmgbase[2]);
+
+ /* Clear all (including IRBER) except for GBWC */
+ __raw_writel((tx4927_pci_opts.gbwc << 16)
+ & TX4927_PCIC_PCICCFG_GBWC_MASK,
+ &pcicptr->pciccfg);
+ /* Enable Initiator Memory Space */
+ if (channel->mem_resource->end)
+ __raw_writel(__raw_readl(&pcicptr->pciccfg)
+ | TX4927_PCIC_PCICCFG_G2PMEN(0),
+ &pcicptr->pciccfg);
+ /* Enable Initiator I/O Space */
+ if (channel->io_resource->end)
+ __raw_writel(__raw_readl(&pcicptr->pciccfg)
+ | TX4927_PCIC_PCICCFG_G2PIOEN,
+ &pcicptr->pciccfg);
+ /* Enable Initiator Config */
+ __raw_writel(__raw_readl(&pcicptr->pciccfg)
+ | TX4927_PCIC_PCICCFG_ICAEN | TX4927_PCIC_PCICCFG_TCAR,
+ &pcicptr->pciccfg);
+
+ /* Do not use MEMMUL, MEMINF: YMFPCI card causes M_ABORT. */
+ __raw_writel(0, &pcicptr->pcicfg1);
+
+ __raw_writel((__raw_readl(&pcicptr->g2ptocnt) & ~0xffff)
+ | (tx4927_pci_opts.trdyto & 0xff)
+ | ((tx4927_pci_opts.retryto & 0xff) << 8),
+ &pcicptr->g2ptocnt);
+
+ /* Clear All Local Bus Status */
+ __raw_writel(TX4927_PCIC_PCICSTATUS_ALL, &pcicptr->pcicstatus);
+ /* Enable All Local Bus Interrupts */
+ __raw_writel(TX4927_PCIC_PCICSTATUS_ALL, &pcicptr->pcicmask);
+ /* Clear All Initiator Status */
+ __raw_writel(TX4927_PCIC_G2PSTATUS_ALL, &pcicptr->g2pstatus);
+ /* Enable All Initiator Interrupts */
+ __raw_writel(TX4927_PCIC_G2PSTATUS_ALL, &pcicptr->g2pmask);
+ /* Clear All PCI Status Error */
+ __raw_writel((__raw_readl(&pcicptr->pcistatus) & 0x0000ffff)
+ | (TX4927_PCIC_PCISTATUS_ALL << 16),
+ &pcicptr->pcistatus);
+ /* Enable All PCI Status Error Interrupts */
+ __raw_writel(TX4927_PCIC_PCISTATUS_ALL, &pcicptr->pcimask);
+
+ if (!extarb) {
+ /* Reset Bus Arbiter */
+ __raw_writel(TX4927_PCIC_PBACFG_RPBA, &pcicptr->pbacfg);
+ __raw_writel(0, &pcicptr->pbabm);
+ /* Enable Bus Arbiter */
+ __raw_writel(TX4927_PCIC_PBACFG_PBAEN, &pcicptr->pbacfg);
}
- return check_abort(flags);
+ __raw_writel(PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY
+ | PCI_COMMAND_PARITY | PCI_COMMAND_SERR,
+ &pcicptr->pcistatus);
+ local_irq_restore(flags);
+
+ printk(KERN_DEBUG
+ "PCI: COMMAND=%04x,PCIMASK=%04x,"
+ "TRDYTO=%02x,RETRYTO=%02x,GBWC=%03x\n",
+ __raw_readl(&pcicptr->pcistatus) & 0xffff,
+ __raw_readl(&pcicptr->pcimask) & 0xffff,
+ __raw_readl(&pcicptr->g2ptocnt) & 0xff,
+ (__raw_readl(&pcicptr->g2ptocnt) & 0xff00) >> 8,
+ (__raw_readl(&pcicptr->pciccfg) >> 16) & 0xfff);
}
-struct pci_ops tx4927_pci_ops = {
- tx4927_pcibios_read_config,
- tx4927_pcibios_write_config
-};
+static void tx4927_report_pcic_status1(struct tx4927_pcic_reg __iomem *pcicptr)
+{
+ __u16 pcistatus = (__u16)(__raw_readl(&pcicptr->pcistatus) >> 16);
+ __u32 g2pstatus = __raw_readl(&pcicptr->g2pstatus);
+ __u32 pcicstatus = __raw_readl(&pcicptr->pcicstatus);
+ static struct {
+ __u32 flag;
+ const char *str;
+ } pcistat_tbl[] = {
+ { PCI_STATUS_DETECTED_PARITY, "DetectedParityError" },
+ { PCI_STATUS_SIG_SYSTEM_ERROR, "SignaledSystemError" },
+ { PCI_STATUS_REC_MASTER_ABORT, "ReceivedMasterAbort" },
+ { PCI_STATUS_REC_TARGET_ABORT, "ReceivedTargetAbort" },
+ { PCI_STATUS_SIG_TARGET_ABORT, "SignaledTargetAbort" },
+ { PCI_STATUS_PARITY, "MasterParityError" },
+ }, g2pstat_tbl[] = {
+ { TX4927_PCIC_G2PSTATUS_TTOE, "TIOE" },
+ { TX4927_PCIC_G2PSTATUS_RTOE, "RTOE" },
+ }, pcicstat_tbl[] = {
+ { TX4927_PCIC_PCICSTATUS_PME, "PME" },
+ { TX4927_PCIC_PCICSTATUS_TLB, "TLB" },
+ { TX4927_PCIC_PCICSTATUS_NIB, "NIB" },
+ { TX4927_PCIC_PCICSTATUS_ZIB, "ZIB" },
+ { TX4927_PCIC_PCICSTATUS_PERR, "PERR" },
+ { TX4927_PCIC_PCICSTATUS_SERR, "SERR" },
+ { TX4927_PCIC_PCICSTATUS_GBE, "GBE" },
+ { TX4927_PCIC_PCICSTATUS_IWB, "IWB" },
+ };
+ int i, cont;
-/*
- * h/w only supports devices 0x00 to 0x14
- */
-struct pci_controller tx4927_controller = {
- .pci_ops = &tx4927_pci_ops,
- .io_resource = &pci_io_resource,
- .mem_resource = &pci_mem_resource,
-};
+ printk(KERN_ERR "");
+ if (pcistatus & TX4927_PCIC_PCISTATUS_ALL) {
+ printk(KERN_CONT "pcistat:%04x(", pcistatus);
+ for (i = 0, cont = 0; i < ARRAY_SIZE(pcistat_tbl); i++)
+ if (pcistatus & pcistat_tbl[i].flag)
+ printk(KERN_CONT "%s%s",
+ cont++ ? " " : "", pcistat_tbl[i].str);
+ printk(KERN_CONT ") ");
+ }
+ if (g2pstatus & TX4927_PCIC_G2PSTATUS_ALL) {
+ printk(KERN_CONT "g2pstatus:%08x(", g2pstatus);
+ for (i = 0, cont = 0; i < ARRAY_SIZE(g2pstat_tbl); i++)
+ if (g2pstatus & g2pstat_tbl[i].flag)
+ printk(KERN_CONT "%s%s",
+ cont++ ? " " : "", g2pstat_tbl[i].str);
+ printk(KERN_CONT ") ");
+ }
+ if (pcicstatus & TX4927_PCIC_PCICSTATUS_ALL) {
+ printk(KERN_CONT "pcicstatus:%08x(", pcicstatus);
+ for (i = 0, cont = 0; i < ARRAY_SIZE(pcicstat_tbl); i++)
+ if (pcicstatus & pcicstat_tbl[i].flag)
+ printk(KERN_CONT "%s%s",
+ cont++ ? " " : "", pcicstat_tbl[i].str);
+ printk(KERN_CONT ")");
+ }
+ printk(KERN_CONT "\n");
+}
+
+void tx4927_report_pcic_status(void)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(pcicptrs); i++) {
+ if (pcicptrs[i].pcicptr)
+ tx4927_report_pcic_status1(pcicptrs[i].pcicptr);
+ }
+}
+++ /dev/null
-/*
- * Define the pci_ops for the Toshiba rbtx4938
- * Copyright (C) 2000-2001 Toshiba Corporation
- *
- * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
- * terms of the GNU General Public License version 2. This program is
- * licensed "as is" without any warranty of any kind, whether express
- * or implied.
- *
- * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
- */
-#include <linux/types.h>
-#include <linux/pci.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-
-#include <asm/addrspace.h>
-#include <asm/tx4938/rbtx4938.h>
-
-/* initialize in setup */
-struct resource pci_io_resource = {
- .name = "pci IO space",
- .start = 0,
- .end = 0,
- .flags = IORESOURCE_IO
-};
-
-/* initialize in setup */
-struct resource pci_mem_resource = {
- .name = "pci memory space",
- .start = 0,
- .end = 0,
- .flags = IORESOURCE_MEM
-};
-
-struct resource tx4938_pcic1_pci_io_resource = {
- .name = "PCI1 IO",
- .start = 0,
- .end = 0,
- .flags = IORESOURCE_IO
-};
-struct resource tx4938_pcic1_pci_mem_resource = {
- .name = "PCI1 mem",
- .start = 0,
- .end = 0,
- .flags = IORESOURCE_MEM
-};
-
-static int mkaddr(int bus, int dev_fn, int where,
- struct tx4938_pcic_reg *pcicptr)
-{
- if (bus > 0) {
- /* Type 1 configuration */
- pcicptr->g2pcfgadrs = ((bus & 0xff) << 0x10) |
- ((dev_fn & 0xff) << 0x08) | (where & 0xfc) | 1;
- } else {
- if (dev_fn >= PCI_DEVFN(TX4938_PCIC_MAX_DEVNU, 0))
- return -1;
-
- /* Type 0 configuration */
- pcicptr->g2pcfgadrs = ((bus & 0xff) << 0x10) |
- ((dev_fn & 0xff) << 0x08) | (where & 0xfc);
- }
- /* clear M_ABORT and Disable M_ABORT Int. */
- pcicptr->pcistatus =
- (pcicptr->pcistatus & 0x0000ffff) |
- (PCI_STATUS_REC_MASTER_ABORT << 16);
- pcicptr->pcimask &= ~PCI_STATUS_REC_MASTER_ABORT;
-
- return 0;
-}
-
-static int check_abort(struct tx4938_pcic_reg *pcicptr)
-{
- int code = PCIBIOS_SUCCESSFUL;
- /* wait write cycle completion before checking error status */
- while (pcicptr->pcicstatus & TX4938_PCIC_PCICSTATUS_IWB)
- ;
- if (pcicptr->pcistatus & (PCI_STATUS_REC_MASTER_ABORT << 16)) {
- pcicptr->pcistatus =
- (pcicptr->
- pcistatus & 0x0000ffff) | (PCI_STATUS_REC_MASTER_ABORT
- << 16);
- pcicptr->pcimask |= PCI_STATUS_REC_MASTER_ABORT;
- code = PCIBIOS_DEVICE_NOT_FOUND;
- }
- return code;
-}
-
-extern struct pci_controller tx4938_pci_controller[];
-extern struct tx4938_pcic_reg *get_tx4938_pcicptr(int ch);
-
-static struct tx4938_pcic_reg *pci_bus_to_pcicptr(struct pci_bus *bus)
-{
- struct pci_controller *channel = bus->sysdata;
- return get_tx4938_pcicptr(channel - &tx4938_pci_controller[0]);
-}
-
-static int tx4938_pcibios_read_config(struct pci_bus *bus, unsigned int devfn,
- int where, int size, u32 * val)
-{
- int retval, dev, busno, func;
- struct tx4938_pcic_reg *pcicptr = pci_bus_to_pcicptr(bus);
- void __iomem *cfgdata =
- (void __iomem *)(unsigned long)&pcicptr->g2pcfgdata;
-
- dev = PCI_SLOT(devfn);
- func = PCI_FUNC(devfn);
-
- /* check if the bus is top-level */
- if (bus->parent != NULL)
- busno = bus->number;
- else {
- busno = 0;
- }
-
- if (mkaddr(busno, devfn, where, pcicptr))
- return -1;
-
- switch (size) {
- case 1:
-#ifdef __BIG_ENDIAN
- cfgdata += (where & 3) ^ 3;
-#else
- cfgdata += where & 3;
-#endif
- *val = __raw_readb(cfgdata);
- break;
- case 2:
-#ifdef __BIG_ENDIAN
- cfgdata += (where & 2) ^ 2;
-#else
- cfgdata += where & 2;
-#endif
- *val = __raw_readw(cfgdata);
- break;
- case 4:
- *val = __raw_readl(cfgdata);
- break;
- }
-
- retval = check_abort(pcicptr);
- if (retval == PCIBIOS_DEVICE_NOT_FOUND)
- *val = 0xffffffff;
-
- return retval;
-}
-
-static int tx4938_pcibios_write_config(struct pci_bus *bus, unsigned int devfn, int where,
- int size, u32 val)
-{
- int dev, busno, func;
- struct tx4938_pcic_reg *pcicptr = pci_bus_to_pcicptr(bus);
- void __iomem *cfgdata =
- (void __iomem *)(unsigned long)&pcicptr->g2pcfgdata;
-
- busno = bus->number;
- dev = PCI_SLOT(devfn);
- func = PCI_FUNC(devfn);
-
- /* check if the bus is top-level */
- if (bus->parent != NULL) {
- busno = bus->number;
- } else {
- busno = 0;
- }
-
- if (mkaddr(busno, devfn, where, pcicptr))
- return -1;
-
- switch (size) {
- case 1:
-#ifdef __BIG_ENDIAN
- cfgdata += (where & 3) ^ 3;
-#else
- cfgdata += where & 3;
-#endif
- __raw_writeb(val, cfgdata);
- break;
- case 2:
-#ifdef __BIG_ENDIAN
- cfgdata += (where & 2) ^ 2;
-#else
- cfgdata += where & 2;
-#endif
- __raw_writew(val, cfgdata);
- break;
- case 4:
- __raw_writel(val, cfgdata);
- break;
- }
-
- return check_abort(pcicptr);
-}
-
-struct pci_ops tx4938_pci_ops = {
- tx4938_pcibios_read_config,
- tx4938_pcibios_write_config
-};
-
-struct pci_controller tx4938_pci_controller[] = {
- /* h/w only supports devices 0x00 to 0x14 */
- {
- .pci_ops = &tx4938_pci_ops,
- .io_resource = &pci_io_resource,
- .mem_resource = &pci_mem_resource,
- },
- /* h/w only supports devices 0x00 to 0x14 */
- {
- .pci_ops = &tx4938_pci_ops,
- .io_resource = &tx4938_pcic1_pci_io_resource,
- .mem_resource = &tx4938_pcic1_pci_mem_resource,
- }
-};
{
uint32_t cmdreg;
uint64_t reg;
- extern int pci_probe_only;
/* CFE will assign PCI resources */
pci_probe_only = 1;
ioremap(A_BCM1480_PHYS_PCI_IO_MATCH_BYTES, 65536);
bcm1480_controller.io_map_base -= bcm1480_controller.io_offset;
set_io_port_base(bcm1480_controller.io_map_base);
- isa_slot_offset = (unsigned long)
- ioremap(A_BCM1480_PHYS_PCI_MEM_MATCH_BYTES, 1024*1024);
register_pci_controller(&bcm1480_controller);
static int num_bridges = 0;
bridge_t *bridge;
int slot;
- extern int pci_probe_only;
pci_probe_only = 1;
+++ /dev/null
-/*
- * Copyright 2001 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
- * ahennessy@mvista.com
- *
- * Copyright (C) 2000-2001 Toshiba Corporation
- * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-#include <linux/types.h>
-#include <linux/pci.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-
-#include <asm/jmr3927/jmr3927.h>
-#include <asm/debug.h>
-
-struct resource pci_io_resource = {
- .name = "IO MEM",
- .start = 0x1000, /* reserve regacy I/O space */
- .end = 0x1000 + JMR3927_PCIIO_SIZE - 1,
- .flags = IORESOURCE_IO
-};
-
-struct resource pci_mem_resource = {
- .name = "PCI MEM",
- .start = JMR3927_PCIMEM,
- .end = JMR3927_PCIMEM + JMR3927_PCIMEM_SIZE - 1,
- .flags = IORESOURCE_MEM
-};
-
-extern struct pci_ops jmr3927_pci_ops;
-
-struct pci_controller jmr3927_controller = {
- .pci_ops = &jmr3927_pci_ops,
- .io_resource = &pci_io_resource,
- .mem_resource = &pci_mem_resource,
- .mem_offset = JMR3927_PCIMEM
-};
#include <linux/pci.h>
#include <linux/types.h>
-#include <asm/bootinfo.h>
+#include <asm/lasat/lasat.h>
#include <irq.h>
{
printk(KERN_DEBUG "PCI: starting\n");
- switch (mips_machtype) {
- case MACH_LASAT_100:
- lasat_pci_controller.pci_ops = >64xxx_pci0_ops;
- break;
- case MACH_LASAT_200:
+ if (IS_LASAT_200())
lasat_pci_controller.pci_ops = &nile4_pci_ops;
- break;
- default:
- panic("pcibios_init: mips_machtype incorrect");
- }
+ else
+ lasat_pci_controller.pci_ops = >64xxx_pci0_ops;
register_pci_controller(&lasat_pci_controller);
void __iomem *io_map_base;
uint32_t cmdreg;
uint64_t reg;
- extern int pci_probe_only;
/* CFE will assign PCI resources */
pci_probe_only = 1;
* works correctly with most of Linux's drivers.
* XXX ehs: Should this happen in PCI Device mode?
*/
- isa_slot_offset = (unsigned long)
- ioremap(A_PHYS_LDTPCI_IO_MATCH_BYTES_32, 1024 * 1024);
-
io_map_base = ioremap(A_PHYS_LDTPCI_IO_MATCH_BYTES, 1024 * 1024);
sb1250_controller.io_map_base = io_map_base;
set_io_port_base((unsigned long)io_map_base);
--- /dev/null
+/*
+ * linux/arch/mips/pci/pci-tx4927.c
+ *
+ * Based on linux/arch/mips/txx9/rbtx4938/setup.c,
+ * and RBTX49xx patch from CELF patch archive.
+ *
+ * Copyright 2001, 2003-2005 MontaVista Software Inc.
+ * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
+ * (C) Copyright TOSHIBA CORPORATION 2000-2001, 2004-2007
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/init.h>
+#include <linux/pci.h>
+#include <linux/kernel.h>
+#include <asm/txx9/generic.h>
+#include <asm/txx9/tx4927.h>
+
+int __init tx4927_report_pciclk(void)
+{
+ int pciclk = 0;
+
+ printk(KERN_INFO "PCIC --%s PCICLK:",
+ (__raw_readq(&tx4927_ccfgptr->ccfg) & TX4927_CCFG_PCI66) ?
+ " PCI66" : "");
+ if (__raw_readq(&tx4927_ccfgptr->pcfg) & TX4927_PCFG_PCICLKEN_ALL) {
+ u64 ccfg = __raw_readq(&tx4927_ccfgptr->ccfg);
+ switch ((unsigned long)ccfg &
+ TX4927_CCFG_PCIDIVMODE_MASK) {
+ case TX4927_CCFG_PCIDIVMODE_2_5:
+ pciclk = txx9_cpu_clock * 2 / 5; break;
+ case TX4927_CCFG_PCIDIVMODE_3:
+ pciclk = txx9_cpu_clock / 3; break;
+ case TX4927_CCFG_PCIDIVMODE_5:
+ pciclk = txx9_cpu_clock / 5; break;
+ case TX4927_CCFG_PCIDIVMODE_6:
+ pciclk = txx9_cpu_clock / 6; break;
+ }
+ printk("Internal(%u.%uMHz)",
+ (pciclk + 50000) / 1000000,
+ ((pciclk + 50000) / 100000) % 10);
+ } else {
+ printk("External");
+ pciclk = -1;
+ }
+ printk("\n");
+ return pciclk;
+}
+
+int __init tx4927_pciclk66_setup(void)
+{
+ int pciclk;
+
+ /* Assert M66EN */
+ tx4927_ccfg_set(TX4927_CCFG_PCI66);
+ /* Double PCICLK (if possible) */
+ if (__raw_readq(&tx4927_ccfgptr->pcfg) & TX4927_PCFG_PCICLKEN_ALL) {
+ unsigned int pcidivmode = 0;
+ u64 ccfg = __raw_readq(&tx4927_ccfgptr->ccfg);
+ pcidivmode = (unsigned long)ccfg &
+ TX4927_CCFG_PCIDIVMODE_MASK;
+ switch (pcidivmode) {
+ case TX4927_CCFG_PCIDIVMODE_5:
+ case TX4927_CCFG_PCIDIVMODE_2_5:
+ pcidivmode = TX4927_CCFG_PCIDIVMODE_2_5;
+ pciclk = txx9_cpu_clock * 2 / 5;
+ break;
+ case TX4927_CCFG_PCIDIVMODE_6:
+ case TX4927_CCFG_PCIDIVMODE_3:
+ default:
+ pcidivmode = TX4927_CCFG_PCIDIVMODE_3;
+ pciclk = txx9_cpu_clock / 3;
+ }
+ tx4927_ccfg_change(TX4927_CCFG_PCIDIVMODE_MASK,
+ pcidivmode);
+ printk(KERN_DEBUG "PCICLK: ccfg:%08lx\n",
+ (unsigned long)__raw_readq(&tx4927_ccfgptr->ccfg));
+ } else
+ pciclk = -1;
+ return pciclk;
+}
--- /dev/null
+/*
+ * linux/arch/mips/pci/pci-tx4938.c
+ *
+ * Based on linux/arch/mips/txx9/rbtx4938/setup.c,
+ * and RBTX49xx patch from CELF patch archive.
+ *
+ * Copyright 2001, 2003-2005 MontaVista Software Inc.
+ * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
+ * (C) Copyright TOSHIBA CORPORATION 2000-2001, 2004-2007
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/init.h>
+#include <linux/pci.h>
+#include <linux/kernel.h>
+#include <asm/txx9/generic.h>
+#include <asm/txx9/tx4938.h>
+
+int __init tx4938_report_pciclk(void)
+{
+ int pciclk = 0;
+
+ printk(KERN_INFO "PCIC --%s PCICLK:",
+ (__raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_PCI66) ?
+ " PCI66" : "");
+ if (__raw_readq(&tx4938_ccfgptr->pcfg) & TX4938_PCFG_PCICLKEN_ALL) {
+ u64 ccfg = __raw_readq(&tx4938_ccfgptr->ccfg);
+ switch ((unsigned long)ccfg &
+ TX4938_CCFG_PCIDIVMODE_MASK) {
+ case TX4938_CCFG_PCIDIVMODE_4:
+ pciclk = txx9_cpu_clock / 4; break;
+ case TX4938_CCFG_PCIDIVMODE_4_5:
+ pciclk = txx9_cpu_clock * 2 / 9; break;
+ case TX4938_CCFG_PCIDIVMODE_5:
+ pciclk = txx9_cpu_clock / 5; break;
+ case TX4938_CCFG_PCIDIVMODE_5_5:
+ pciclk = txx9_cpu_clock * 2 / 11; break;
+ case TX4938_CCFG_PCIDIVMODE_8:
+ pciclk = txx9_cpu_clock / 8; break;
+ case TX4938_CCFG_PCIDIVMODE_9:
+ pciclk = txx9_cpu_clock / 9; break;
+ case TX4938_CCFG_PCIDIVMODE_10:
+ pciclk = txx9_cpu_clock / 10; break;
+ case TX4938_CCFG_PCIDIVMODE_11:
+ pciclk = txx9_cpu_clock / 11; break;
+ }
+ printk("Internal(%u.%uMHz)",
+ (pciclk + 50000) / 1000000,
+ ((pciclk + 50000) / 100000) % 10);
+ } else {
+ printk("External");
+ pciclk = -1;
+ }
+ printk("\n");
+ return pciclk;
+}
+
+void __init tx4938_report_pci1clk(void)
+{
+ __u64 ccfg = __raw_readq(&tx4938_ccfgptr->ccfg);
+ unsigned int pciclk =
+ txx9_gbus_clock / ((ccfg & TX4938_CCFG_PCI1DMD) ? 4 : 2);
+
+ printk(KERN_INFO "PCIC1 -- %sPCICLK:%u.%uMHz\n",
+ (ccfg & TX4938_CCFG_PCI1_66) ? "PCI66 " : "",
+ (pciclk + 50000) / 1000000,
+ ((pciclk + 50000) / 100000) % 10);
+}
+
+int __init tx4938_pciclk66_setup(void)
+{
+ int pciclk;
+
+ /* Assert M66EN */
+ tx4938_ccfg_set(TX4938_CCFG_PCI66);
+ /* Double PCICLK (if possible) */
+ if (__raw_readq(&tx4938_ccfgptr->pcfg) & TX4938_PCFG_PCICLKEN_ALL) {
+ unsigned int pcidivmode = 0;
+ u64 ccfg = __raw_readq(&tx4938_ccfgptr->ccfg);
+ pcidivmode = (unsigned long)ccfg &
+ TX4938_CCFG_PCIDIVMODE_MASK;
+ switch (pcidivmode) {
+ case TX4938_CCFG_PCIDIVMODE_8:
+ case TX4938_CCFG_PCIDIVMODE_4:
+ pcidivmode = TX4938_CCFG_PCIDIVMODE_4;
+ pciclk = txx9_cpu_clock / 4;
+ break;
+ case TX4938_CCFG_PCIDIVMODE_9:
+ case TX4938_CCFG_PCIDIVMODE_4_5:
+ pcidivmode = TX4938_CCFG_PCIDIVMODE_4_5;
+ pciclk = txx9_cpu_clock * 2 / 9;
+ break;
+ case TX4938_CCFG_PCIDIVMODE_10:
+ case TX4938_CCFG_PCIDIVMODE_5:
+ pcidivmode = TX4938_CCFG_PCIDIVMODE_5;
+ pciclk = txx9_cpu_clock / 5;
+ break;
+ case TX4938_CCFG_PCIDIVMODE_11:
+ case TX4938_CCFG_PCIDIVMODE_5_5:
+ default:
+ pcidivmode = TX4938_CCFG_PCIDIVMODE_5_5;
+ pciclk = txx9_cpu_clock * 2 / 11;
+ break;
+ }
+ tx4938_ccfg_change(TX4938_CCFG_PCIDIVMODE_MASK,
+ pcidivmode);
+ printk(KERN_DEBUG "PCICLK: ccfg:%08lx\n",
+ (unsigned long)__raw_readq(&tx4938_ccfgptr->ccfg));
+ } else
+ pciclk = -1;
+ return pciclk;
+}
+
+int tx4938_pcic1_map_irq(const struct pci_dev *dev, u8 slot)
+{
+ if (get_tx4927_pcicptr(dev->bus->sysdata) == tx4938_pcic1ptr) {
+ switch (slot) {
+ case TX4927_PCIC_IDSEL_AD_TO_SLOT(31):
+ if (__raw_readq(&tx4938_ccfgptr->pcfg) &
+ TX4938_PCFG_ETH0_SEL)
+ return TXX9_IRQ_BASE + TX4938_IR_ETH0;
+ break;
+ case TX4927_PCIC_IDSEL_AD_TO_SLOT(30):
+ if (__raw_readq(&tx4938_ccfgptr->pcfg) &
+ TX4938_PCFG_ETH1_SEL)
+ return TXX9_IRQ_BASE + TX4938_IR_ETH1;
+ break;
+ }
+ return 0;
+ }
+ return -1;
+}
* The PCI controller list.
*/
-struct pci_controller *hose_head, **hose_tail = &hose_head;
-struct pci_controller *pci_isa_hose;
+static struct pci_controller *hose_head, **hose_tail = &hose_head;
unsigned long PCIBIOS_MIN_IO = 0x0000;
unsigned long PCIBIOS_MIN_MEM = 0;
void __init prom_meminit(void) {}
void __init prom_free_prom_memory(void)
{
+#ifdef CONFIG_SGI_IP28
+ u32 mconfig1;
+ unsigned long flags;
+ spinlock_t lock;
+
+ /*
+ * because ARCS accesses memory uncached we wait until ARCS
+ * isn't needed any longer, before we switch from slow to
+ * normal mode
+ */
+ spin_lock_irqsave(&lock, flags);
+ mconfig1 = sgimc->mconfig1;
+ /* map ECC register */
+ sgimc->mconfig1 = (mconfig1 & 0xffff0000) | 0x2060;
+ iob();
+ /* switch to normal mode */
+ *(unsigned long *)PHYS_TO_XKSEG_UNCACHED(0x60000000) = 0;
+ iob();
+ /* reduce WR_COL */
+ sgimc->cmacc = (sgimc->cmacc & ~0xf) | 4;
+ iob();
+ /* restore old config */
+ sgimc->mconfig1 = mconfig1;
+ iob();
+ spin_unlock_irqrestore(&lock, flags);
+#endif
}
}
device_initcall(sgiseeq_devinit);
+
+static int __init sgi_hal2_devinit(void)
+{
+ return IS_ERR(platform_device_register_simple("sgihal2", 0, NULL, 0));
+}
+
+device_initcall(sgi_hal2_devinit);
+
+static int __init sgi_button_devinit(void)
+{
+ if (ip22_is_fullhouse())
+ return 0; /* full house has no volume buttons */
+
+ return IS_ERR(platform_device_register_simple("sgiindybtns",
+ -1, NULL, 0));
+}
+
+device_initcall(sgi_button_devinit);
#define POWERDOWN_FREQ (HZ / 4)
#define PANIC_FREQ (HZ / 8)
-static struct timer_list power_timer, blink_timer, debounce_timer, volume_timer;
+static struct timer_list power_timer, blink_timer, debounce_timer;
#define MACHINE_PANICED 1
#define MACHINE_SHUTTING_DOWN 2
add_timer(&power_timer);
}
-void (*indy_volume_button)(int) = NULL;
-
-EXPORT_SYMBOL(indy_volume_button);
-
-static inline void volume_up_button(unsigned long data)
-{
- del_timer(&volume_timer);
-
- if (indy_volume_button)
- indy_volume_button(1);
-
- if (sgint->istat1 & SGINT_ISTAT1_PWR) {
- volume_timer.expires = jiffies + (HZ / 100);
- add_timer(&volume_timer);
- }
-}
-
-static inline void volume_down_button(unsigned long data)
-{
- del_timer(&volume_timer);
-
- if (indy_volume_button)
- indy_volume_button(-1);
-
- if (sgint->istat1 & SGINT_ISTAT1_PWR) {
- volume_timer.expires = jiffies + (HZ / 100);
- add_timer(&volume_timer);
- }
-}
-
static irqreturn_t panel_int(int irq, void *dev_id)
{
unsigned int buttons;
* House. Only lowest 2 bits are used. Guiness uses upper four bits
* for volume control". This is not true, all bits are pulled high
* on fullhouse */
- if (ip22_is_fullhouse() || !(buttons & SGIOC_PANEL_POWERINTR)) {
+ if (!(buttons & SGIOC_PANEL_POWERINTR))
power_button();
- return IRQ_HANDLED;
- }
- /* TODO: mute/unmute */
- /* Volume up button was pressed */
- if (!(buttons & SGIOC_PANEL_VOLUPINTR)) {
- init_timer(&volume_timer);
- volume_timer.function = volume_up_button;
- volume_timer.expires = jiffies + (HZ / 100);
- add_timer(&volume_timer);
- }
- /* Volume down button was pressed */
- if (!(buttons & SGIOC_PANEL_VOLDNINTR)) {
- init_timer(&volume_timer);
- volume_timer.function = volume_down_button;
- volume_timer.expires = jiffies + (HZ / 100);
- add_timer(&volume_timer);
- }
return IRQ_HANDLED;
}
* Now we have an asynchronous bus error, speculatively or DMA caused.
* Need to search all DMA descriptors for the error address.
*/
- for (i = 0; i < sizeof(hpc3)/sizeof(struct hpc3_stat); ++i) {
+ for (i = 0; i < ARRAY_SIZE(hpc3); ++i) {
struct hpc3_stat *hp = (struct hpc3_stat *)&hpc3 + i;
if ((cpu_err_stat & CPU_ERRMASK) &&
(cpu_err_addr == hp->ndptr || cpu_err_addr == hp->cbp))
(gio_err_addr == hp->ndptr || gio_err_addr == hp->cbp))
break;
}
- if (i < sizeof(hpc3)/sizeof(struct hpc3_stat)) {
+ if (i < ARRAY_SIZE(hpc3)) {
struct hpc3_stat *hp = (struct hpc3_stat *)&hpc3 + i;
printk(KERN_ERR "at DMA addresses: HPC3 @ %08lx:"
" ctl %08x, ndp %08x, cbp %08x\n",
-#include <linux/kallsyms.h>
#include <linux/kernel.h>
#include <linux/mmzone.h>
#include <linux/nodemask.h>
/*
* Saved cp0 registers
*/
- printk("epc : %016lx ", nr->epc);
- print_symbol("%s ", nr->epc);
+ printk("epc : %016lx %pS\n", nr->epc, (void *) nr->epc);
printk("%s\n", print_tainted());
- printk("ErrEPC: %016lx ", nr->error_epc);
- print_symbol("%s\n", nr->error_epc);
- printk("ra : %016lx ", nr->gpr[31]);
- print_symbol("%s\n", nr->gpr[31]);
+ printk("ErrEPC: %016lx %pS\n", nr->error_epc, (void *) nr->error_epc);
+ printk("ra : %016lx %pS\n", nr->gpr[31], (void *) nr->gpr[31]);
printk("Status: %08lx ", nr->sr);
if (nr->sr & ST0_KX)
device_initcall(meth_devinit);
+static __init int sgio2audio_devinit(void)
+{
+ struct platform_device *pd;
+ int ret;
+
+ pd = platform_device_alloc("sgio2audio", -1);
+ if (!pd)
+ return -ENOMEM;
+
+ ret = platform_device_add(pd);
+ if (ret)
+ platform_device_put(pd);
+
+ return ret;
+}
+
+device_initcall(sgio2audio_devinit);
+
+static __init int sgio2btns_devinit(void)
+{
+ struct platform_device *pd;
+ int ret;
+
+ pd = platform_device_alloc("sgio2btns", -1);
+ if (!pd)
+ return -ENOMEM;
+
+ ret = platform_device_add(pd);
+ if (ret)
+ platform_device_put(pd);
+
+ return ret;
+}
+
+device_initcall(sgio2btns_devinit);
+
MODULE_AUTHOR("Ralf Baechle <ralf@linux-mips.org>");
MODULE_LICENSE("GPL");
MODULE_DESCRIPTION("8250 UART probe driver for SGI IP32 aka O2");
/*
* Setup (E)ISA I/O memory access stuff
*/
- isa_slot_offset = CKSEG1ADDR(0xb0000000);
#ifdef CONFIG_EISA
EISA_bus = 1;
#endif
+++ /dev/null
-config TOSHIBA_FPCIB0
- bool "FPCIB0 Backplane Support"
- depends on TOSHIBA_RBTX4927
+++ /dev/null
-#
-# Makefile for common code for Toshiba TX4927 based systems
-#
-
-obj-y += tx4927_prom.o tx4927_irq.o
-
-obj-$(CONFIG_TOSHIBA_FPCIB0) += smsc_fdc37m81x.o
-obj-$(CONFIG_KGDB) += tx4927_dbgio.o
-
-EXTRA_CFLAGS += -Werror
+++ /dev/null
-obj-y += toshiba_rbtx4927_prom.o
-obj-y += toshiba_rbtx4927_setup.o
-obj-y += toshiba_rbtx4927_irq.o
-
-EXTRA_CFLAGS += -Werror
+++ /dev/null
-/*
- * linux/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c
- *
- * Toshiba RBTX4927 specific interrupt handlers
- *
- * Author: MontaVista Software, Inc.
- * source@mvista.com
- *
- * Copyright 2001-2002 MontaVista Software Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
- * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
- * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-
-/*
-IRQ Device
-00 RBTX4927-ISA/00
-01 RBTX4927-ISA/01 PS2/Keyboard
-02 RBTX4927-ISA/02 Cascade RBTX4927-ISA (irqs 8-15)
-03 RBTX4927-ISA/03
-04 RBTX4927-ISA/04
-05 RBTX4927-ISA/05
-06 RBTX4927-ISA/06
-07 RBTX4927-ISA/07
-08 RBTX4927-ISA/08
-09 RBTX4927-ISA/09
-10 RBTX4927-ISA/10
-11 RBTX4927-ISA/11
-12 RBTX4927-ISA/12 PS2/Mouse (not supported at this time)
-13 RBTX4927-ISA/13
-14 RBTX4927-ISA/14 IDE
-15 RBTX4927-ISA/15
-
-16 TX4927-CP0/00 Software 0
-17 TX4927-CP0/01 Software 1
-18 TX4927-CP0/02 Cascade TX4927-CP0
-19 TX4927-CP0/03 Multiplexed -- do not use
-20 TX4927-CP0/04 Multiplexed -- do not use
-21 TX4927-CP0/05 Multiplexed -- do not use
-22 TX4927-CP0/06 Multiplexed -- do not use
-23 TX4927-CP0/07 CPU TIMER
-
-24 TX4927-PIC/00
-25 TX4927-PIC/01
-26 TX4927-PIC/02
-27 TX4927-PIC/03 Cascade RBTX4927-IOC
-28 TX4927-PIC/04
-29 TX4927-PIC/05 RBTX4927 RTL-8019AS ethernet
-30 TX4927-PIC/06
-31 TX4927-PIC/07
-32 TX4927-PIC/08 TX4927 SerialIO Channel 0
-33 TX4927-PIC/09 TX4927 SerialIO Channel 1
-34 TX4927-PIC/10
-35 TX4927-PIC/11
-36 TX4927-PIC/12
-37 TX4927-PIC/13
-38 TX4927-PIC/14
-39 TX4927-PIC/15
-40 TX4927-PIC/16 TX4927 PCI PCI-C
-41 TX4927-PIC/17
-42 TX4927-PIC/18
-43 TX4927-PIC/19
-44 TX4927-PIC/20
-45 TX4927-PIC/21
-46 TX4927-PIC/22 TX4927 PCI PCI-ERR
-47 TX4927-PIC/23 TX4927 PCI PCI-PMA (not used)
-48 TX4927-PIC/24
-49 TX4927-PIC/25
-50 TX4927-PIC/26
-51 TX4927-PIC/27
-52 TX4927-PIC/28
-53 TX4927-PIC/29
-54 TX4927-PIC/30
-55 TX4927-PIC/31
-
-56 RBTX4927-IOC/00 FPCIB0 PCI-D PJ4/A PJ5/B SB/C PJ6/D PJ7/A (SouthBridge/NotUsed) [RTL-8139=PJ4]
-57 RBTX4927-IOC/01 FPCIB0 PCI-C PJ4/D PJ5/A SB/B PJ6/C PJ7/D (SouthBridge/NotUsed) [RTL-8139=PJ5]
-58 RBTX4927-IOC/02 FPCIB0 PCI-B PJ4/C PJ5/D SB/A PJ6/B PJ7/C (SouthBridge/IDE/pin=1,INTR) [RTL-8139=NotSupported]
-59 RBTX4927-IOC/03 FPCIB0 PCI-A PJ4/B PJ5/C SB/D PJ6/A PJ7/B (SouthBridge/USB/pin=4) [RTL-8139=PJ6]
-60 RBTX4927-IOC/04
-61 RBTX4927-IOC/05
-62 RBTX4927-IOC/06
-63 RBTX4927-IOC/07
-
-NOTES:
-SouthBridge/INTR is mapped to SouthBridge/A=PCI-B/#58
-SouthBridge/ISA/pin=0 no pci irq used by this device
-SouthBridge/IDE/pin=1 no pci irq used by this device, using INTR via ISA IRQ14
-SouthBridge/USB/pin=4 using pci irq SouthBridge/D=PCI-A=#59
-SouthBridge/PMC/pin=0 no pci irq used by this device
-SuperIO/PS2/Keyboard, using INTR via ISA IRQ1
-SuperIO/PS2/Mouse, using INTR via ISA IRQ12 (mouse not currently supported)
-JP7 is not bus master -- do NOT use -- only 4 pci bus master's allowed -- SouthBridge, JP4, JP5, JP6
-*/
-
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/mm.h>
-#include <linux/swap.h>
-#include <linux/ioport.h>
-#include <linux/sched.h>
-#include <linux/interrupt.h>
-#include <linux/pci.h>
-#include <linux/timex.h>
-#include <asm/bootinfo.h>
-#include <asm/page.h>
-#include <asm/io.h>
-#include <asm/irq.h>
-#include <asm/pci.h>
-#include <asm/processor.h>
-#include <asm/reboot.h>
-#include <asm/time.h>
-#include <asm/wbflush.h>
-#include <linux/bootmem.h>
-#include <linux/blkdev.h>
-#ifdef CONFIG_TOSHIBA_FPCIB0
-#include <asm/i8259.h>
-#include <asm/tx4927/smsc_fdc37m81x.h>
-#endif
-#include <asm/tx4927/toshiba_rbtx4927.h>
-
-
-#undef TOSHIBA_RBTX4927_IRQ_DEBUG
-
-#ifdef TOSHIBA_RBTX4927_IRQ_DEBUG
-#define TOSHIBA_RBTX4927_IRQ_NONE 0x00000000
-
-#define TOSHIBA_RBTX4927_IRQ_INFO ( 1 << 0 )
-#define TOSHIBA_RBTX4927_IRQ_WARN ( 1 << 1 )
-#define TOSHIBA_RBTX4927_IRQ_EROR ( 1 << 2 )
-
-#define TOSHIBA_RBTX4927_IRQ_IOC_INIT ( 1 << 10 )
-#define TOSHIBA_RBTX4927_IRQ_IOC_ENABLE ( 1 << 13 )
-#define TOSHIBA_RBTX4927_IRQ_IOC_DISABLE ( 1 << 14 )
-
-#define TOSHIBA_RBTX4927_SETUP_ALL 0xffffffff
-#endif
-
-
-#ifdef TOSHIBA_RBTX4927_IRQ_DEBUG
-static const u32 toshiba_rbtx4927_irq_debug_flag =
- (TOSHIBA_RBTX4927_IRQ_NONE | TOSHIBA_RBTX4927_IRQ_INFO |
- TOSHIBA_RBTX4927_IRQ_WARN | TOSHIBA_RBTX4927_IRQ_EROR
-// | TOSHIBA_RBTX4927_IRQ_IOC_INIT
-// | TOSHIBA_RBTX4927_IRQ_IOC_ENABLE
-// | TOSHIBA_RBTX4927_IRQ_IOC_DISABLE
- );
-#endif
-
-
-#ifdef TOSHIBA_RBTX4927_IRQ_DEBUG
-#define TOSHIBA_RBTX4927_IRQ_DPRINTK(flag,str...) \
- if ( (toshiba_rbtx4927_irq_debug_flag) & (flag) ) \
- { \
- char tmp[100]; \
- sprintf( tmp, str ); \
- printk( "%s(%s:%u)::%s", __func__, __FILE__, __LINE__, tmp ); \
- }
-#else
-#define TOSHIBA_RBTX4927_IRQ_DPRINTK(flag, str...)
-#endif
-
-
-
-
-#define TOSHIBA_RBTX4927_IRQ_IOC_RAW_BEG 0
-#define TOSHIBA_RBTX4927_IRQ_IOC_RAW_END 7
-
-#define TOSHIBA_RBTX4927_IRQ_IOC_BEG ((TX4927_IRQ_PIC_END+1)+TOSHIBA_RBTX4927_IRQ_IOC_RAW_BEG) /* 56 */
-#define TOSHIBA_RBTX4927_IRQ_IOC_END ((TX4927_IRQ_PIC_END+1)+TOSHIBA_RBTX4927_IRQ_IOC_RAW_END) /* 63 */
-
-#define TOSHIBA_RBTX4927_IRQ_NEST_IOC_ON_PIC TX4927_IRQ_NEST_EXT_ON_PIC
-#define TOSHIBA_RBTX4927_IRQ_NEST_ISA_ON_IOC (TOSHIBA_RBTX4927_IRQ_IOC_BEG+2)
-
-extern int tx4927_using_backplane;
-
-static void toshiba_rbtx4927_irq_ioc_enable(unsigned int irq);
-static void toshiba_rbtx4927_irq_ioc_disable(unsigned int irq);
-
-#define TOSHIBA_RBTX4927_IOC_NAME "RBTX4927-IOC"
-static struct irq_chip toshiba_rbtx4927_irq_ioc_type = {
- .name = TOSHIBA_RBTX4927_IOC_NAME,
- .ack = toshiba_rbtx4927_irq_ioc_disable,
- .mask = toshiba_rbtx4927_irq_ioc_disable,
- .mask_ack = toshiba_rbtx4927_irq_ioc_disable,
- .unmask = toshiba_rbtx4927_irq_ioc_enable,
-};
-#define TOSHIBA_RBTX4927_IOC_INTR_ENAB (void __iomem *)0xbc002000UL
-#define TOSHIBA_RBTX4927_IOC_INTR_STAT (void __iomem *)0xbc002006UL
-
-
-u32 bit2num(u32 num)
-{
- u32 i;
-
- for (i = 0; i < (sizeof(num) * 8); i++) {
- if (num & (1 << i)) {
- return (i);
- }
- }
- return (0);
-}
-
-int toshiba_rbtx4927_irq_nested(int sw_irq)
-{
- u32 level3;
-
- level3 = readb(TOSHIBA_RBTX4927_IOC_INTR_STAT) & 0x1f;
- if (level3) {
- sw_irq = TOSHIBA_RBTX4927_IRQ_IOC_BEG + bit2num(level3);
- if (sw_irq != TOSHIBA_RBTX4927_IRQ_NEST_ISA_ON_IOC) {
- goto RETURN;
- }
- }
-#ifdef CONFIG_TOSHIBA_FPCIB0
- if (tx4927_using_backplane) {
- int irq = i8259_irq();
- if (irq >= 0)
- sw_irq = irq;
- }
-#endif
-
- RETURN:
- return (sw_irq);
-}
-
-static struct irqaction toshiba_rbtx4927_irq_ioc_action = {
- .handler = no_action,
- .flags = IRQF_SHARED,
- .mask = CPU_MASK_NONE,
- .name = TOSHIBA_RBTX4927_IOC_NAME
-};
-
-
-/**********************************************************************************/
-/* Functions for ioc */
-/**********************************************************************************/
-
-
-static void __init toshiba_rbtx4927_irq_ioc_init(void)
-{
- int i;
-
- TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_IOC_INIT,
- "beg=%d end=%d\n",
- TOSHIBA_RBTX4927_IRQ_IOC_BEG,
- TOSHIBA_RBTX4927_IRQ_IOC_END);
-
- for (i = TOSHIBA_RBTX4927_IRQ_IOC_BEG;
- i <= TOSHIBA_RBTX4927_IRQ_IOC_END; i++)
- set_irq_chip_and_handler(i, &toshiba_rbtx4927_irq_ioc_type,
- handle_level_irq);
-
- setup_irq(TOSHIBA_RBTX4927_IRQ_NEST_IOC_ON_PIC,
- &toshiba_rbtx4927_irq_ioc_action);
-}
-
-static void toshiba_rbtx4927_irq_ioc_enable(unsigned int irq)
-{
- volatile unsigned char v;
-
- TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_IOC_ENABLE,
- "irq=%d\n", irq);
-
- if (irq < TOSHIBA_RBTX4927_IRQ_IOC_BEG
- || irq > TOSHIBA_RBTX4927_IRQ_IOC_END) {
- TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_EROR,
- "bad irq=%d\n", irq);
- panic("\n");
- }
-
- v = readb(TOSHIBA_RBTX4927_IOC_INTR_ENAB);
- v |= (1 << (irq - TOSHIBA_RBTX4927_IRQ_IOC_BEG));
- writeb(v, TOSHIBA_RBTX4927_IOC_INTR_ENAB);
-}
-
-
-static void toshiba_rbtx4927_irq_ioc_disable(unsigned int irq)
-{
- volatile unsigned char v;
-
- TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_IOC_DISABLE,
- "irq=%d\n", irq);
-
- if (irq < TOSHIBA_RBTX4927_IRQ_IOC_BEG
- || irq > TOSHIBA_RBTX4927_IRQ_IOC_END) {
- TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_EROR,
- "bad irq=%d\n", irq);
- panic("\n");
- }
-
- v = readb(TOSHIBA_RBTX4927_IOC_INTR_ENAB);
- v &= ~(1 << (irq - TOSHIBA_RBTX4927_IRQ_IOC_BEG));
- writeb(v, TOSHIBA_RBTX4927_IOC_INTR_ENAB);
- mmiowb();
-}
-
-
-void __init arch_init_irq(void)
-{
- extern void tx4927_irq_init(void);
-
- tx4927_irq_init();
- toshiba_rbtx4927_irq_ioc_init();
-#ifdef CONFIG_TOSHIBA_FPCIB0
- if (tx4927_using_backplane)
- init_i8259_irqs();
-#endif
- /* Onboard 10M Ether: High Active */
- set_irq_type(RBTX4927_RTL_8019_IRQ, IRQF_TRIGGER_HIGH);
-
- wbflush();
-}
-
-void toshiba_rbtx4927_irq_dump(char *key)
-{
-#ifdef TOSHIBA_RBTX4927_IRQ_DEBUG
- {
- u32 i, j = 0;
- for (i = 0; i < NR_IRQS; i++) {
- if (strcmp(irq_desc[i].chip->name, "none")
- == 0)
- continue;
-
- if ((i >= 1)
- && (irq_desc[i - 1].chip->name ==
- irq_desc[i].chip->name)) {
- j++;
- } else {
- j = 0;
- }
- TOSHIBA_RBTX4927_IRQ_DPRINTK
- (TOSHIBA_RBTX4927_IRQ_INFO,
- "%s irq=0x%02x/%3d s=0x%08x h=0x%08x a=0x%08x ah=0x%08x d=%1d n=%s/%02d\n",
- key, i, i, irq_desc[i].status,
- (u32) irq_desc[i].chip,
- (u32) irq_desc[i].action,
- (u32) (irq_desc[i].action ? irq_desc[i].
- action->handler : 0),
- irq_desc[i].depth,
- irq_desc[i].chip->name, j);
- }
- }
-#endif
-}
-
-void toshiba_rbtx4927_irq_dump_pics(char *s)
-{
- u32 level0_m;
- u32 level0_s;
- u32 level1_m;
- u32 level1_s;
- u32 level2;
- u32 level2_p;
- u32 level2_s;
- u32 level3_m;
- u32 level3_s;
- u32 level4_m;
- u32 level4_s;
- u32 level5_m;
- u32 level5_s;
-
- if (s == NULL)
- s = "null";
-
- level0_m = (read_c0_status() & 0x0000ff00) >> 8;
- level0_s = (read_c0_cause() & 0x0000ff00) >> 8;
-
- level1_m = level0_m;
- level1_s = level0_s & 0x87;
-
- level2 = __raw_readl((void __iomem *)0xff1ff6a0UL);
- level2_p = (((level2 & 0x10000)) ? 0 : 1);
- level2_s = (((level2 & 0x1f) == 0x1f) ? 0 : (level2 & 0x1f));
-
- level3_m = readb(TOSHIBA_RBTX4927_IOC_INTR_ENAB) & 0x1f;
- level3_s = readb(TOSHIBA_RBTX4927_IOC_INTR_STAT) & 0x1f;
-
- level4_m = inb(0x21);
- outb(0x0A, 0x20);
- level4_s = inb(0x20);
-
- level5_m = inb(0xa1);
- outb(0x0A, 0xa0);
- level5_s = inb(0xa0);
-
- TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_INFO,
- "dump_raw_pic() ");
- TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_INFO,
- "cp0:m=0x%02x/s=0x%02x ", level0_m,
- level0_s);
- TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_INFO,
- "cp0:m=0x%02x/s=0x%02x ", level1_m,
- level1_s);
- TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_INFO,
- "pic:e=0x%02x/s=0x%02x ", level2_p,
- level2_s);
- TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_INFO,
- "ioc:m=0x%02x/s=0x%02x ", level3_m,
- level3_s);
- TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_INFO,
- "sbm:m=0x%02x/s=0x%02x ", level4_m,
- level4_s);
- TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_INFO,
- "sbs:m=0x%02x/s=0x%02x ", level5_m,
- level5_s);
- TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_INFO, "[%s]\n",
- s);
-}
+++ /dev/null
-/*
- * rbtx4927 specific prom routines
- *
- * Author: MontaVista Software, Inc.
- * source@mvista.com
- *
- * Copyright 2001-2002 MontaVista Software Inc.
- *
- * Copyright (C) 2004 MontaVista Software Inc.
- * Author: Manish Lachwani, mlachwani@mvista.com
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
- * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
- * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-#include <linux/init.h>
-#include <linux/mm.h>
-#include <linux/sched.h>
-#include <linux/bootmem.h>
-
-#include <asm/addrspace.h>
-#include <asm/bootinfo.h>
-#include <asm/cpu.h>
-#include <asm/tx4927/tx4927.h>
-
-void __init prom_init_cmdline(void)
-{
- int argc = (int) fw_arg0;
- char **argv = (char **) fw_arg1;
- int i; /* Always ignore the "-c" at argv[0] */
-
- /* ignore all built-in args if any f/w args given */
- if (argc > 1) {
- *arcs_cmdline = '\0';
- }
-
- for (i = 1; i < argc; i++) {
- if (i != 1) {
- strcat(arcs_cmdline, " ");
- }
- strcat(arcs_cmdline, argv[i]);
- }
-}
-
-void __init prom_init(void)
-{
- extern int tx4927_get_mem_size(void);
- extern char* toshiba_name;
- int msize;
-
- prom_init_cmdline();
-
- if ((read_c0_prid() & 0xff) == PRID_REV_TX4927) {
- mips_machtype = MACH_TOSHIBA_RBTX4927;
- toshiba_name = "TX4927";
- } else {
- mips_machtype = MACH_TOSHIBA_RBTX4937;
- toshiba_name = "TX4937";
- }
-
- msize = tx4927_get_mem_size();
- add_memory_region(0, msize << 20, BOOT_MEM_RAM);
-}
-
-void __init prom_free_prom_memory(void)
-{
-}
-
-const char *get_system_type(void)
-{
- return "Toshiba RBTX4927/RBTX4937";
-}
-
-char * __init prom_getcmdline(void)
-{
- return &(arcs_cmdline[0]);
-}
-
+++ /dev/null
-/*
- * Toshiba rbtx4927 specific setup
- *
- * Author: MontaVista Software, Inc.
- * source@mvista.com
- *
- * Copyright 2001-2002 MontaVista Software Inc.
- *
- * Copyright (C) 1996, 97, 2001, 04 Ralf Baechle (ralf@linux-mips.org)
- * Copyright (C) 2000 RidgeRun, Inc.
- * Author: RidgeRun, Inc.
- * glonnon@ridgerun.com, skranz@ridgerun.com, stevej@ridgerun.com
- *
- * Copyright 2001 MontaVista Software Inc.
- * Author: jsun@mvista.com or jsun@junsun.net
- *
- * Copyright 2002 MontaVista Software Inc.
- * Author: Michael Pruznick, michael_pruznick@mvista.com
- *
- * Copyright (C) 2000-2001 Toshiba Corporation
- *
- * Copyright (C) 2004 MontaVista Software Inc.
- * Author: Manish Lachwani, mlachwani@mvista.com
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
- * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
- * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/ioport.h>
-#include <linux/interrupt.h>
-#include <linux/pci.h>
-#include <linux/pm.h>
-#include <linux/platform_device.h>
-#include <linux/clk.h>
-
-#include <asm/bootinfo.h>
-#include <asm/io.h>
-#include <asm/processor.h>
-#include <asm/reboot.h>
-#include <asm/time.h>
-#include <asm/txx9tmr.h>
-#ifdef CONFIG_TOSHIBA_FPCIB0
-#include <asm/tx4927/smsc_fdc37m81x.h>
-#endif
-#include <asm/tx4927/toshiba_rbtx4927.h>
-#ifdef CONFIG_PCI
-#include <asm/tx4927/tx4927_pci.h>
-#endif
-#ifdef CONFIG_SERIAL_TXX9
-#include <linux/serial_core.h>
-#endif
-
-#undef TOSHIBA_RBTX4927_SETUP_DEBUG
-
-#ifdef TOSHIBA_RBTX4927_SETUP_DEBUG
-#define TOSHIBA_RBTX4927_SETUP_SETUP ( 1 << 4 )
-#define TOSHIBA_RBTX4927_SETUP_PCIBIOS ( 1 << 7 )
-#define TOSHIBA_RBTX4927_SETUP_PCI1 ( 1 << 8 )
-#define TOSHIBA_RBTX4927_SETUP_PCI2 ( 1 << 9 )
-
-#define TOSHIBA_RBTX4927_SETUP_ALL 0xffffffff
-#endif
-
-#ifdef TOSHIBA_RBTX4927_SETUP_DEBUG
-static const u32 toshiba_rbtx4927_setup_debug_flag =
- (TOSHIBA_RBTX4927_SETUP_SETUP |
- | TOSHIBA_RBTX4927_SETUP_PCIBIOS | TOSHIBA_RBTX4927_SETUP_PCI1 |
- TOSHIBA_RBTX4927_SETUP_PCI2);
-#endif
-
-#ifdef TOSHIBA_RBTX4927_SETUP_DEBUG
-#define TOSHIBA_RBTX4927_SETUP_DPRINTK(flag,str...) \
- if ( (toshiba_rbtx4927_setup_debug_flag) & (flag) ) \
- { \
- char tmp[100]; \
- sprintf( tmp, str ); \
- printk( "%s(%s:%u)::%s", __func__, __FILE__, __LINE__, tmp ); \
- }
-#else
-#define TOSHIBA_RBTX4927_SETUP_DPRINTK(flag, str...)
-#endif
-
-/* These functions are used for rebooting or halting the machine*/
-extern void toshiba_rbtx4927_restart(char *command);
-extern void toshiba_rbtx4927_halt(void);
-extern void toshiba_rbtx4927_power_off(void);
-
-int tx4927_using_backplane = 0;
-
-extern void toshiba_rbtx4927_irq_setup(void);
-
-char *prom_getcmdline(void);
-
-#ifdef CONFIG_PCI
-#undef TX4927_SUPPORT_COMMAND_IO
-#undef TX4927_SUPPORT_PCI_66
-int tx4927_cpu_clock = 100000000; /* 100MHz */
-unsigned long mips_pci_io_base;
-unsigned long mips_pci_io_size;
-unsigned long mips_pci_mem_base;
-unsigned long mips_pci_mem_size;
-/* for legacy I/O, PCI I/O PCI Bus address must be 0 */
-unsigned long mips_pci_io_pciaddr = 0;
-unsigned long mips_memory_upper;
-static int tx4927_ccfg_toeon = 1;
-static int tx4927_pcic_trdyto = 0; /* default: disabled */
-unsigned long tx4927_ce_base[8];
-void tx4927_reset_pci_pcic(void);
-int tx4927_pci66 = 0; /* 0:auto */
-#endif
-
-char *toshiba_name = "";
-
-#ifdef CONFIG_PCI
-extern struct pci_controller tx4927_controller;
-
-static struct pci_dev *fake_pci_dev(struct pci_controller *hose,
- int top_bus, int busnr, int devfn)
-{
- static struct pci_dev dev;
- static struct pci_bus bus;
-
- dev.sysdata = (void *)hose;
- dev.devfn = devfn;
- bus.number = busnr;
- bus.ops = hose->pci_ops;
- bus.parent = NULL;
- dev.bus = &bus;
-
- return &dev;
-}
-
-#define EARLY_PCI_OP(rw, size, type) \
-static int early_##rw##_config_##size(struct pci_controller *hose, \
- int top_bus, int bus, int devfn, int offset, type value) \
-{ \
- return pci_##rw##_config_##size( \
- fake_pci_dev(hose, top_bus, bus, devfn), \
- offset, value); \
-}
-
-EARLY_PCI_OP(read, byte, u8 *)
-EARLY_PCI_OP(read, dword, u32 *)
-EARLY_PCI_OP(write, byte, u8)
-EARLY_PCI_OP(write, dword, u32)
-
-static int __init tx4927_pcibios_init(void)
-{
- unsigned int id;
- u32 pci_devfn;
- int devfn_start = 0;
- int devfn_stop = 0xff;
- int busno = 0; /* One bus on the Toshiba */
- struct pci_controller *hose = &tx4927_controller;
-
- TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCIBIOS,
- "-\n");
-
- for (pci_devfn = devfn_start; pci_devfn < devfn_stop; pci_devfn++) {
- early_read_config_dword(hose, busno, busno, pci_devfn,
- PCI_VENDOR_ID, &id);
-
- if (id == 0xffffffff) {
- continue;
- }
-
- if (id == 0x94601055) {
- u8 v08_64;
- u32 v32_b0;
- u8 v08_e1;
-#ifdef TOSHIBA_RBTX4927_SETUP_DEBUG
- char *s = " sb/isa --";
-#endif
-
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_PCIBIOS, ":%s beg\n",
- s);
-
- early_read_config_byte(hose, busno, busno,
- pci_devfn, 0x64, &v08_64);
- early_read_config_dword(hose, busno, busno,
- pci_devfn, 0xb0, &v32_b0);
- early_read_config_byte(hose, busno, busno,
- pci_devfn, 0xe1, &v08_e1);
-
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
- ":%s beg 0x64 = 0x%02x\n", s, v08_64);
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
- ":%s beg 0xb0 = 0x%02x\n", s, v32_b0);
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
- ":%s beg 0xe1 = 0x%02x\n", s, v08_e1);
-
- /* serial irq control */
- v08_64 = 0xd0;
-
- /* serial irq pin */
- v32_b0 |= 0x00010000;
-
- /* ide irq on isa14 */
- v08_e1 &= 0xf0;
- v08_e1 |= 0x0d;
-
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
- ":%s mid 0x64 = 0x%02x\n", s, v08_64);
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
- ":%s mid 0xb0 = 0x%02x\n", s, v32_b0);
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
- ":%s mid 0xe1 = 0x%02x\n", s, v08_e1);
-
- early_write_config_byte(hose, busno, busno,
- pci_devfn, 0x64, v08_64);
- early_write_config_dword(hose, busno, busno,
- pci_devfn, 0xb0, v32_b0);
- early_write_config_byte(hose, busno, busno,
- pci_devfn, 0xe1, v08_e1);
-
-#ifdef TOSHIBA_RBTX4927_SETUP_DEBUG
- {
- early_read_config_byte(hose, busno, busno,
- pci_devfn, 0x64,
- &v08_64);
- early_read_config_dword(hose, busno, busno,
- pci_devfn, 0xb0,
- &v32_b0);
- early_read_config_byte(hose, busno, busno,
- pci_devfn, 0xe1,
- &v08_e1);
-
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
- ":%s end 0x64 = 0x%02x\n", s, v08_64);
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
- ":%s end 0xb0 = 0x%02x\n", s, v32_b0);
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
- ":%s end 0xe1 = 0x%02x\n", s, v08_e1);
- }
-#endif
-
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_PCIBIOS, ":%s end\n",
- s);
- }
-
- if (id == 0x91301055) {
- u8 v08_04;
- u8 v08_09;
- u8 v08_41;
- u8 v08_43;
- u8 v08_5c;
-#ifdef TOSHIBA_RBTX4927_SETUP_DEBUG
- char *s = " sb/ide --";
-#endif
-
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_PCIBIOS, ":%s beg\n",
- s);
-
- early_read_config_byte(hose, busno, busno,
- pci_devfn, 0x04, &v08_04);
- early_read_config_byte(hose, busno, busno,
- pci_devfn, 0x09, &v08_09);
- early_read_config_byte(hose, busno, busno,
- pci_devfn, 0x41, &v08_41);
- early_read_config_byte(hose, busno, busno,
- pci_devfn, 0x43, &v08_43);
- early_read_config_byte(hose, busno, busno,
- pci_devfn, 0x5c, &v08_5c);
-
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
- ":%s beg 0x04 = 0x%02x\n", s, v08_04);
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
- ":%s beg 0x09 = 0x%02x\n", s, v08_09);
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
- ":%s beg 0x41 = 0x%02x\n", s, v08_41);
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
- ":%s beg 0x43 = 0x%02x\n", s, v08_43);
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
- ":%s beg 0x5c = 0x%02x\n", s, v08_5c);
-
- /* enable ide master/io */
- v08_04 |= (PCI_COMMAND_MASTER | PCI_COMMAND_IO);
-
- /* enable ide native mode */
- v08_09 |= 0x05;
-
- /* enable primary ide */
- v08_41 |= 0x80;
-
- /* enable secondary ide */
- v08_43 |= 0x80;
-
- /*
- * !!! DO NOT REMOVE THIS COMMENT IT IS REQUIRED BY SMSC !!!
- *
- * This line of code is intended to provide the user with a work
- * around solution to the anomalies cited in SMSC's anomaly sheet
- * entitled, "SLC90E66 Functional Rev.J_0.1 Anomalies"".
- *
- * !!! DO NOT REMOVE THIS COMMENT IT IS REQUIRED BY SMSC !!!
- */
- v08_5c |= 0x01;
-
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
- ":%s mid 0x04 = 0x%02x\n", s, v08_04);
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
- ":%s mid 0x09 = 0x%02x\n", s, v08_09);
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
- ":%s mid 0x41 = 0x%02x\n", s, v08_41);
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
- ":%s mid 0x43 = 0x%02x\n", s, v08_43);
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
- ":%s mid 0x5c = 0x%02x\n", s, v08_5c);
-
- early_write_config_byte(hose, busno, busno,
- pci_devfn, 0x5c, v08_5c);
- early_write_config_byte(hose, busno, busno,
- pci_devfn, 0x04, v08_04);
- early_write_config_byte(hose, busno, busno,
- pci_devfn, 0x09, v08_09);
- early_write_config_byte(hose, busno, busno,
- pci_devfn, 0x41, v08_41);
- early_write_config_byte(hose, busno, busno,
- pci_devfn, 0x43, v08_43);
-
-#ifdef TOSHIBA_RBTX4927_SETUP_DEBUG
- {
- early_read_config_byte(hose, busno, busno,
- pci_devfn, 0x04,
- &v08_04);
- early_read_config_byte(hose, busno, busno,
- pci_devfn, 0x09,
- &v08_09);
- early_read_config_byte(hose, busno, busno,
- pci_devfn, 0x41,
- &v08_41);
- early_read_config_byte(hose, busno, busno,
- pci_devfn, 0x43,
- &v08_43);
- early_read_config_byte(hose, busno, busno,
- pci_devfn, 0x5c,
- &v08_5c);
-
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
- ":%s end 0x04 = 0x%02x\n", s, v08_04);
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
- ":%s end 0x09 = 0x%02x\n", s, v08_09);
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
- ":%s end 0x41 = 0x%02x\n", s, v08_41);
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
- ":%s end 0x43 = 0x%02x\n", s, v08_43);
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
- ":%s end 0x5c = 0x%02x\n", s, v08_5c);
- }
-#endif
-
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_PCIBIOS, ":%s end\n",
- s);
- }
-
- }
-
- register_pci_controller(&tx4927_controller);
- TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCIBIOS,
- "+\n");
-
- return 0;
-}
-
-arch_initcall(tx4927_pcibios_init);
-
-extern struct resource pci_io_resource;
-extern struct resource pci_mem_resource;
-
-void __init tx4927_pci_setup(void)
-{
- static int called = 0;
- extern unsigned int tx4927_get_mem_size(void);
-
- TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI2, "-\n");
-
- mips_memory_upper = tx4927_get_mem_size() << 20;
- mips_memory_upper += KSEG0;
- TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI2,
- "0x%08lx=mips_memory_upper\n",
- mips_memory_upper);
- mips_pci_io_base = TX4927_PCIIO;
- mips_pci_io_size = TX4927_PCIIO_SIZE;
- mips_pci_mem_base = TX4927_PCIMEM;
- mips_pci_mem_size = TX4927_PCIMEM_SIZE;
-
- TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI2,
- "0x%08lx=mips_pci_io_base\n",
- mips_pci_io_base);
- TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI2,
- "0x%08lx=mips_pci_io_size\n",
- mips_pci_io_size);
- TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI2,
- "0x%08lx=mips_pci_mem_base\n",
- mips_pci_mem_base);
- TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI2,
- "0x%08lx=mips_pci_mem_size\n",
- mips_pci_mem_size);
- TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI2,
- "0x%08lx=pci_io_resource.start\n",
- pci_io_resource.start);
- TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI2,
- "0x%08lx=pci_io_resource.end\n",
- pci_io_resource.end);
- TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI2,
- "0x%08lx=pci_mem_resource.start\n",
- pci_mem_resource.start);
- TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI2,
- "0x%08lx=pci_mem_resource.end\n",
- pci_mem_resource.end);
- TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI2,
- "0x%08lx=mips_io_port_base",
- mips_io_port_base);
- if (!called) {
- printk
- ("%s PCIC -- DID:%04x VID:%04x RID:%02x Arbiter:%s\n",
- toshiba_name,
- (unsigned short) (tx4927_pcicptr->pciid >> 16),
- (unsigned short) (tx4927_pcicptr->pciid & 0xffff),
- (unsigned short) (tx4927_pcicptr->pciccrev & 0xff),
- (!(tx4927_ccfgptr->
- ccfg & TX4927_CCFG_PCIXARB)) ? "External" :
- "Internal");
- called = 1;
- }
- printk("%s PCIC --%s PCICLK:", toshiba_name,
- (tx4927_ccfgptr->ccfg & TX4927_CCFG_PCI66) ? " PCI66" : "");
- if (tx4927_ccfgptr->pcfg & TX4927_PCFG_PCICLKEN_ALL) {
- int pciclk = 0;
- if (mips_machtype == MACH_TOSHIBA_RBTX4937)
- switch ((unsigned long) tx4927_ccfgptr->
- ccfg & TX4937_CCFG_PCIDIVMODE_MASK) {
- case TX4937_CCFG_PCIDIVMODE_4:
- pciclk = tx4927_cpu_clock / 4;
- break;
- case TX4937_CCFG_PCIDIVMODE_4_5:
- pciclk = tx4927_cpu_clock * 2 / 9;
- break;
- case TX4937_CCFG_PCIDIVMODE_5:
- pciclk = tx4927_cpu_clock / 5;
- break;
- case TX4937_CCFG_PCIDIVMODE_5_5:
- pciclk = tx4927_cpu_clock * 2 / 11;
- break;
- case TX4937_CCFG_PCIDIVMODE_8:
- pciclk = tx4927_cpu_clock / 8;
- break;
- case TX4937_CCFG_PCIDIVMODE_9:
- pciclk = tx4927_cpu_clock / 9;
- break;
- case TX4937_CCFG_PCIDIVMODE_10:
- pciclk = tx4927_cpu_clock / 10;
- break;
- case TX4937_CCFG_PCIDIVMODE_11:
- pciclk = tx4927_cpu_clock / 11;
- break;
- }
-
- else
- switch ((unsigned long) tx4927_ccfgptr->
- ccfg & TX4927_CCFG_PCIDIVMODE_MASK) {
- case TX4927_CCFG_PCIDIVMODE_2_5:
- pciclk = tx4927_cpu_clock * 2 / 5;
- break;
- case TX4927_CCFG_PCIDIVMODE_3:
- pciclk = tx4927_cpu_clock / 3;
- break;
- case TX4927_CCFG_PCIDIVMODE_5:
- pciclk = tx4927_cpu_clock / 5;
- break;
- case TX4927_CCFG_PCIDIVMODE_6:
- pciclk = tx4927_cpu_clock / 6;
- break;
- }
-
- printk("Internal(%dMHz)", pciclk / 1000000);
- } else {
- int pciclk = 0;
- int pciclk_setting = *tx4927_pci_clk_ptr;
- switch (pciclk_setting & TX4927_PCI_CLK_MASK) {
- case TX4927_PCI_CLK_33:
- pciclk = 33333333;
- break;
- case TX4927_PCI_CLK_25:
- pciclk = 25000000;
- break;
- case TX4927_PCI_CLK_66:
- pciclk = 66666666;
- break;
- case TX4927_PCI_CLK_50:
- pciclk = 50000000;
- break;
- }
- printk("External(%dMHz)", pciclk / 1000000);
- }
- printk("\n");
-
-
-
- /* GB->PCI mappings */
- tx4927_pcicptr->g2piomask = (mips_pci_io_size - 1) >> 4;
- tx4927_pcicptr->g2piogbase = mips_pci_io_base |
-#ifdef __BIG_ENDIAN
- TX4927_PCIC_G2PIOGBASE_ECHG
-#else
- TX4927_PCIC_G2PIOGBASE_BSDIS
-#endif
- ;
-
- tx4927_pcicptr->g2piopbase = 0;
-
- tx4927_pcicptr->g2pmmask[0] = (mips_pci_mem_size - 1) >> 4;
- tx4927_pcicptr->g2pmgbase[0] = mips_pci_mem_base |
-#ifdef __BIG_ENDIAN
- TX4927_PCIC_G2PMnGBASE_ECHG
-#else
- TX4927_PCIC_G2PMnGBASE_BSDIS
-#endif
- ;
- tx4927_pcicptr->g2pmpbase[0] = mips_pci_mem_base;
-
- tx4927_pcicptr->g2pmmask[1] = 0;
- tx4927_pcicptr->g2pmgbase[1] = 0;
- tx4927_pcicptr->g2pmpbase[1] = 0;
- tx4927_pcicptr->g2pmmask[2] = 0;
- tx4927_pcicptr->g2pmgbase[2] = 0;
- tx4927_pcicptr->g2pmpbase[2] = 0;
-
-
- /* PCI->GB mappings (I/O 256B) */
- tx4927_pcicptr->p2giopbase = 0; /* 256B */
-
- /* PCI->GB mappings (MEM 512MB) M0 gets all of memory */
- tx4927_pcicptr->p2gm0plbase = 0;
- tx4927_pcicptr->p2gm0pubase = 0;
- tx4927_pcicptr->p2gmgbase[0] = 0 | TX4927_PCIC_P2GMnGBASE_TMEMEN |
-#ifdef __BIG_ENDIAN
- TX4927_PCIC_P2GMnGBASE_TECHG
-#else
- TX4927_PCIC_P2GMnGBASE_TBSDIS
-#endif
- ;
-
- /* PCI->GB mappings (MEM 16MB) -not used */
- tx4927_pcicptr->p2gm1plbase = 0xffffffff;
- tx4927_pcicptr->p2gm1pubase = 0xffffffff;
- tx4927_pcicptr->p2gmgbase[1] = 0;
-
- /* PCI->GB mappings (MEM 1MB) -not used */
- tx4927_pcicptr->p2gm2pbase = 0xffffffff;
- tx4927_pcicptr->p2gmgbase[2] = 0;
-
-
- /* Enable Initiator Memory 0 Space, I/O Space, Config */
- tx4927_pcicptr->pciccfg &= TX4927_PCIC_PCICCFG_LBWC_MASK;
- tx4927_pcicptr->pciccfg |=
- TX4927_PCIC_PCICCFG_IMSE0 | TX4927_PCIC_PCICCFG_IISE |
- TX4927_PCIC_PCICCFG_ICAE | TX4927_PCIC_PCICCFG_ATR;
-
-
- /* Do not use MEMMUL, MEMINF: YMFPCI card causes M_ABORT. */
- tx4927_pcicptr->pcicfg1 = 0;
-
- if (tx4927_pcic_trdyto >= 0) {
- tx4927_pcicptr->g2ptocnt &= ~0xff;
- tx4927_pcicptr->g2ptocnt |= (tx4927_pcic_trdyto & 0xff);
- }
-
- /* Clear All Local Bus Status */
- tx4927_pcicptr->pcicstatus = TX4927_PCIC_PCICSTATUS_ALL;
- /* Enable All Local Bus Interrupts */
- tx4927_pcicptr->pcicmask = TX4927_PCIC_PCICSTATUS_ALL;
- /* Clear All Initiator Status */
- tx4927_pcicptr->g2pstatus = TX4927_PCIC_G2PSTATUS_ALL;
- /* Enable All Initiator Interrupts */
- tx4927_pcicptr->g2pmask = TX4927_PCIC_G2PSTATUS_ALL;
- /* Clear All PCI Status Error */
- tx4927_pcicptr->pcistatus =
- (tx4927_pcicptr->pcistatus & 0x0000ffff) |
- (TX4927_PCIC_PCISTATUS_ALL << 16);
- /* Enable All PCI Status Error Interrupts */
- tx4927_pcicptr->pcimask = TX4927_PCIC_PCISTATUS_ALL;
-
- /* PCIC Int => IRC IRQ16 */
- tx4927_pcicptr->pcicfg2 =
- (tx4927_pcicptr->pcicfg2 & 0xffffff00) | TX4927_IR_PCIC;
-
- if (!(tx4927_ccfgptr->ccfg & TX4927_CCFG_PCIXARB)) {
- /* XXX */
- } else {
- /* Reset Bus Arbiter */
- tx4927_pcicptr->pbacfg = TX4927_PCIC_PBACFG_RPBA;
- /* Enable Bus Arbiter */
- tx4927_pcicptr->pbacfg = TX4927_PCIC_PBACFG_PBAEN;
- }
-
- tx4927_pcicptr->pcistatus = PCI_COMMAND_MASTER |
- PCI_COMMAND_MEMORY |
- PCI_COMMAND_PARITY | PCI_COMMAND_SERR;
-
- TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI2,
- ":pci setup complete:\n");
- TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI2, "+\n");
-}
-
-#endif /* CONFIG_PCI */
-
-static void __noreturn wait_forever(void)
-{
- while (1)
- if (cpu_wait)
- (*cpu_wait)();
-}
-
-void toshiba_rbtx4927_restart(char *command)
-{
- printk(KERN_NOTICE "System Rebooting...\n");
-
- /* enable the s/w reset register */
- writeb(RBTX4927_SW_RESET_ENABLE_SET, RBTX4927_SW_RESET_ENABLE);
-
- /* wait for enable to be seen */
- while ((readb(RBTX4927_SW_RESET_ENABLE) &
- RBTX4927_SW_RESET_ENABLE_SET) == 0x00);
-
- /* do a s/w reset */
- writeb(RBTX4927_SW_RESET_DO_SET, RBTX4927_SW_RESET_DO);
-
- /* do something passive while waiting for reset */
- local_irq_disable();
- wait_forever();
- /* no return */
-}
-
-
-void toshiba_rbtx4927_halt(void)
-{
- printk(KERN_NOTICE "System Halted\n");
- local_irq_disable();
- wait_forever();
- /* no return */
-}
-
-void toshiba_rbtx4927_power_off(void)
-{
- toshiba_rbtx4927_halt();
- /* no return */
-}
-
-void __init plat_mem_setup(void)
-{
- int i;
- u32 cp0_config;
- char *argptr;
-
- printk("CPU is %s\n", toshiba_name);
-
- TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_SETUP,
- "-\n");
-
- /* f/w leaves this on at startup */
- TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_SETUP,
- ":Clearing STO_ERL.\n");
- clear_c0_status(ST0_ERL);
-
- /* enable caches -- HCP5 does this, pmon does not */
- TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_SETUP,
- ":Enabling TX49_CONF_IC,TX49_CONF_DC.\n");
- cp0_config = read_c0_config();
- cp0_config = cp0_config & ~(TX49_CONF_IC | TX49_CONF_DC);
- write_c0_config(cp0_config);
-
- set_io_port_base(KSEG1 + TBTX4927_ISA_IO_OFFSET);
- TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_SETUP,
- ":mips_io_port_base=0x%08lx\n",
- mips_io_port_base);
-
- TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_SETUP,
- ":Resource\n");
- ioport_resource.end = 0xffffffff;
- iomem_resource.end = 0xffffffff;
-
- TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_SETUP,
- ":ResetRoutines\n");
- _machine_restart = toshiba_rbtx4927_restart;
- _machine_halt = toshiba_rbtx4927_halt;
- pm_power_off = toshiba_rbtx4927_power_off;
-
- for (i = 0; i < TX4927_NR_TMR; i++)
- txx9_tmr_init(TX4927_TMR_REG(0) & 0xfffffffffULL);
-
-#ifdef CONFIG_PCI
-
- /* PCIC */
- /*
- * ASSUMPTION: PCIDIVMODE is configured for PCI 33MHz or 66MHz.
- *
- * For TX4927:
- * PCIDIVMODE[12:11]'s initial value is given by S9[4:3] (ON:0, OFF:1).
- * CPU 166MHz: PCI 66MHz : PCIDIVMODE: 00 (1/2.5)
- * CPU 200MHz: PCI 66MHz : PCIDIVMODE: 01 (1/3)
- * CPU 166MHz: PCI 33MHz : PCIDIVMODE: 10 (1/5)
- * CPU 200MHz: PCI 33MHz : PCIDIVMODE: 11 (1/6)
- * i.e. S9[3]: ON (83MHz), OFF (100MHz)
- *
- * For TX4937:
- * PCIDIVMODE[12:11]'s initial value is given by S1[5:4] (ON:0, OFF:1)
- * PCIDIVMODE[10] is 0.
- * CPU 266MHz: PCI 33MHz : PCIDIVMODE: 000 (1/8)
- * CPU 266MHz: PCI 66MHz : PCIDIVMODE: 001 (1/4)
- * CPU 300MHz: PCI 33MHz : PCIDIVMODE: 010 (1/9)
- * CPU 300MHz: PCI 66MHz : PCIDIVMODE: 011 (1/4.5)
- * CPU 333MHz: PCI 33MHz : PCIDIVMODE: 100 (1/10)
- * CPU 333MHz: PCI 66MHz : PCIDIVMODE: 101 (1/5)
- *
- */
- TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI1,
- "ccfg is %lx, PCIDIVMODE is %x\n",
- (unsigned long) tx4927_ccfgptr->ccfg,
- (unsigned long) tx4927_ccfgptr->ccfg &
- (mips_machtype == MACH_TOSHIBA_RBTX4937 ?
- TX4937_CCFG_PCIDIVMODE_MASK :
- TX4927_CCFG_PCIDIVMODE_MASK));
-
- TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI1,
- "PCI66 mode is %lx, PCI mode is %lx, pci arb is %lx\n",
- (unsigned long) tx4927_ccfgptr->
- ccfg & TX4927_CCFG_PCI66,
- (unsigned long) tx4927_ccfgptr->
- ccfg & TX4927_CCFG_PCIMIDE,
- (unsigned long) tx4927_ccfgptr->
- ccfg & TX4927_CCFG_PCIXARB);
-
- if (mips_machtype == MACH_TOSHIBA_RBTX4937)
- switch ((unsigned long)tx4927_ccfgptr->
- ccfg & TX4937_CCFG_PCIDIVMODE_MASK) {
- case TX4937_CCFG_PCIDIVMODE_8:
- case TX4937_CCFG_PCIDIVMODE_4:
- tx4927_cpu_clock = 266666666; /* 266MHz */
- break;
- case TX4937_CCFG_PCIDIVMODE_9:
- case TX4937_CCFG_PCIDIVMODE_4_5:
- tx4927_cpu_clock = 300000000; /* 300MHz */
- break;
- default:
- tx4927_cpu_clock = 333333333; /* 333MHz */
- }
- else
- switch ((unsigned long)tx4927_ccfgptr->
- ccfg & TX4927_CCFG_PCIDIVMODE_MASK) {
- case TX4927_CCFG_PCIDIVMODE_2_5:
- case TX4927_CCFG_PCIDIVMODE_5:
- tx4927_cpu_clock = 166666666; /* 166MHz */
- break;
- default:
- tx4927_cpu_clock = 200000000; /* 200MHz */
- }
-
- /* CCFG */
- /* do reset on watchdog */
- tx4927_ccfgptr->ccfg |= TX4927_CCFG_WR;
- /* enable Timeout BusError */
- if (tx4927_ccfg_toeon)
- tx4927_ccfgptr->ccfg |= TX4927_CCFG_TOE;
-
- tx4927_pci_setup();
- if (tx4927_using_backplane == 1)
- printk("backplane board IS installed\n");
- else
- printk("No Backplane \n");
-
- /* this is on ISA bus behind PCI bus, so need PCI up first */
-#ifdef CONFIG_TOSHIBA_FPCIB0
- {
- if (tx4927_using_backplane) {
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_SETUP,
- ":fpcibo=yes\n");
-
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_SETUP,
- ":smsc_fdc37m81x_init()\n");
- smsc_fdc37m81x_init(0x3f0);
-
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_SETUP,
- ":smsc_fdc37m81x_config_beg()\n");
- smsc_fdc37m81x_config_beg();
-
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_SETUP,
- ":smsc_fdc37m81x_config_set(KBD)\n");
- smsc_fdc37m81x_config_set(SMSC_FDC37M81X_DNUM,
- SMSC_FDC37M81X_KBD);
- smsc_fdc37m81x_config_set(SMSC_FDC37M81X_INT, 1);
- smsc_fdc37m81x_config_set(SMSC_FDC37M81X_INT2, 12);
- smsc_fdc37m81x_config_set(SMSC_FDC37M81X_ACTIVE,
- 1);
-
- smsc_fdc37m81x_config_end();
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_SETUP,
- ":smsc_fdc37m81x_config_end()\n");
- } else {
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_SETUP,
- ":fpcibo=not_found\n");
- }
- }
-#else
- {
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_SETUP, ":fpcibo=no\n");
- }
-#endif
-
-#endif /* CONFIG_PCI */
-
-#ifdef CONFIG_SERIAL_TXX9
- {
- extern int early_serial_txx9_setup(struct uart_port *port);
- struct uart_port req;
- for(i = 0; i < 2; i++) {
- memset(&req, 0, sizeof(req));
- req.line = i;
- req.iotype = UPIO_MEM;
- req.membase = (char *)(0xff1ff300 + i * 0x100);
- req.mapbase = 0xff1ff300 + i * 0x100;
- req.irq = TX4927_IRQ_PIC_BEG + 8 + i;
- req.flags |= UPF_BUGGY_UART /*HAVE_CTS_LINE*/;
- req.uartclk = 50000000;
- early_serial_txx9_setup(&req);
- }
- }
-#ifdef CONFIG_SERIAL_TXX9_CONSOLE
- argptr = prom_getcmdline();
- if (strstr(argptr, "console=") == NULL) {
- strcat(argptr, " console=ttyS0,38400");
- }
-#endif
-#endif
-
-#ifdef CONFIG_ROOT_NFS
- argptr = prom_getcmdline();
- if (strstr(argptr, "root=") == NULL) {
- strcat(argptr, " root=/dev/nfs rw");
- }
-#endif
-
-
-#ifdef CONFIG_IP_PNP
- argptr = prom_getcmdline();
- if (strstr(argptr, "ip=") == NULL) {
- strcat(argptr, " ip=any");
- }
-#endif
-
-
- TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_SETUP,
- "+\n");
-}
-
-void __init plat_time_init(void)
-{
- mips_hpt_frequency = tx4927_cpu_clock / 2;
- if (tx4927_ccfgptr->ccfg & TX4927_CCFG_TINTDIS)
- txx9_clockevent_init(TX4927_TMR_REG(0) & 0xfffffffffULL,
- TXX9_IRQ_BASE + 17,
- 50000000);
-}
-
-static int __init toshiba_rbtx4927_rtc_init(void)
-{
- static struct resource __initdata res = {
- .start = 0x1c010000,
- .end = 0x1c010000 + 0x800 - 1,
- .flags = IORESOURCE_MEM,
- };
- struct platform_device *dev =
- platform_device_register_simple("rtc-ds1742", -1, &res, 1);
- return IS_ERR(dev) ? PTR_ERR(dev) : 0;
-}
-device_initcall(toshiba_rbtx4927_rtc_init);
-
-static int __init rbtx4927_ne_init(void)
-{
- static struct resource __initdata res[] = {
- {
- .start = RBTX4927_RTL_8019_BASE,
- .end = RBTX4927_RTL_8019_BASE + 0x20 - 1,
- .flags = IORESOURCE_IO,
- }, {
- .start = RBTX4927_RTL_8019_IRQ,
- .flags = IORESOURCE_IRQ,
- }
- };
- struct platform_device *dev =
- platform_device_register_simple("ne", -1,
- res, ARRAY_SIZE(res));
- return IS_ERR(dev) ? PTR_ERR(dev) : 0;
-}
-device_initcall(rbtx4927_ne_init);
-
-/* Watchdog support */
-
-static int __init txx9_wdt_init(unsigned long base)
-{
- struct resource res = {
- .start = base,
- .end = base + 0x100 - 1,
- .flags = IORESOURCE_MEM,
- };
- struct platform_device *dev =
- platform_device_register_simple("txx9wdt", -1, &res, 1);
- return IS_ERR(dev) ? PTR_ERR(dev) : 0;
-}
-
-static int __init rbtx4927_wdt_init(void)
-{
- return txx9_wdt_init(TX4927_TMR_REG(2) & 0xfffffffffULL);
-}
-device_initcall(rbtx4927_wdt_init);
-
-/* Minimum CLK support */
-
-struct clk *clk_get(struct device *dev, const char *id)
-{
- if (!strcmp(id, "imbus_clk"))
- return (struct clk *)50000000;
- return ERR_PTR(-ENOENT);
-}
-EXPORT_SYMBOL(clk_get);
-
-int clk_enable(struct clk *clk)
-{
- return 0;
-}
-EXPORT_SYMBOL(clk_enable);
-
-void clk_disable(struct clk *clk)
-{
-}
-EXPORT_SYMBOL(clk_disable);
-
-unsigned long clk_get_rate(struct clk *clk)
-{
- return (unsigned long)clk;
-}
-EXPORT_SYMBOL(clk_get_rate);
-
-void clk_put(struct clk *clk)
-{
-}
-EXPORT_SYMBOL(clk_put);
+++ /dev/null
-if TOSHIBA_RBTX4938
-
-comment "Multiplex Pin Select"
-choice
- prompt "PIO[58:61]"
- default TOSHIBA_RBTX4938_MPLEX_PIO58_61
-
-config TOSHIBA_RBTX4938_MPLEX_PIO58_61
- bool "PIO"
-config TOSHIBA_RBTX4938_MPLEX_NAND
- bool "NAND"
-config TOSHIBA_RBTX4938_MPLEX_ATA
- bool "ATA"
-
-endchoice
-
-config TX4938_NAND_BOOT
- depends on EXPERIMENTAL && TOSHIBA_RBTX4938_MPLEX_NAND
- bool "NAND Boot Support (EXPERIMENTAL)"
- help
- This is only for Toshiba RBTX4938 reference board, which has NAND IPL.
- Select this option if you need to use NAND boot.
-
-endif
+++ /dev/null
-#
-# Makefile for common code for Toshiba TX4927 based systems
-#
-
-obj-y += prom.o irq.o
-obj-$(CONFIG_KGDB) += dbgio.o
-
-EXTRA_CFLAGS += -Werror
+++ /dev/null
-/*
- * linux/arch/mips/tx4938/common/irq.c
- *
- * Common tx4938 irq handler
- * Copyright (C) 2000-2001 Toshiba Corporation
- *
- * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
- * terms of the GNU General Public License version 2. This program is
- * licensed "as is" without any warranty of any kind, whether express
- * or implied.
- *
- * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
- */
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <asm/irq_cpu.h>
-#include <asm/mipsregs.h>
-#include <asm/tx4938/rbtx4938.h>
-
-void __init
-tx4938_irq_init(void)
-{
- mips_cpu_irq_init();
- txx9_irq_init(TX4938_IRC_REG);
- set_irq_chained_handler(TX4938_IRQ_NEST_PIC_ON_CP0, handle_simple_irq);
-}
-
-int toshiba_rbtx4938_irq_nested(int irq);
-
-asmlinkage void plat_irq_dispatch(void)
-{
- unsigned int pending = read_c0_cause() & read_c0_status();
-
- if (pending & STATUSF_IP7)
- do_IRQ(TX4938_IRQ_CPU_TIMER);
- else if (pending & STATUSF_IP2) {
- int irq = txx9_irq();
- if (irq == TX4938_IRQ_PIC_BEG + TX4938_IR_INT(0))
- irq = toshiba_rbtx4938_irq_nested(irq);
- if (irq >= 0)
- do_IRQ(irq);
- else
- spurious_interrupt();
- } else if (pending & STATUSF_IP1)
- do_IRQ(TX4938_IRQ_USER1);
- else if (pending & STATUSF_IP0)
- do_IRQ(TX4938_IRQ_USER0);
-}
+++ /dev/null
-/*
- * linux/arch/mips/tx4938/toshiba_rbtx4938/prom.c
- *
- * rbtx4938 specific prom routines
- * Copyright (C) 2000-2001 Toshiba Corporation
- *
- * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
- * terms of the GNU General Public License version 2. This program is
- * licensed "as is" without any warranty of any kind, whether express
- * or implied.
- *
- * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
- */
-
-#include <linux/init.h>
-#include <linux/mm.h>
-#include <linux/sched.h>
-#include <linux/bootmem.h>
-
-#include <asm/addrspace.h>
-#include <asm/bootinfo.h>
-#include <asm/tx4938/tx4938.h>
-
-void __init prom_init_cmdline(void)
-{
- int argc = (int) fw_arg0;
- char **argv = (char **) fw_arg1;
- int i;
-
- /* ignore all built-in args if any f/w args given */
- if (argc > 1) {
- *arcs_cmdline = '\0';
- }
-
- for (i = 1; i < argc; i++) {
- if (i != 1) {
- strcat(arcs_cmdline, " ");
- }
- strcat(arcs_cmdline, argv[i]);
- }
-}
-
-void __init prom_init(void)
-{
- extern int tx4938_get_mem_size(void);
- int msize;
-#ifndef CONFIG_TX4938_NAND_BOOT
- prom_init_cmdline();
-#endif
-
- msize = tx4938_get_mem_size();
- add_memory_region(0, msize << 20, BOOT_MEM_RAM);
-
- return;
-}
-
-void __init prom_free_prom_memory(void)
-{
-}
-
-void __init prom_fixup_mem_map(unsigned long start, unsigned long end)
-{
- return;
-}
-
-const char *get_system_type(void)
-{
- return "Toshiba RBTX4938";
-}
-
-char * __init prom_getcmdline(void)
-{
- return &(arcs_cmdline[0]);
-}
+++ /dev/null
-/*
- * linux/arch/mips/tx4938/toshiba_rbtx4938/setup.c
- *
- * Setup pointers to hardware-dependent routines.
- * Copyright (C) 2000-2001 Toshiba Corporation
- *
- * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
- * terms of the GNU General Public License version 2. This program is
- * licensed "as is" without any warranty of any kind, whether express
- * or implied.
- *
- * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
- */
-#include <linux/init.h>
-#include <linux/types.h>
-#include <linux/ioport.h>
-#include <linux/delay.h>
-#include <linux/interrupt.h>
-#include <linux/console.h>
-#include <linux/pci.h>
-#include <linux/pm.h>
-#include <linux/platform_device.h>
-#include <linux/clk.h>
-#include <linux/gpio.h>
-
-#include <asm/reboot.h>
-#include <asm/time.h>
-#include <asm/txx9tmr.h>
-#include <asm/io.h>
-#include <asm/bootinfo.h>
-#include <asm/tx4938/rbtx4938.h>
-#ifdef CONFIG_SERIAL_TXX9
-#include <linux/serial_core.h>
-#endif
-#include <linux/spi/spi.h>
-#include <asm/tx4938/spi.h>
-#include <asm/txx9pio.h>
-
-extern char * __init prom_getcmdline(void);
-static inline void tx4938_report_pcic_status1(struct tx4938_pcic_reg *pcicptr);
-
-/* These functions are used for rebooting or halting the machine*/
-extern void rbtx4938_machine_restart(char *command);
-extern void rbtx4938_machine_halt(void);
-extern void rbtx4938_machine_power_off(void);
-
-/* clocks */
-unsigned int txx9_master_clock;
-unsigned int txx9_cpu_clock;
-unsigned int txx9_gbus_clock;
-
-unsigned long rbtx4938_ce_base[8];
-unsigned long rbtx4938_ce_size[8];
-int txboard_pci66_mode;
-static int tx4938_pcic_trdyto; /* default: disabled */
-static int tx4938_pcic_retryto; /* default: disabled */
-static int tx4938_ccfg_toeon = 1;
-
-struct tx4938_pcic_reg *pcicptrs[4] = {
- tx4938_pcicptr /* default setting for TX4938 */
-};
-
-static struct {
- unsigned long base;
- unsigned long size;
-} phys_regions[16] __initdata;
-static int num_phys_regions __initdata;
-
-#define PHYS_REGION_MINSIZE 0x10000
-
-void rbtx4938_machine_halt(void)
-{
- printk(KERN_NOTICE "System Halted\n");
- local_irq_disable();
-
- while (1)
- __asm__(".set\tmips3\n\t"
- "wait\n\t"
- ".set\tmips0");
-}
-
-void rbtx4938_machine_power_off(void)
-{
- rbtx4938_machine_halt();
- /* no return */
-}
-
-void rbtx4938_machine_restart(char *command)
-{
- local_irq_disable();
-
- printk("Rebooting...");
- writeb(1, rbtx4938_softresetlock_addr);
- writeb(1, rbtx4938_sfvol_addr);
- writeb(1, rbtx4938_softreset_addr);
- while(1)
- ;
-}
-
-void __init
-txboard_add_phys_region(unsigned long base, unsigned long size)
-{
- if (num_phys_regions >= ARRAY_SIZE(phys_regions)) {
- printk("phys_region overflow\n");
- return;
- }
- phys_regions[num_phys_regions].base = base;
- phys_regions[num_phys_regions].size = size;
- num_phys_regions++;
-}
-unsigned long __init
-txboard_find_free_phys_region(unsigned long begin, unsigned long end,
- unsigned long size)
-{
- unsigned long base;
- int i;
-
- for (base = begin / size * size; base < end; base += size) {
- for (i = 0; i < num_phys_regions; i++) {
- if (phys_regions[i].size &&
- base <= phys_regions[i].base + (phys_regions[i].size - 1) &&
- base + (size - 1) >= phys_regions[i].base)
- break;
- }
- if (i == num_phys_regions)
- return base;
- }
- return 0;
-}
-unsigned long __init
-txboard_find_free_phys_region_shrink(unsigned long begin, unsigned long end,
- unsigned long *size)
-{
- unsigned long sz, base;
- for (sz = *size; sz >= PHYS_REGION_MINSIZE; sz /= 2) {
- base = txboard_find_free_phys_region(begin, end, sz);
- if (base) {
- *size = sz;
- return base;
- }
- }
- return 0;
-}
-unsigned long __init
-txboard_request_phys_region_range(unsigned long begin, unsigned long end,
- unsigned long size)
-{
- unsigned long base;
- base = txboard_find_free_phys_region(begin, end, size);
- if (base)
- txboard_add_phys_region(base, size);
- return base;
-}
-unsigned long __init
-txboard_request_phys_region(unsigned long size)
-{
- unsigned long base;
- unsigned long begin = 0, end = 0x20000000; /* search low 512MB */
- base = txboard_find_free_phys_region(begin, end, size);
- if (base)
- txboard_add_phys_region(base, size);
- return base;
-}
-unsigned long __init
-txboard_request_phys_region_shrink(unsigned long *size)
-{
- unsigned long base;
- unsigned long begin = 0, end = 0x20000000; /* search low 512MB */
- base = txboard_find_free_phys_region_shrink(begin, end, size);
- if (base)
- txboard_add_phys_region(base, *size);
- return base;
-}
-
-#ifdef CONFIG_PCI
-void __init
-tx4938_pcic_setup(struct tx4938_pcic_reg *pcicptr,
- struct pci_controller *channel,
- unsigned long pci_io_base,
- int extarb)
-{
- int i;
-
- /* Disable All Initiator Space */
- pcicptr->pciccfg &= ~(TX4938_PCIC_PCICCFG_G2PMEN(0)|
- TX4938_PCIC_PCICCFG_G2PMEN(1)|
- TX4938_PCIC_PCICCFG_G2PMEN(2)|
- TX4938_PCIC_PCICCFG_G2PIOEN);
-
- /* GB->PCI mappings */
- pcicptr->g2piomask = (channel->io_resource->end - channel->io_resource->start) >> 4;
- pcicptr->g2piogbase = pci_io_base |
-#ifdef __BIG_ENDIAN
- TX4938_PCIC_G2PIOGBASE_ECHG
-#else
- TX4938_PCIC_G2PIOGBASE_BSDIS
-#endif
- ;
- pcicptr->g2piopbase = 0;
- for (i = 0; i < 3; i++) {
- pcicptr->g2pmmask[i] = 0;
- pcicptr->g2pmgbase[i] = 0;
- pcicptr->g2pmpbase[i] = 0;
- }
- if (channel->mem_resource->end) {
- pcicptr->g2pmmask[0] = (channel->mem_resource->end - channel->mem_resource->start) >> 4;
- pcicptr->g2pmgbase[0] = channel->mem_resource->start |
-#ifdef __BIG_ENDIAN
- TX4938_PCIC_G2PMnGBASE_ECHG
-#else
- TX4938_PCIC_G2PMnGBASE_BSDIS
-#endif
- ;
- pcicptr->g2pmpbase[0] = channel->mem_resource->start;
- }
- /* PCI->GB mappings (I/O 256B) */
- pcicptr->p2giopbase = 0; /* 256B */
- pcicptr->p2giogbase = 0;
- /* PCI->GB mappings (MEM 512MB (64MB on R1.x)) */
- pcicptr->p2gm0plbase = 0;
- pcicptr->p2gm0pubase = 0;
- pcicptr->p2gmgbase[0] = 0 |
- TX4938_PCIC_P2GMnGBASE_TMEMEN |
-#ifdef __BIG_ENDIAN
- TX4938_PCIC_P2GMnGBASE_TECHG
-#else
- TX4938_PCIC_P2GMnGBASE_TBSDIS
-#endif
- ;
- /* PCI->GB mappings (MEM 16MB) */
- pcicptr->p2gm1plbase = 0xffffffff;
- pcicptr->p2gm1pubase = 0xffffffff;
- pcicptr->p2gmgbase[1] = 0;
- /* PCI->GB mappings (MEM 1MB) */
- pcicptr->p2gm2pbase = 0xffffffff; /* 1MB */
- pcicptr->p2gmgbase[2] = 0;
-
- pcicptr->pciccfg &= TX4938_PCIC_PCICCFG_GBWC_MASK;
- /* Enable Initiator Memory Space */
- if (channel->mem_resource->end)
- pcicptr->pciccfg |= TX4938_PCIC_PCICCFG_G2PMEN(0);
- /* Enable Initiator I/O Space */
- if (channel->io_resource->end)
- pcicptr->pciccfg |= TX4938_PCIC_PCICCFG_G2PIOEN;
- /* Enable Initiator Config */
- pcicptr->pciccfg |=
- TX4938_PCIC_PCICCFG_ICAEN |
- TX4938_PCIC_PCICCFG_TCAR;
-
- /* Do not use MEMMUL, MEMINF: YMFPCI card causes M_ABORT. */
- pcicptr->pcicfg1 = 0;
-
- pcicptr->g2ptocnt &= ~0xffff;
-
- if (tx4938_pcic_trdyto >= 0) {
- pcicptr->g2ptocnt &= ~0xff;
- pcicptr->g2ptocnt |= (tx4938_pcic_trdyto & 0xff);
- }
-
- if (tx4938_pcic_retryto >= 0) {
- pcicptr->g2ptocnt &= ~0xff00;
- pcicptr->g2ptocnt |= ((tx4938_pcic_retryto<<8) & 0xff00);
- }
-
- /* Clear All Local Bus Status */
- pcicptr->pcicstatus = TX4938_PCIC_PCICSTATUS_ALL;
- /* Enable All Local Bus Interrupts */
- pcicptr->pcicmask = TX4938_PCIC_PCICSTATUS_ALL;
- /* Clear All Initiator Status */
- pcicptr->g2pstatus = TX4938_PCIC_G2PSTATUS_ALL;
- /* Enable All Initiator Interrupts */
- pcicptr->g2pmask = TX4938_PCIC_G2PSTATUS_ALL;
- /* Clear All PCI Status Error */
- pcicptr->pcistatus =
- (pcicptr->pcistatus & 0x0000ffff) |
- (TX4938_PCIC_PCISTATUS_ALL << 16);
- /* Enable All PCI Status Error Interrupts */
- pcicptr->pcimask = TX4938_PCIC_PCISTATUS_ALL;
-
- if (!extarb) {
- /* Reset Bus Arbiter */
- pcicptr->pbacfg = TX4938_PCIC_PBACFG_RPBA;
- pcicptr->pbabm = 0;
- /* Enable Bus Arbiter */
- pcicptr->pbacfg = TX4938_PCIC_PBACFG_PBAEN;
- }
-
- /* PCIC Int => IRC IRQ16 */
- pcicptr->pcicfg2 =
- (pcicptr->pcicfg2 & 0xffffff00) | TX4938_IR_PCIC;
-
- pcicptr->pcistatus = PCI_COMMAND_MASTER |
- PCI_COMMAND_MEMORY |
- PCI_COMMAND_PARITY | PCI_COMMAND_SERR;
-}
-
-int __init
-tx4938_report_pciclk(void)
-{
- unsigned long pcode = TX4938_REV_PCODE();
- int pciclk = 0;
- printk("TX%lx PCIC --%s PCICLK:",
- pcode,
- (tx4938_ccfgptr->ccfg & TX4938_CCFG_PCI66) ? " PCI66" : "");
- if (tx4938_ccfgptr->pcfg & TX4938_PCFG_PCICLKEN_ALL) {
-
- switch ((unsigned long)tx4938_ccfgptr->ccfg & TX4938_CCFG_PCIDIVMODE_MASK) {
- case TX4938_CCFG_PCIDIVMODE_4:
- pciclk = txx9_cpu_clock / 4; break;
- case TX4938_CCFG_PCIDIVMODE_4_5:
- pciclk = txx9_cpu_clock * 2 / 9; break;
- case TX4938_CCFG_PCIDIVMODE_5:
- pciclk = txx9_cpu_clock / 5; break;
- case TX4938_CCFG_PCIDIVMODE_5_5:
- pciclk = txx9_cpu_clock * 2 / 11; break;
- case TX4938_CCFG_PCIDIVMODE_8:
- pciclk = txx9_cpu_clock / 8; break;
- case TX4938_CCFG_PCIDIVMODE_9:
- pciclk = txx9_cpu_clock / 9; break;
- case TX4938_CCFG_PCIDIVMODE_10:
- pciclk = txx9_cpu_clock / 10; break;
- case TX4938_CCFG_PCIDIVMODE_11:
- pciclk = txx9_cpu_clock / 11; break;
- }
- printk("Internal(%dMHz)", pciclk / 1000000);
- } else {
- printk("External");
- pciclk = -1;
- }
- printk("\n");
- return pciclk;
-}
-
-void __init set_tx4938_pcicptr(int ch, struct tx4938_pcic_reg *pcicptr)
-{
- pcicptrs[ch] = pcicptr;
-}
-
-struct tx4938_pcic_reg *get_tx4938_pcicptr(int ch)
-{
- return pcicptrs[ch];
-}
-
-static struct pci_dev *fake_pci_dev(struct pci_controller *hose,
- int top_bus, int busnr, int devfn)
-{
- static struct pci_dev dev;
- static struct pci_bus bus;
-
- dev.sysdata = bus.sysdata = hose;
- dev.devfn = devfn;
- bus.number = busnr;
- bus.ops = hose->pci_ops;
- bus.parent = NULL;
- dev.bus = &bus;
-
- return &dev;
-}
-
-#define EARLY_PCI_OP(rw, size, type) \
-static int early_##rw##_config_##size(struct pci_controller *hose, \
- int top_bus, int bus, int devfn, int offset, type value) \
-{ \
- return pci_##rw##_config_##size( \
- fake_pci_dev(hose, top_bus, bus, devfn), \
- offset, value); \
-}
-
-EARLY_PCI_OP(read, word, u16 *)
-
-int txboard_pci66_check(struct pci_controller *hose, int top_bus, int current_bus)
-{
- u32 pci_devfn;
- unsigned short vid;
- int devfn_start = 0;
- int devfn_stop = 0xff;
- int cap66 = -1;
- u16 stat;
-
- printk("PCI: Checking 66MHz capabilities...\n");
-
- for (pci_devfn=devfn_start; pci_devfn<devfn_stop; pci_devfn++) {
- if (early_read_config_word(hose, top_bus, current_bus,
- pci_devfn, PCI_VENDOR_ID,
- &vid) != PCIBIOS_SUCCESSFUL)
- continue;
-
- if (vid == 0xffff) continue;
-
- /* check 66MHz capability */
- if (cap66 < 0)
- cap66 = 1;
- if (cap66) {
- early_read_config_word(hose, top_bus, current_bus, pci_devfn,
- PCI_STATUS, &stat);
- if (!(stat & PCI_STATUS_66MHZ)) {
- printk(KERN_DEBUG "PCI: %02x:%02x not 66MHz capable.\n",
- current_bus, pci_devfn);
- cap66 = 0;
- break;
- }
- }
- }
- return cap66 > 0;
-}
-
-int __init
-tx4938_pciclk66_setup(void)
-{
- int pciclk;
-
- /* Assert M66EN */
- tx4938_ccfgptr->ccfg |= TX4938_CCFG_PCI66;
- /* Double PCICLK (if possible) */
- if (tx4938_ccfgptr->pcfg & TX4938_PCFG_PCICLKEN_ALL) {
- unsigned int pcidivmode =
- tx4938_ccfgptr->ccfg & TX4938_CCFG_PCIDIVMODE_MASK;
- switch (pcidivmode) {
- case TX4938_CCFG_PCIDIVMODE_8:
- case TX4938_CCFG_PCIDIVMODE_4:
- pcidivmode = TX4938_CCFG_PCIDIVMODE_4;
- pciclk = txx9_cpu_clock / 4;
- break;
- case TX4938_CCFG_PCIDIVMODE_9:
- case TX4938_CCFG_PCIDIVMODE_4_5:
- pcidivmode = TX4938_CCFG_PCIDIVMODE_4_5;
- pciclk = txx9_cpu_clock * 2 / 9;
- break;
- case TX4938_CCFG_PCIDIVMODE_10:
- case TX4938_CCFG_PCIDIVMODE_5:
- pcidivmode = TX4938_CCFG_PCIDIVMODE_5;
- pciclk = txx9_cpu_clock / 5;
- break;
- case TX4938_CCFG_PCIDIVMODE_11:
- case TX4938_CCFG_PCIDIVMODE_5_5:
- default:
- pcidivmode = TX4938_CCFG_PCIDIVMODE_5_5;
- pciclk = txx9_cpu_clock * 2 / 11;
- break;
- }
- tx4938_ccfgptr->ccfg =
- (tx4938_ccfgptr->ccfg & ~TX4938_CCFG_PCIDIVMODE_MASK)
- | pcidivmode;
- printk(KERN_DEBUG "PCICLK: ccfg:%08lx\n",
- (unsigned long)tx4938_ccfgptr->ccfg);
- } else {
- pciclk = -1;
- }
- return pciclk;
-}
-
-extern struct pci_controller tx4938_pci_controller[];
-static int __init tx4938_pcibios_init(void)
-{
- unsigned long mem_base[2];
- unsigned long mem_size[2] = {TX4938_PCIMEM_SIZE_0, TX4938_PCIMEM_SIZE_1}; /* MAX 128M,64K */
- unsigned long io_base[2];
- unsigned long io_size[2] = {TX4938_PCIIO_SIZE_0, TX4938_PCIIO_SIZE_1}; /* MAX 16M,64K */
- /* TX4938 PCIC1: 64K MEM/IO is enough for ETH0,ETH1 */
- int extarb = !(tx4938_ccfgptr->ccfg & TX4938_CCFG_PCIXARB);
-
- PCIBIOS_MIN_IO = 0x00001000UL;
-
- mem_base[0] = txboard_request_phys_region_shrink(&mem_size[0]);
- io_base[0] = txboard_request_phys_region_shrink(&io_size[0]);
-
- printk("TX4938 PCIC -- DID:%04x VID:%04x RID:%02x Arbiter:%s\n",
- (unsigned short)(tx4938_pcicptr->pciid >> 16),
- (unsigned short)(tx4938_pcicptr->pciid & 0xffff),
- (unsigned short)(tx4938_pcicptr->pciccrev & 0xff),
- extarb ? "External" : "Internal");
-
- /* setup PCI area */
- tx4938_pci_controller[0].io_resource->start = io_base[0];
- tx4938_pci_controller[0].io_resource->end = (io_base[0] + io_size[0]) - 1;
- tx4938_pci_controller[0].mem_resource->start = mem_base[0];
- tx4938_pci_controller[0].mem_resource->end = mem_base[0] + mem_size[0] - 1;
-
- set_tx4938_pcicptr(0, tx4938_pcicptr);
-
- register_pci_controller(&tx4938_pci_controller[0]);
-
- if (tx4938_ccfgptr->ccfg & TX4938_CCFG_PCI66) {
- printk("TX4938_CCFG_PCI66 already configured\n");
- txboard_pci66_mode = -1; /* already configured */
- }
-
- /* Reset PCI Bus */
- writeb(0, rbtx4938_pcireset_addr);
- /* Reset PCIC */
- tx4938_ccfgptr->clkctr |= TX4938_CLKCTR_PCIRST;
- if (txboard_pci66_mode > 0)
- tx4938_pciclk66_setup();
- mdelay(10);
- /* clear PCIC reset */
- tx4938_ccfgptr->clkctr &= ~TX4938_CLKCTR_PCIRST;
- writeb(1, rbtx4938_pcireset_addr);
- mmiowb();
- tx4938_report_pcic_status1(tx4938_pcicptr);
-
- tx4938_report_pciclk();
- tx4938_pcic_setup(tx4938_pcicptr, &tx4938_pci_controller[0], io_base[0], extarb);
- if (txboard_pci66_mode == 0 &&
- txboard_pci66_check(&tx4938_pci_controller[0], 0, 0)) {
- /* Reset PCI Bus */
- writeb(0, rbtx4938_pcireset_addr);
- /* Reset PCIC */
- tx4938_ccfgptr->clkctr |= TX4938_CLKCTR_PCIRST;
- tx4938_pciclk66_setup();
- mdelay(10);
- /* clear PCIC reset */
- tx4938_ccfgptr->clkctr &= ~TX4938_CLKCTR_PCIRST;
- writeb(1, rbtx4938_pcireset_addr);
- mmiowb();
- /* Reinitialize PCIC */
- tx4938_report_pciclk();
- tx4938_pcic_setup(tx4938_pcicptr, &tx4938_pci_controller[0], io_base[0], extarb);
- }
-
- mem_base[1] = txboard_request_phys_region_shrink(&mem_size[1]);
- io_base[1] = txboard_request_phys_region_shrink(&io_size[1]);
- /* Reset PCIC1 */
- tx4938_ccfgptr->clkctr |= TX4938_CLKCTR_PCIC1RST;
- /* PCI1DMD==0 => PCI1CLK==GBUSCLK/2 => PCI66 */
- if (!(tx4938_ccfgptr->ccfg & TX4938_CCFG_PCI1DMD))
- tx4938_ccfgptr->ccfg |= TX4938_CCFG_PCI1_66;
- else
- tx4938_ccfgptr->ccfg &= ~TX4938_CCFG_PCI1_66;
- mdelay(10);
- /* clear PCIC1 reset */
- tx4938_ccfgptr->clkctr &= ~TX4938_CLKCTR_PCIC1RST;
- tx4938_report_pcic_status1(tx4938_pcic1ptr);
-
- printk("TX4938 PCIC1 -- DID:%04x VID:%04x RID:%02x",
- (unsigned short)(tx4938_pcic1ptr->pciid >> 16),
- (unsigned short)(tx4938_pcic1ptr->pciid & 0xffff),
- (unsigned short)(tx4938_pcic1ptr->pciccrev & 0xff));
- printk("%s PCICLK:%dMHz\n",
- (tx4938_ccfgptr->ccfg & TX4938_CCFG_PCI1_66) ? " PCI66" : "",
- txx9_gbus_clock /
- ((tx4938_ccfgptr->ccfg & TX4938_CCFG_PCI1DMD) ? 4 : 2) /
- 1000000);
-
- /* assumption: CPHYSADDR(mips_io_port_base) == io_base[0] */
- tx4938_pci_controller[1].io_resource->start =
- io_base[1] - io_base[0];
- tx4938_pci_controller[1].io_resource->end =
- io_base[1] - io_base[0] + io_size[1] - 1;
- tx4938_pci_controller[1].mem_resource->start = mem_base[1];
- tx4938_pci_controller[1].mem_resource->end =
- mem_base[1] + mem_size[1] - 1;
- set_tx4938_pcicptr(1, tx4938_pcic1ptr);
-
- register_pci_controller(&tx4938_pci_controller[1]);
-
- tx4938_pcic_setup(tx4938_pcic1ptr, &tx4938_pci_controller[1], io_base[1], extarb);
-
- /* map ioport 0 to PCI I/O space address 0 */
- set_io_port_base(KSEG1 + io_base[0]);
-
- return 0;
-}
-
-arch_initcall(tx4938_pcibios_init);
-
-#endif /* CONFIG_PCI */
-
-/* SPI support */
-
-/* chip select for SPI devices */
-#define SEEPROM1_CS 7 /* PIO7 */
-#define SEEPROM2_CS 0 /* IOC */
-#define SEEPROM3_CS 1 /* IOC */
-#define SRTC_CS 2 /* IOC */
-
-#ifdef CONFIG_PCI
-static int __init rbtx4938_ethaddr_init(void)
-{
- unsigned char dat[17];
- unsigned char sum;
- int i;
-
- /* 0-3: "MAC\0", 4-9:eth0, 10-15:eth1, 16:sum */
- if (spi_eeprom_read(SEEPROM1_CS, 0, dat, sizeof(dat))) {
- printk(KERN_ERR "seeprom: read error.\n");
- return -ENODEV;
- } else {
- if (strcmp(dat, "MAC") != 0)
- printk(KERN_WARNING "seeprom: bad signature.\n");
- for (i = 0, sum = 0; i < sizeof(dat); i++)
- sum += dat[i];
- if (sum)
- printk(KERN_WARNING "seeprom: bad checksum.\n");
- }
- for (i = 0; i < 2; i++) {
- unsigned int id =
- TXX9_IRQ_BASE + (i ? TX4938_IR_ETH1 : TX4938_IR_ETH0);
- struct platform_device *pdev;
- if (!(tx4938_ccfgptr->pcfg &
- (i ? TX4938_PCFG_ETH1_SEL : TX4938_PCFG_ETH0_SEL)))
- continue;
- pdev = platform_device_alloc("tc35815-mac", id);
- if (!pdev ||
- platform_device_add_data(pdev, &dat[4 + 6 * i], 6) ||
- platform_device_add(pdev))
- platform_device_put(pdev);
- }
- return 0;
-}
-device_initcall(rbtx4938_ethaddr_init);
-#endif /* CONFIG_PCI */
-
-static void __init rbtx4938_spi_setup(void)
-{
- /* set SPI_SEL */
- tx4938_ccfgptr->pcfg |= TX4938_PCFG_SPI_SEL;
-}
-
-static struct resource rbtx4938_fpga_resource;
-
-static char pcode_str[8];
-static struct resource tx4938_reg_resource = {
- .start = TX4938_REG_BASE,
- .end = TX4938_REG_BASE + TX4938_REG_SIZE,
- .name = pcode_str,
- .flags = IORESOURCE_MEM
-};
-
-void __init tx4938_board_setup(void)
-{
- int i;
- unsigned long divmode;
- int cpuclk = 0;
- unsigned long pcode = TX4938_REV_PCODE();
-
- ioport_resource.start = 0x1000;
- ioport_resource.end = 0xffffffff;
- iomem_resource.start = 0x1000;
- iomem_resource.end = 0xffffffff; /* expand to 4GB */
-
- sprintf(pcode_str, "TX%lx", pcode);
- /* SDRAMC,EBUSC are configured by PROM */
- for (i = 0; i < 8; i++) {
- if (!(tx4938_ebuscptr->cr[i] & 0x8))
- continue; /* disabled */
- rbtx4938_ce_base[i] = (unsigned long)TX4938_EBUSC_BA(i);
- txboard_add_phys_region(rbtx4938_ce_base[i], TX4938_EBUSC_SIZE(i));
- }
-
- /* clocks */
- if (txx9_master_clock) {
- /* calculate gbus_clock and cpu_clock_freq from master_clock */
- divmode = (unsigned long)tx4938_ccfgptr->ccfg & TX4938_CCFG_DIVMODE_MASK;
- switch (divmode) {
- case TX4938_CCFG_DIVMODE_8:
- case TX4938_CCFG_DIVMODE_10:
- case TX4938_CCFG_DIVMODE_12:
- case TX4938_CCFG_DIVMODE_16:
- case TX4938_CCFG_DIVMODE_18:
- txx9_gbus_clock = txx9_master_clock * 4; break;
- default:
- txx9_gbus_clock = txx9_master_clock;
- }
- switch (divmode) {
- case TX4938_CCFG_DIVMODE_2:
- case TX4938_CCFG_DIVMODE_8:
- cpuclk = txx9_gbus_clock * 2; break;
- case TX4938_CCFG_DIVMODE_2_5:
- case TX4938_CCFG_DIVMODE_10:
- cpuclk = txx9_gbus_clock * 5 / 2; break;
- case TX4938_CCFG_DIVMODE_3:
- case TX4938_CCFG_DIVMODE_12:
- cpuclk = txx9_gbus_clock * 3; break;
- case TX4938_CCFG_DIVMODE_4:
- case TX4938_CCFG_DIVMODE_16:
- cpuclk = txx9_gbus_clock * 4; break;
- case TX4938_CCFG_DIVMODE_4_5:
- case TX4938_CCFG_DIVMODE_18:
- cpuclk = txx9_gbus_clock * 9 / 2; break;
- }
- txx9_cpu_clock = cpuclk;
- } else {
- if (txx9_cpu_clock == 0) {
- txx9_cpu_clock = 300000000; /* 300MHz */
- }
- /* calculate gbus_clock and master_clock from cpu_clock_freq */
- cpuclk = txx9_cpu_clock;
- divmode = (unsigned long)tx4938_ccfgptr->ccfg & TX4938_CCFG_DIVMODE_MASK;
- switch (divmode) {
- case TX4938_CCFG_DIVMODE_2:
- case TX4938_CCFG_DIVMODE_8:
- txx9_gbus_clock = cpuclk / 2; break;
- case TX4938_CCFG_DIVMODE_2_5:
- case TX4938_CCFG_DIVMODE_10:
- txx9_gbus_clock = cpuclk * 2 / 5; break;
- case TX4938_CCFG_DIVMODE_3:
- case TX4938_CCFG_DIVMODE_12:
- txx9_gbus_clock = cpuclk / 3; break;
- case TX4938_CCFG_DIVMODE_4:
- case TX4938_CCFG_DIVMODE_16:
- txx9_gbus_clock = cpuclk / 4; break;
- case TX4938_CCFG_DIVMODE_4_5:
- case TX4938_CCFG_DIVMODE_18:
- txx9_gbus_clock = cpuclk * 2 / 9; break;
- }
- switch (divmode) {
- case TX4938_CCFG_DIVMODE_8:
- case TX4938_CCFG_DIVMODE_10:
- case TX4938_CCFG_DIVMODE_12:
- case TX4938_CCFG_DIVMODE_16:
- case TX4938_CCFG_DIVMODE_18:
- txx9_master_clock = txx9_gbus_clock / 4; break;
- default:
- txx9_master_clock = txx9_gbus_clock;
- }
- }
- /* change default value to udelay/mdelay take reasonable time */
- loops_per_jiffy = txx9_cpu_clock / HZ / 2;
-
- /* CCFG */
- /* clear WatchDogReset,BusErrorOnWrite flag (W1C) */
- tx4938_ccfgptr->ccfg |= TX4938_CCFG_WDRST | TX4938_CCFG_BEOW;
- /* do reset on watchdog */
- tx4938_ccfgptr->ccfg |= TX4938_CCFG_WR;
- /* clear PCIC1 reset */
- if (tx4938_ccfgptr->clkctr & TX4938_CLKCTR_PCIC1RST)
- tx4938_ccfgptr->clkctr &= ~TX4938_CLKCTR_PCIC1RST;
-
- /* enable Timeout BusError */
- if (tx4938_ccfg_toeon)
- tx4938_ccfgptr->ccfg |= TX4938_CCFG_TOE;
-
- /* DMA selection */
- tx4938_ccfgptr->pcfg &= ~TX4938_PCFG_DMASEL_ALL;
-
- /* Use external clock for external arbiter */
- if (!(tx4938_ccfgptr->ccfg & TX4938_CCFG_PCIXARB))
- tx4938_ccfgptr->pcfg &= ~TX4938_PCFG_PCICLKEN_ALL;
-
- printk("%s -- %dMHz(M%dMHz) CRIR:%08lx CCFG:%Lx PCFG:%Lx\n",
- pcode_str,
- cpuclk / 1000000, txx9_master_clock / 1000000,
- (unsigned long)tx4938_ccfgptr->crir,
- tx4938_ccfgptr->ccfg,
- tx4938_ccfgptr->pcfg);
-
- printk("%s SDRAMC --", pcode_str);
- for (i = 0; i < 4; i++) {
- unsigned long long cr = tx4938_sdramcptr->cr[i];
- unsigned long ram_base, ram_size;
- if (!((unsigned long)cr & 0x00000400))
- continue; /* disabled */
- ram_base = (unsigned long)(cr >> 49) << 21;
- ram_size = ((unsigned long)(cr >> 33) + 1) << 21;
- if (ram_base >= 0x20000000)
- continue; /* high memory (ignore) */
- printk(" CR%d:%016Lx", i, cr);
- txboard_add_phys_region(ram_base, ram_size);
- }
- printk(" TR:%09Lx\n", tx4938_sdramcptr->tr);
-
- /* SRAM */
- if (pcode == 0x4938 && tx4938_sramcptr->cr & 1) {
- unsigned int size = 0x800;
- unsigned long base =
- (tx4938_sramcptr->cr >> (39-11)) & ~(size - 1);
- txboard_add_phys_region(base, size);
- }
-
- /* TMR */
- for (i = 0; i < TX4938_NR_TMR; i++)
- txx9_tmr_init(TX4938_TMR_REG(i) & 0xfffffffffULL);
-
- /* enable DMA */
- for (i = 0; i < 2; i++)
- ____raw_writeq(TX4938_DMA_MCR_MSTEN,
- (void __iomem *)(TX4938_DMA_REG(i) + 0x50));
-
- /* PIO */
- __raw_writel(0, &tx4938_pioptr->maskcpu);
- __raw_writel(0, &tx4938_pioptr->maskext);
-
- /* TX4938 internal registers */
- if (request_resource(&iomem_resource, &tx4938_reg_resource))
- printk("request resource for internal registers failed\n");
-}
-
-#ifdef CONFIG_PCI
-static inline void tx4938_report_pcic_status1(struct tx4938_pcic_reg *pcicptr)
-{
- unsigned short pcistatus = (unsigned short)(pcicptr->pcistatus >> 16);
- unsigned long g2pstatus = pcicptr->g2pstatus;
- unsigned long pcicstatus = pcicptr->pcicstatus;
- static struct {
- unsigned long flag;
- const char *str;
- } pcistat_tbl[] = {
- { PCI_STATUS_DETECTED_PARITY, "DetectedParityError" },
- { PCI_STATUS_SIG_SYSTEM_ERROR, "SignaledSystemError" },
- { PCI_STATUS_REC_MASTER_ABORT, "ReceivedMasterAbort" },
- { PCI_STATUS_REC_TARGET_ABORT, "ReceivedTargetAbort" },
- { PCI_STATUS_SIG_TARGET_ABORT, "SignaledTargetAbort" },
- { PCI_STATUS_PARITY, "MasterParityError" },
- }, g2pstat_tbl[] = {
- { TX4938_PCIC_G2PSTATUS_TTOE, "TIOE" },
- { TX4938_PCIC_G2PSTATUS_RTOE, "RTOE" },
- }, pcicstat_tbl[] = {
- { TX4938_PCIC_PCICSTATUS_PME, "PME" },
- { TX4938_PCIC_PCICSTATUS_TLB, "TLB" },
- { TX4938_PCIC_PCICSTATUS_NIB, "NIB" },
- { TX4938_PCIC_PCICSTATUS_ZIB, "ZIB" },
- { TX4938_PCIC_PCICSTATUS_PERR, "PERR" },
- { TX4938_PCIC_PCICSTATUS_SERR, "SERR" },
- { TX4938_PCIC_PCICSTATUS_GBE, "GBE" },
- { TX4938_PCIC_PCICSTATUS_IWB, "IWB" },
- };
- int i;
-
- printk("pcistat:%04x(", pcistatus);
- for (i = 0; i < ARRAY_SIZE(pcistat_tbl); i++)
- if (pcistatus & pcistat_tbl[i].flag)
- printk("%s ", pcistat_tbl[i].str);
- printk("), g2pstatus:%08lx(", g2pstatus);
- for (i = 0; i < ARRAY_SIZE(g2pstat_tbl); i++)
- if (g2pstatus & g2pstat_tbl[i].flag)
- printk("%s ", g2pstat_tbl[i].str);
- printk("), pcicstatus:%08lx(", pcicstatus);
- for (i = 0; i < ARRAY_SIZE(pcicstat_tbl); i++)
- if (pcicstatus & pcicstat_tbl[i].flag)
- printk("%s ", pcicstat_tbl[i].str);
- printk(")\n");
-}
-
-void tx4938_report_pcic_status(void)
-{
- int i;
- struct tx4938_pcic_reg *pcicptr;
- for (i = 0; (pcicptr = get_tx4938_pcicptr(i)) != NULL; i++)
- tx4938_report_pcic_status1(pcicptr);
-}
-
-#endif /* CONFIG_PCI */
-
-void __init plat_time_init(void)
-{
- mips_hpt_frequency = txx9_cpu_clock / 2;
- if (tx4938_ccfgptr->ccfg & TX4938_CCFG_TINTDIS)
- txx9_clockevent_init(TX4938_TMR_REG(0) & 0xfffffffffULL,
- TXX9_IRQ_BASE + TX4938_IR_TMR(0),
- txx9_gbus_clock / 2);
-}
-
-void __init plat_mem_setup(void)
-{
- unsigned long long pcfg;
- char *argptr;
-
- iomem_resource.end = 0xffffffff; /* 4GB */
-
- if (txx9_master_clock == 0)
- txx9_master_clock = 25000000; /* 25MHz */
- tx4938_board_setup();
-#ifndef CONFIG_PCI
- set_io_port_base(RBTX4938_ETHER_BASE);
-#endif
-
-#ifdef CONFIG_SERIAL_TXX9
- {
- extern int early_serial_txx9_setup(struct uart_port *port);
- int i;
- struct uart_port req;
- for(i = 0; i < 2; i++) {
- memset(&req, 0, sizeof(req));
- req.line = i;
- req.iotype = UPIO_MEM;
- req.membase = (char *)(0xff1ff300 + i * 0x100);
- req.mapbase = 0xff1ff300 + i * 0x100;
- req.irq = RBTX4938_IRQ_IRC_SIO(i);
- req.flags |= UPF_BUGGY_UART /*HAVE_CTS_LINE*/;
- req.uartclk = 50000000;
- early_serial_txx9_setup(&req);
- }
- }
-#ifdef CONFIG_SERIAL_TXX9_CONSOLE
- argptr = prom_getcmdline();
- if (strstr(argptr, "console=") == NULL) {
- strcat(argptr, " console=ttyS0,38400");
- }
-#endif
-#endif
-
-#ifdef CONFIG_TOSHIBA_RBTX4938_MPLEX_PIO58_61
- printk("PIOSEL: disabling both ata and nand selection\n");
- local_irq_disable();
- tx4938_ccfgptr->pcfg &= ~(TX4938_PCFG_NDF_SEL | TX4938_PCFG_ATA_SEL);
-#endif
-
-#ifdef CONFIG_TOSHIBA_RBTX4938_MPLEX_NAND
- printk("PIOSEL: enabling nand selection\n");
- tx4938_ccfgptr->pcfg |= TX4938_PCFG_NDF_SEL;
- tx4938_ccfgptr->pcfg &= ~TX4938_PCFG_ATA_SEL;
-#endif
-
-#ifdef CONFIG_TOSHIBA_RBTX4938_MPLEX_ATA
- printk("PIOSEL: enabling ata selection\n");
- tx4938_ccfgptr->pcfg |= TX4938_PCFG_ATA_SEL;
- tx4938_ccfgptr->pcfg &= ~TX4938_PCFG_NDF_SEL;
-#endif
-
-#ifdef CONFIG_IP_PNP
- argptr = prom_getcmdline();
- if (strstr(argptr, "ip=") == NULL) {
- strcat(argptr, " ip=any");
- }
-#endif
-
-
-#ifdef CONFIG_FB
- {
- conswitchp = &dummy_con;
- }
-#endif
-
- rbtx4938_spi_setup();
- pcfg = tx4938_ccfgptr->pcfg; /* updated */
- /* fixup piosel */
- if ((pcfg & (TX4938_PCFG_ATA_SEL | TX4938_PCFG_NDF_SEL)) ==
- TX4938_PCFG_ATA_SEL)
- writeb((readb(rbtx4938_piosel_addr) & 0x03) | 0x04,
- rbtx4938_piosel_addr);
- else if ((pcfg & (TX4938_PCFG_ATA_SEL | TX4938_PCFG_NDF_SEL)) ==
- TX4938_PCFG_NDF_SEL)
- writeb((readb(rbtx4938_piosel_addr) & 0x03) | 0x08,
- rbtx4938_piosel_addr);
- else
- writeb(readb(rbtx4938_piosel_addr) & ~(0x08 | 0x04),
- rbtx4938_piosel_addr);
-
- rbtx4938_fpga_resource.name = "FPGA Registers";
- rbtx4938_fpga_resource.start = CPHYSADDR(RBTX4938_FPGA_REG_ADDR);
- rbtx4938_fpga_resource.end = CPHYSADDR(RBTX4938_FPGA_REG_ADDR) + 0xffff;
- rbtx4938_fpga_resource.flags = IORESOURCE_MEM | IORESOURCE_BUSY;
- if (request_resource(&iomem_resource, &rbtx4938_fpga_resource))
- printk("request resource for fpga failed\n");
-
- _machine_restart = rbtx4938_machine_restart;
- _machine_halt = rbtx4938_machine_halt;
- pm_power_off = rbtx4938_machine_power_off;
-
- writeb(0xff, rbtx4938_led_addr);
- printk(KERN_INFO "RBTX4938 --- FPGA(Rev %02x) DIPSW:%02x,%02x\n",
- readb(rbtx4938_fpga_rev_addr),
- readb(rbtx4938_dipsw_addr), readb(rbtx4938_bdipsw_addr));
-}
-
-static int __init rbtx4938_ne_init(void)
-{
- struct resource res[] = {
- {
- .start = RBTX4938_RTL_8019_BASE,
- .end = RBTX4938_RTL_8019_BASE + 0x20 - 1,
- .flags = IORESOURCE_IO,
- }, {
- .start = RBTX4938_RTL_8019_IRQ,
- .flags = IORESOURCE_IRQ,
- }
- };
- struct platform_device *dev =
- platform_device_register_simple("ne", -1,
- res, ARRAY_SIZE(res));
- return IS_ERR(dev) ? PTR_ERR(dev) : 0;
-}
-device_initcall(rbtx4938_ne_init);
-
-/* GPIO support */
-
-int gpio_to_irq(unsigned gpio)
-{
- return -EINVAL;
-}
-
-int irq_to_gpio(unsigned irq)
-{
- return -EINVAL;
-}
-
-static DEFINE_SPINLOCK(rbtx4938_spi_gpio_lock);
-
-static void rbtx4938_spi_gpio_set(struct gpio_chip *chip, unsigned int offset,
- int value)
-{
- u8 val;
- unsigned long flags;
- spin_lock_irqsave(&rbtx4938_spi_gpio_lock, flags);
- val = readb(rbtx4938_spics_addr);
- if (value)
- val |= 1 << offset;
- else
- val &= ~(1 << offset);
- writeb(val, rbtx4938_spics_addr);
- mmiowb();
- spin_unlock_irqrestore(&rbtx4938_spi_gpio_lock, flags);
-}
-
-static int rbtx4938_spi_gpio_dir_out(struct gpio_chip *chip,
- unsigned int offset, int value)
-{
- rbtx4938_spi_gpio_set(chip, offset, value);
- return 0;
-}
-
-static struct gpio_chip rbtx4938_spi_gpio_chip = {
- .set = rbtx4938_spi_gpio_set,
- .direction_output = rbtx4938_spi_gpio_dir_out,
- .label = "RBTX4938-SPICS",
- .base = 16,
- .ngpio = 3,
-};
-
-/* SPI support */
-
-static void __init txx9_spi_init(unsigned long base, int irq)
-{
- struct resource res[] = {
- {
- .start = base,
- .end = base + 0x20 - 1,
- .flags = IORESOURCE_MEM,
- }, {
- .start = irq,
- .flags = IORESOURCE_IRQ,
- },
- };
- platform_device_register_simple("spi_txx9", 0,
- res, ARRAY_SIZE(res));
-}
-
-static int __init rbtx4938_spi_init(void)
-{
- struct spi_board_info srtc_info = {
- .modalias = "rtc-rs5c348",
- .max_speed_hz = 1000000, /* 1.0Mbps @ Vdd 2.0V */
- .bus_num = 0,
- .chip_select = 16 + SRTC_CS,
- /* Mode 1 (High-Active, Shift-Then-Sample), High Avtive CS */
- .mode = SPI_MODE_1 | SPI_CS_HIGH,
- };
- spi_register_board_info(&srtc_info, 1);
- spi_eeprom_register(SEEPROM1_CS);
- spi_eeprom_register(16 + SEEPROM2_CS);
- spi_eeprom_register(16 + SEEPROM3_CS);
- gpio_request(16 + SRTC_CS, "rtc-rs5c348");
- gpio_direction_output(16 + SRTC_CS, 0);
- gpio_request(SEEPROM1_CS, "seeprom1");
- gpio_direction_output(SEEPROM1_CS, 1);
- gpio_request(16 + SEEPROM2_CS, "seeprom2");
- gpio_direction_output(16 + SEEPROM2_CS, 1);
- gpio_request(16 + SEEPROM3_CS, "seeprom3");
- gpio_direction_output(16 + SEEPROM3_CS, 1);
- txx9_spi_init(TX4938_SPI_REG & 0xfffffffffULL, RBTX4938_IRQ_IRC_SPI);
- return 0;
-}
-
-static int __init rbtx4938_arch_init(void)
-{
- txx9_gpio_init(TX4938_PIO_REG & 0xfffffffffULL, 0, 16);
- gpiochip_add(&rbtx4938_spi_gpio_chip);
- return rbtx4938_spi_init();
-}
-arch_initcall(rbtx4938_arch_init);
-
-/* Watchdog support */
-
-static int __init txx9_wdt_init(unsigned long base)
-{
- struct resource res = {
- .start = base,
- .end = base + 0x100 - 1,
- .flags = IORESOURCE_MEM,
- };
- struct platform_device *dev =
- platform_device_register_simple("txx9wdt", -1, &res, 1);
- return IS_ERR(dev) ? PTR_ERR(dev) : 0;
-}
-
-static int __init rbtx4938_wdt_init(void)
-{
- return txx9_wdt_init(TX4938_TMR_REG(2) & 0xfffffffffULL);
-}
-device_initcall(rbtx4938_wdt_init);
-
-/* Minimum CLK support */
-
-struct clk *clk_get(struct device *dev, const char *id)
-{
- if (!strcmp(id, "spi-baseclk"))
- return (struct clk *)(txx9_gbus_clock / 2 / 4);
- if (!strcmp(id, "imbus_clk"))
- return (struct clk *)(txx9_gbus_clock / 2);
- return ERR_PTR(-ENOENT);
-}
-EXPORT_SYMBOL(clk_get);
-
-int clk_enable(struct clk *clk)
-{
- return 0;
-}
-EXPORT_SYMBOL(clk_enable);
-
-void clk_disable(struct clk *clk)
-{
-}
-EXPORT_SYMBOL(clk_disable);
-
-unsigned long clk_get_rate(struct clk *clk)
-{
- return (unsigned long)clk;
-}
-EXPORT_SYMBOL(clk_get_rate);
-
-void clk_put(struct clk *clk)
-{
-}
-EXPORT_SYMBOL(clk_put);
--- /dev/null
+config TOSHIBA_JMR3927
+ bool "Toshiba JMR-TX3927 board"
+ depends on MACH_TX39XX
+ select SOC_TX3927
+
+config TOSHIBA_RBTX4927
+ bool "Toshiba RBTX49[23]7 board"
+ depends on MACH_TX49XX
+ select SOC_TX4927
+ help
+ This Toshiba board is based on the TX4927 processor. Say Y here to
+ support this machine type
+
+config TOSHIBA_RBTX4938
+ bool "Toshiba RBTX4938 board"
+ depends on MACH_TX49XX
+ select SOC_TX4938
+ help
+ This Toshiba board is based on the TX4938 processor. Say Y here to
+ support this machine type
+
+config SOC_TX3927
+ bool
+ select CEVT_TXX9
+ select DMA_NONCOHERENT
+ select HAS_TXX9_SERIAL
+ select HW_HAS_PCI
+ select IRQ_TXX9
+ select SWAP_IO_SPACE
+ select SYS_HAS_CPU_TX39XX
+ select SYS_SUPPORTS_32BIT_KERNEL
+ select SYS_SUPPORTS_LITTLE_ENDIAN
+ select SYS_SUPPORTS_BIG_ENDIAN
+ select GENERIC_HARDIRQS_NO__DO_IRQ
+ select GPIO_TXX9
+
+config SOC_TX4927
+ bool
+ select CEVT_R4K
+ select CSRC_R4K
+ select CEVT_TXX9
+ select DMA_NONCOHERENT
+ select HAS_TXX9_SERIAL
+ select HW_HAS_PCI
+ select IRQ_CPU
+ select IRQ_TXX9
+ select PCI_TX4927
+ select SWAP_IO_SPACE
+ select SYS_HAS_CPU_TX49XX
+ select SYS_SUPPORTS_32BIT_KERNEL
+ select SYS_SUPPORTS_64BIT_KERNEL
+ select SYS_SUPPORTS_LITTLE_ENDIAN
+ select SYS_SUPPORTS_BIG_ENDIAN
+ select SYS_SUPPORTS_KGDB
+ select GENERIC_HARDIRQS_NO__DO_IRQ
+ select GPIO_TXX9
+
+config SOC_TX4938
+ bool
+ select CEVT_R4K
+ select CSRC_R4K
+ select CEVT_TXX9
+ select DMA_NONCOHERENT
+ select HAS_TXX9_SERIAL
+ select HW_HAS_PCI
+ select IRQ_CPU
+ select IRQ_TXX9
+ select PCI_TX4927
+ select SWAP_IO_SPACE
+ select SYS_HAS_CPU_TX49XX
+ select SYS_SUPPORTS_32BIT_KERNEL
+ select SYS_SUPPORTS_64BIT_KERNEL
+ select SYS_SUPPORTS_LITTLE_ENDIAN
+ select SYS_SUPPORTS_BIG_ENDIAN
+ select SYS_SUPPORTS_KGDB
+ select GENERIC_HARDIRQS_NO__DO_IRQ
+ select GPIO_TXX9
+
+config TOSHIBA_FPCIB0
+ bool "FPCIB0 Backplane Support"
+ depends on PCI && (MACH_TX39XX || MACH_TX49XX)
+ select I8259
+
+config PICMG_PCI_BACKPLANE_DEFAULT
+ bool "Support for PICMG PCI Backplane"
+ depends on PCI && (MACH_TX39XX || MACH_TX49XX)
+ default y if !TOSHIBA_FPCIB0
+
+if TOSHIBA_RBTX4938
+
+comment "Multiplex Pin Select"
+choice
+ prompt "PIO[58:61]"
+ default TOSHIBA_RBTX4938_MPLEX_PIO58_61
+
+config TOSHIBA_RBTX4938_MPLEX_PIO58_61
+ bool "PIO"
+config TOSHIBA_RBTX4938_MPLEX_NAND
+ bool "NAND"
+config TOSHIBA_RBTX4938_MPLEX_ATA
+ bool "ATA"
+
+endchoice
+
+config TX4938_NAND_BOOT
+ depends on EXPERIMENTAL && TOSHIBA_RBTX4938_MPLEX_NAND
+ bool "NAND Boot Support (EXPERIMENTAL)"
+ help
+ This is only for Toshiba RBTX4938 reference board, which has NAND IPL.
+ Select this option if you need to use NAND boot.
+
+endif
+
+config PCI_TX4927
+ bool
--- /dev/null
+#
+# Makefile for common code for TXx9 based systems
+#
+
+obj-y += setup.o
+obj-$(CONFIG_PCI) += pci.o
+obj-$(CONFIG_SOC_TX4927) += mem_tx4927.o irq_tx4927.o
+obj-$(CONFIG_SOC_TX4938) += mem_tx4938.o irq_tx4938.o
+obj-$(CONFIG_TOSHIBA_FPCIB0) += smsc_fdc37m81x.o
+obj-$(CONFIG_KGDB) += dbgio.o
+
+EXTRA_CFLAGS += -Werror
#include <linux/init.h>
#include <linux/interrupt.h>
#include <asm/irq_cpu.h>
-#include <asm/mipsregs.h>
-#include <asm/tx4927/tx4927.h>
-#ifdef CONFIG_TOSHIBA_RBTX4927
-#include <asm/tx4927/toshiba_rbtx4927.h>
-#endif
+#include <asm/txx9/tx4927.h>
void __init tx4927_irq_init(void)
{
mips_cpu_irq_init();
txx9_irq_init(TX4927_IRC_REG);
- set_irq_chained_handler(TX4927_IRQ_NEST_PIC_ON_CP0, handle_simple_irq);
-}
-
-asmlinkage void plat_irq_dispatch(void)
-{
- unsigned int pending = read_c0_status() & read_c0_cause() & ST0_IM;
-
- if (pending & STATUSF_IP7) /* cpu timer */
- do_IRQ(TX4927_IRQ_CPU_TIMER);
- else if (pending & STATUSF_IP2) { /* tx4927 pic */
- int irq = txx9_irq();
-#ifdef CONFIG_TOSHIBA_RBTX4927
- if (irq == TX4927_IRQ_NEST_EXT_ON_PIC)
- irq = toshiba_rbtx4927_irq_nested(irq);
-#endif
- if (unlikely(irq < 0)) {
- spurious_interrupt();
- return;
- }
- do_IRQ(irq);
- } else if (pending & STATUSF_IP0) /* user line 0 */
- do_IRQ(TX4927_IRQ_USER0);
- else if (pending & STATUSF_IP1) /* user line 1 */
- do_IRQ(TX4927_IRQ_USER1);
- else
- spurious_interrupt();
+ set_irq_chained_handler(MIPS_CPU_IRQ_BASE + TX4927_IRC_INT,
+ handle_simple_irq);
}
--- /dev/null
+/*
+ * linux/arch/mips/tx4938/common/irq.c
+ *
+ * Common tx4938 irq handler
+ * Copyright (C) 2000-2001 Toshiba Corporation
+ *
+ * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
+ * terms of the GNU General Public License version 2. This program is
+ * licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ *
+ * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
+ */
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <asm/irq_cpu.h>
+#include <asm/txx9/tx4938.h>
+
+void __init tx4938_irq_init(void)
+{
+ mips_cpu_irq_init();
+ txx9_irq_init(TX4938_IRC_REG);
+ set_irq_chained_handler(MIPS_CPU_IRQ_BASE + TX4938_IRC_INT,
+ handle_simple_irq);
+}
*/
#include <linux/init.h>
-#include <linux/mm.h>
-#include <linux/sched.h>
-#include <linux/bootmem.h>
-
-#include <asm/addrspace.h>
-#include <asm/bootinfo.h>
-#include <asm/tx4927/tx4927.h>
+#include <linux/types.h>
+#include <linux/io.h>
static unsigned int __init tx4927_process_sdccr(unsigned long addr)
{
--- /dev/null
+/*
+ * linux/arch/mips/txx9/pci.c
+ *
+ * Based on linux/arch/mips/txx9/rbtx4927/setup.c,
+ * linux/arch/mips/txx9/rbtx4938/setup.c,
+ * and RBTX49xx patch from CELF patch archive.
+ *
+ * Copyright 2001-2005 MontaVista Software Inc.
+ * Copyright (C) 1996, 97, 2001, 04 Ralf Baechle (ralf@linux-mips.org)
+ * (C) Copyright TOSHIBA CORPORATION 2000-2001, 2004-2007
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/delay.h>
+#include <linux/jiffies.h>
+#include <linux/io.h>
+#include <asm/txx9/generic.h>
+#include <asm/txx9/pci.h>
+#ifdef CONFIG_TOSHIBA_FPCIB0
+#include <linux/interrupt.h>
+#include <asm/i8259.h>
+#include <asm/txx9/smsc_fdc37m81x.h>
+#endif
+
+static int __init
+early_read_config_word(struct pci_controller *hose,
+ int top_bus, int bus, int devfn, int offset, u16 *value)
+{
+ struct pci_dev fake_dev;
+ struct pci_bus fake_bus;
+
+ fake_dev.bus = &fake_bus;
+ fake_dev.sysdata = hose;
+ fake_dev.devfn = devfn;
+ fake_bus.number = bus;
+ fake_bus.sysdata = hose;
+ fake_bus.ops = hose->pci_ops;
+
+ if (bus != top_bus)
+ /* Fake a parent bus structure. */
+ fake_bus.parent = &fake_bus;
+ else
+ fake_bus.parent = NULL;
+
+ return pci_read_config_word(&fake_dev, offset, value);
+}
+
+int __init txx9_pci66_check(struct pci_controller *hose, int top_bus,
+ int current_bus)
+{
+ u32 pci_devfn;
+ unsigned short vid;
+ int cap66 = -1;
+ u16 stat;
+
+ /* It seems SLC90E66 needs some time after PCI reset... */
+ mdelay(80);
+
+ printk(KERN_INFO "PCI: Checking 66MHz capabilities...\n");
+
+ for (pci_devfn = 0; pci_devfn < 0xff; pci_devfn++) {
+ if (PCI_FUNC(pci_devfn))
+ continue;
+ if (early_read_config_word(hose, top_bus, current_bus,
+ pci_devfn, PCI_VENDOR_ID, &vid) !=
+ PCIBIOS_SUCCESSFUL)
+ continue;
+ if (vid == 0xffff)
+ continue;
+
+ /* check 66MHz capability */
+ if (cap66 < 0)
+ cap66 = 1;
+ if (cap66) {
+ early_read_config_word(hose, top_bus, current_bus,
+ pci_devfn, PCI_STATUS, &stat);
+ if (!(stat & PCI_STATUS_66MHZ)) {
+ printk(KERN_DEBUG
+ "PCI: %02x:%02x not 66MHz capable.\n",
+ current_bus, pci_devfn);
+ cap66 = 0;
+ break;
+ }
+ }
+ }
+ return cap66 > 0;
+}
+
+static struct resource primary_pci_mem_res[2] = {
+ { .name = "PCI MEM" },
+ { .name = "PCI MMIO" },
+};
+static struct resource primary_pci_io_res = { .name = "PCI IO" };
+struct pci_controller txx9_primary_pcic = {
+ .mem_resource = &primary_pci_mem_res[0],
+ .io_resource = &primary_pci_io_res,
+};
+
+#ifdef CONFIG_64BIT
+int txx9_pci_mem_high __initdata = 1;
+#else
+int txx9_pci_mem_high __initdata;
+#endif
+
+/*
+ * allocate pci_controller and resources.
+ * mem_base, io_base: physical addresss. 0 for auto assignment.
+ * mem_size and io_size means max size on auto assignment.
+ * pcic must be &txx9_primary_pcic or NULL.
+ */
+struct pci_controller *__init
+txx9_alloc_pci_controller(struct pci_controller *pcic,
+ unsigned long mem_base, unsigned long mem_size,
+ unsigned long io_base, unsigned long io_size)
+{
+ struct pcic {
+ struct pci_controller c;
+ struct resource r_mem[2];
+ struct resource r_io;
+ } *new = NULL;
+ int min_size = 0x10000;
+
+ if (!pcic) {
+ new = kzalloc(sizeof(*new), GFP_KERNEL);
+ if (!new)
+ return NULL;
+ new->r_mem[0].name = "PCI mem";
+ new->r_mem[1].name = "PCI mmio";
+ new->r_io.name = "PCI io";
+ new->c.mem_resource = new->r_mem;
+ new->c.io_resource = &new->r_io;
+ pcic = &new->c;
+ } else
+ BUG_ON(pcic != &txx9_primary_pcic);
+ pcic->io_resource->flags = IORESOURCE_IO;
+
+ /*
+ * for auto assignment, first search a (big) region for PCI
+ * MEM, then search a region for PCI IO.
+ */
+ if (mem_base) {
+ pcic->mem_resource[0].start = mem_base;
+ pcic->mem_resource[0].end = mem_base + mem_size - 1;
+ if (request_resource(&iomem_resource, &pcic->mem_resource[0]))
+ goto free_and_exit;
+ } else {
+ unsigned long min = 0, max = 0x20000000; /* low 512MB */
+ if (!mem_size) {
+ /* default size for auto assignment */
+ if (txx9_pci_mem_high)
+ mem_size = 0x20000000; /* mem:512M(max) */
+ else
+ mem_size = 0x08000000; /* mem:128M(max) */
+ }
+ if (txx9_pci_mem_high) {
+ min = 0x20000000;
+ max = 0xe0000000;
+ }
+ /* search free region for PCI MEM */
+ for (; mem_size >= min_size; mem_size /= 2) {
+ if (allocate_resource(&iomem_resource,
+ &pcic->mem_resource[0],
+ mem_size, min, max,
+ mem_size, NULL, NULL) == 0)
+ break;
+ }
+ if (mem_size < min_size)
+ goto free_and_exit;
+ }
+
+ pcic->mem_resource[1].flags = IORESOURCE_MEM | IORESOURCE_BUSY;
+ if (io_base) {
+ pcic->mem_resource[1].start = io_base;
+ pcic->mem_resource[1].end = io_base + io_size - 1;
+ if (request_resource(&iomem_resource, &pcic->mem_resource[1]))
+ goto release_and_exit;
+ } else {
+ if (!io_size)
+ /* default size for auto assignment */
+ io_size = 0x01000000; /* io:16M(max) */
+ /* search free region for PCI IO in low 512MB */
+ for (; io_size >= min_size; io_size /= 2) {
+ if (allocate_resource(&iomem_resource,
+ &pcic->mem_resource[1],
+ io_size, 0, 0x20000000,
+ io_size, NULL, NULL) == 0)
+ break;
+ }
+ if (io_size < min_size)
+ goto release_and_exit;
+ io_base = pcic->mem_resource[1].start;
+ }
+
+ pcic->mem_resource[0].flags = IORESOURCE_MEM;
+ if (pcic == &txx9_primary_pcic &&
+ mips_io_port_base == (unsigned long)-1) {
+ /* map ioport 0 to PCI I/O space address 0 */
+ set_io_port_base(IO_BASE + pcic->mem_resource[1].start);
+ pcic->io_resource->start = 0;
+ pcic->io_offset = 0; /* busaddr == ioaddr */
+ pcic->io_map_base = IO_BASE + pcic->mem_resource[1].start;
+ } else {
+ /* physaddr to ioaddr */
+ pcic->io_resource->start =
+ io_base - (mips_io_port_base - IO_BASE);
+ pcic->io_offset = io_base - (mips_io_port_base - IO_BASE);
+ pcic->io_map_base = mips_io_port_base;
+ }
+ pcic->io_resource->end = pcic->io_resource->start + io_size - 1;
+
+ pcic->mem_offset = 0; /* busaddr == physaddr */
+
+ printk(KERN_INFO "PCI: IO 0x%08llx-0x%08llx MEM 0x%08llx-0x%08llx\n",
+ (unsigned long long)pcic->mem_resource[1].start,
+ (unsigned long long)pcic->mem_resource[1].end,
+ (unsigned long long)pcic->mem_resource[0].start,
+ (unsigned long long)pcic->mem_resource[0].end);
+
+ /* register_pci_controller() will request MEM resource */
+ release_resource(&pcic->mem_resource[0]);
+ return pcic;
+ release_and_exit:
+ release_resource(&pcic->mem_resource[0]);
+ free_and_exit:
+ kfree(new);
+ printk(KERN_ERR "PCI: Failed to allocate resources.\n");
+ return NULL;
+}
+
+static int __init
+txx9_arch_pci_init(void)
+{
+ PCIBIOS_MIN_IO = 0x8000; /* reseve legacy I/O space */
+ return 0;
+}
+arch_initcall(txx9_arch_pci_init);
+
+/* IRQ/IDSEL mapping */
+int txx9_pci_option =
+#ifdef CONFIG_PICMG_PCI_BACKPLANE_DEFAULT
+ TXX9_PCI_OPT_PICMG |
+#endif
+ TXX9_PCI_OPT_CLK_AUTO;
+
+enum txx9_pci_err_action txx9_pci_err_action = TXX9_PCI_ERR_REPORT;
+
+#ifdef CONFIG_TOSHIBA_FPCIB0
+static irqreturn_t i8259_interrupt(int irq, void *dev_id)
+{
+ int isairq;
+
+ isairq = i8259_irq();
+ if (unlikely(isairq <= I8259A_IRQ_BASE))
+ return IRQ_NONE;
+ generic_handle_irq(isairq);
+ return IRQ_HANDLED;
+}
+
+static int __init
+txx9_i8259_irq_setup(int irq)
+{
+ int err;
+
+ init_i8259_irqs();
+ err = request_irq(irq, &i8259_interrupt, IRQF_DISABLED|IRQF_SHARED,
+ "cascade(i8259)", (void *)(long)irq);
+ if (!err)
+ printk(KERN_INFO "PCI-ISA bridge PIC (irq %d)\n", irq);
+ return err;
+}
+
+static void __init quirk_slc90e66_bridge(struct pci_dev *dev)
+{
+ int irq; /* PCI/ISA Bridge interrupt */
+ u8 reg_64;
+ u32 reg_b0;
+ u8 reg_e1;
+ irq = pcibios_map_irq(dev, PCI_SLOT(dev->devfn), 1); /* INTA */
+ if (!irq)
+ return;
+ txx9_i8259_irq_setup(irq);
+ pci_read_config_byte(dev, 0x64, ®_64);
+ pci_read_config_dword(dev, 0xb0, ®_b0);
+ pci_read_config_byte(dev, 0xe1, ®_e1);
+ /* serial irq control */
+ reg_64 = 0xd0;
+ /* serial irq pin */
+ reg_b0 |= 0x00010000;
+ /* ide irq on isa14 */
+ reg_e1 &= 0xf0;
+ reg_e1 |= 0x0d;
+ pci_write_config_byte(dev, 0x64, reg_64);
+ pci_write_config_dword(dev, 0xb0, reg_b0);
+ pci_write_config_byte(dev, 0xe1, reg_e1);
+
+ smsc_fdc37m81x_init(0x3f0);
+ smsc_fdc37m81x_config_beg();
+ smsc_fdc37m81x_config_set(SMSC_FDC37M81X_DNUM,
+ SMSC_FDC37M81X_KBD);
+ smsc_fdc37m81x_config_set(SMSC_FDC37M81X_INT, 1);
+ smsc_fdc37m81x_config_set(SMSC_FDC37M81X_INT2, 12);
+ smsc_fdc37m81x_config_set(SMSC_FDC37M81X_ACTIVE,
+ 1);
+ smsc_fdc37m81x_config_end();
+}
+
+static void quirk_slc90e66_ide(struct pci_dev *dev)
+{
+ unsigned char dat;
+ int regs[2] = {0x41, 0x43};
+ int i;
+
+ /* SMSC SLC90E66 IDE uses irq 14, 15 (default) */
+ pci_write_config_byte(dev, PCI_INTERRUPT_LINE, 14);
+ pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &dat);
+ printk(KERN_INFO "PCI: %s: IRQ %02x", pci_name(dev), dat);
+ /* enable SMSC SLC90E66 IDE */
+ for (i = 0; i < ARRAY_SIZE(regs); i++) {
+ pci_read_config_byte(dev, regs[i], &dat);
+ pci_write_config_byte(dev, regs[i], dat | 0x80);
+ pci_read_config_byte(dev, regs[i], &dat);
+ printk(KERN_CONT " IDETIM%d %02x", i, dat);
+ }
+ pci_read_config_byte(dev, 0x5c, &dat);
+ /*
+ * !!! DO NOT REMOVE THIS COMMENT IT IS REQUIRED BY SMSC !!!
+ *
+ * This line of code is intended to provide the user with a work
+ * around solution to the anomalies cited in SMSC's anomaly sheet
+ * entitled, "SLC90E66 Functional Rev.J_0.1 Anomalies"".
+ *
+ * !!! DO NOT REMOVE THIS COMMENT IT IS REQUIRED BY SMSC !!!
+ */
+ dat |= 0x01;
+ pci_write_config_byte(dev, regs[i], dat);
+ pci_read_config_byte(dev, 0x5c, &dat);
+ printk(KERN_CONT " REG5C %02x", dat);
+ printk(KERN_CONT "\n");
+}
+#endif /* CONFIG_TOSHIBA_FPCIB0 */
+
+static void final_fixup(struct pci_dev *dev)
+{
+ unsigned char bist;
+
+ /* Do build-in self test */
+ if (pci_read_config_byte(dev, PCI_BIST, &bist) == PCIBIOS_SUCCESSFUL &&
+ (bist & PCI_BIST_CAPABLE)) {
+ unsigned long timeout;
+ pci_set_power_state(dev, PCI_D0);
+ printk(KERN_INFO "PCI: %s BIST...", pci_name(dev));
+ pci_write_config_byte(dev, PCI_BIST, PCI_BIST_START);
+ timeout = jiffies + HZ * 2; /* timeout after 2 sec */
+ do {
+ pci_read_config_byte(dev, PCI_BIST, &bist);
+ if (time_after(jiffies, timeout))
+ break;
+ } while (bist & PCI_BIST_START);
+ if (bist & (PCI_BIST_CODE_MASK | PCI_BIST_START))
+ printk(KERN_CONT "failed. (0x%x)\n", bist);
+ else
+ printk(KERN_CONT "OK.\n");
+ }
+}
+
+#ifdef CONFIG_TOSHIBA_FPCIB0
+#define PCI_DEVICE_ID_EFAR_SLC90E66_0 0x9460
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_EFAR, PCI_DEVICE_ID_EFAR_SLC90E66_0,
+ quirk_slc90e66_bridge);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_EFAR, PCI_DEVICE_ID_EFAR_SLC90E66_1,
+ quirk_slc90e66_ide);
+DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_EFAR, PCI_DEVICE_ID_EFAR_SLC90E66_1,
+ quirk_slc90e66_ide);
+#endif
+DECLARE_PCI_FIXUP_FINAL(PCI_ANY_ID, PCI_ANY_ID, final_fixup);
+DECLARE_PCI_FIXUP_RESUME(PCI_ANY_ID, PCI_ANY_ID, final_fixup);
+
+int pcibios_plat_dev_init(struct pci_dev *dev)
+{
+ return 0;
+}
+
+int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
+{
+ return txx9_board_vec->pci_map_irq(dev, slot, pin);
+}
--- /dev/null
+/*
+ * linux/arch/mips/txx9/generic/setup.c
+ *
+ * Based on linux/arch/mips/txx9/rbtx4938/setup.c,
+ * and RBTX49xx patch from CELF patch archive.
+ *
+ * 2003-2005 (c) MontaVista Software, Inc.
+ * (C) Copyright TOSHIBA CORPORATION 2000-2001, 2004-2007
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/interrupt.h>
+#include <linux/string.h>
+#include <linux/module.h>
+#include <linux/clk.h>
+#include <linux/err.h>
+#include <asm/bootinfo.h>
+#include <asm/txx9/generic.h>
+#ifdef CONFIG_CPU_TX49XX
+#include <asm/txx9/tx4938.h>
+#endif
+
+/* EBUSC settings of TX4927, etc. */
+struct resource txx9_ce_res[8];
+static char txx9_ce_res_name[8][4]; /* "CEn" */
+
+/* pcode, internal register */
+char txx9_pcode_str[8];
+static struct resource txx9_reg_res = {
+ .name = txx9_pcode_str,
+ .flags = IORESOURCE_MEM,
+};
+void __init
+txx9_reg_res_init(unsigned int pcode, unsigned long base, unsigned long size)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(txx9_ce_res); i++) {
+ sprintf(txx9_ce_res_name[i], "CE%d", i);
+ txx9_ce_res[i].flags = IORESOURCE_MEM;
+ txx9_ce_res[i].name = txx9_ce_res_name[i];
+ }
+
+ sprintf(txx9_pcode_str, "TX%x", pcode);
+ if (base) {
+ txx9_reg_res.start = base & 0xfffffffffULL;
+ txx9_reg_res.end = (base & 0xfffffffffULL) + (size - 1);
+ request_resource(&iomem_resource, &txx9_reg_res);
+ }
+}
+
+/* clocks */
+unsigned int txx9_master_clock;
+unsigned int txx9_cpu_clock;
+unsigned int txx9_gbus_clock;
+
+
+/* Minimum CLK support */
+
+struct clk *clk_get(struct device *dev, const char *id)
+{
+ if (!strcmp(id, "spi-baseclk"))
+ return (struct clk *)(txx9_gbus_clock / 2 / 4);
+ if (!strcmp(id, "imbus_clk"))
+ return (struct clk *)(txx9_gbus_clock / 2);
+ return ERR_PTR(-ENOENT);
+}
+EXPORT_SYMBOL(clk_get);
+
+int clk_enable(struct clk *clk)
+{
+ return 0;
+}
+EXPORT_SYMBOL(clk_enable);
+
+void clk_disable(struct clk *clk)
+{
+}
+EXPORT_SYMBOL(clk_disable);
+
+unsigned long clk_get_rate(struct clk *clk)
+{
+ return (unsigned long)clk;
+}
+EXPORT_SYMBOL(clk_get_rate);
+
+void clk_put(struct clk *clk)
+{
+}
+EXPORT_SYMBOL(clk_put);
+
+extern struct txx9_board_vec jmr3927_vec;
+extern struct txx9_board_vec rbtx4927_vec;
+extern struct txx9_board_vec rbtx4937_vec;
+extern struct txx9_board_vec rbtx4938_vec;
+
+struct txx9_board_vec *txx9_board_vec __initdata;
+static char txx9_system_type[32];
+
+void __init prom_init_cmdline(void)
+{
+ int argc = (int)fw_arg0;
+ char **argv = (char **)fw_arg1;
+ int i; /* Always ignore the "-c" at argv[0] */
+
+ /* ignore all built-in args if any f/w args given */
+ if (argc > 1)
+ *arcs_cmdline = '\0';
+
+ for (i = 1; i < argc; i++) {
+ if (i != 1)
+ strcat(arcs_cmdline, " ");
+ strcat(arcs_cmdline, argv[i]);
+ }
+}
+
+void __init prom_init(void)
+{
+#ifdef CONFIG_CPU_TX39XX
+ txx9_board_vec = &jmr3927_vec;
+#endif
+#ifdef CONFIG_CPU_TX49XX
+ switch (TX4938_REV_PCODE()) {
+ case 0x4927:
+ txx9_board_vec = &rbtx4927_vec;
+ break;
+ case 0x4937:
+ txx9_board_vec = &rbtx4937_vec;
+ break;
+ case 0x4938:
+ txx9_board_vec = &rbtx4938_vec;
+ break;
+ }
+#endif
+
+ strcpy(txx9_system_type, txx9_board_vec->system);
+
+ txx9_board_vec->prom_init();
+}
+
+void __init prom_free_prom_memory(void)
+{
+}
+
+const char *get_system_type(void)
+{
+ return txx9_system_type;
+}
+
+char * __init prom_getcmdline(void)
+{
+ return &(arcs_cmdline[0]);
+}
+
+/* wrappers */
+void __init plat_mem_setup(void)
+{
+ txx9_board_vec->mem_setup();
+}
+
+void __init arch_init_irq(void)
+{
+ txx9_board_vec->irq_setup();
+}
+
+void __init plat_time_init(void)
+{
+ txx9_board_vec->time_init();
+}
+
+static int __init _txx9_arch_init(void)
+{
+ if (txx9_board_vec->arch_init)
+ txx9_board_vec->arch_init();
+ return 0;
+}
+arch_initcall(_txx9_arch_init);
+
+static int __init _txx9_device_init(void)
+{
+ if (txx9_board_vec->device_init)
+ txx9_board_vec->device_init();
+ return 0;
+}
+device_initcall(_txx9_device_init);
+
+int (*txx9_irq_dispatch)(int pending);
+asmlinkage void plat_irq_dispatch(void)
+{
+ int pending = read_c0_status() & read_c0_cause() & ST0_IM;
+ int irq = txx9_irq_dispatch(pending);
+
+ if (likely(irq >= 0))
+ do_IRQ(irq);
+ else
+ spurious_interrupt();
+}
+
+/* see include/asm-mips/mach-tx39xx/mangle-port.h, for example. */
+#ifdef NEEDS_TXX9_SWIZZLE_ADDR_B
+static unsigned long __swizzle_addr_none(unsigned long port)
+{
+ return port;
+}
+unsigned long (*__swizzle_addr_b)(unsigned long port) = __swizzle_addr_none;
+EXPORT_SYMBOL(__swizzle_addr_b);
+#endif
#include <linux/init.h>
#include <linux/types.h>
#include <asm/io.h>
-#include <asm/tx4927/smsc_fdc37m81x.h>
+#include <asm/txx9/smsc_fdc37m81x.h>
#define DEBUG
# Makefile for TOSHIBA JMR-TX3927 board
#
-obj-y += init.o irq.o setup.o
-obj-$(CONFIG_KGDB) += kgdb_io.o
+obj-y += prom.o irq.o setup.o
+obj-$(CONFIG_KGDB) += kgdb_io.o
EXTRA_CFLAGS += -Werror
#include <asm/system.h>
#include <asm/processor.h>
-#include <asm/jmr3927/jmr3927.h>
+#include <asm/txx9/generic.h>
+#include <asm/txx9/jmr3927.h>
#if JMR3927_IRQ_END > NR_IRQS
#error JMR3927_IRQ_END > NR_IRQS
(void)jmr3927_ioc_reg_in(JMR3927_IOC_REV_ADDR);
}
-asmlinkage void plat_irq_dispatch(void)
-{
- unsigned long cp0_cause = read_c0_cause();
- int irq;
-
- if ((cp0_cause & CAUSEF_IP7) == 0)
- return;
- irq = (cp0_cause >> CAUSEB_IP2) & 0x0f;
-
- do_IRQ(irq + JMR3927_IRQ_IRC);
-}
-
-static irqreturn_t jmr3927_ioc_interrupt(int irq, void *dev_id)
+static int jmr3927_ioc_irqroute(void)
{
unsigned char istat = jmr3927_ioc_reg_in(JMR3927_IOC_INTS2_ADDR);
int i;
for (i = 0; i < JMR3927_NR_IRQ_IOC; i++) {
- if (istat & (1 << i)) {
- irq = JMR3927_IRQ_IOC + i;
- do_IRQ(irq);
- }
+ if (istat & (1 << i))
+ return JMR3927_IRQ_IOC + i;
}
- return IRQ_HANDLED;
+ return -1;
}
-static struct irqaction ioc_action = {
- .handler = jmr3927_ioc_interrupt,
- .mask = CPU_MASK_NONE,
- .name = "IOC",
-};
+static int jmr3927_irq_dispatch(int pending)
+{
+ int irq;
+ if ((pending & CAUSEF_IP7) == 0)
+ return -1;
+ irq = (pending >> CAUSEB_IP2) & 0x0f;
+ irq += JMR3927_IRQ_IRC;
+ if (irq == JMR3927_IRQ_IOCINT)
+ irq = jmr3927_ioc_irqroute();
+ return irq;
+}
+
+#ifdef CONFIG_PCI
static irqreturn_t jmr3927_pcierr_interrupt(int irq, void *dev_id)
{
printk(KERN_WARNING "PCI error interrupt (irq 0x%x).\n", irq);
.mask = CPU_MASK_NONE,
.name = "PCI error",
};
+#endif
static void __init jmr3927_irq_init(void);
-void __init arch_init_irq(void)
+void __init jmr3927_irq_setup(void)
{
+ txx9_irq_dispatch = jmr3927_irq_dispatch;
/* Now, interrupt control disabled, */
/* all IRC interrupts are masked, */
/* all IRC interrupt mode are Low Active. */
jmr3927_irq_init();
/* setup IOC interrupt 1 (PCI, MODEM) */
- setup_irq(JMR3927_IRQ_IOCINT, &ioc_action);
+ set_irq_chained_handler(JMR3927_IRQ_IOCINT, handle_simple_irq);
#ifdef CONFIG_PCI
setup_irq(JMR3927_IRQ_IRC_PCI, &pcierr_action);
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
-#include <asm/jmr3927/jmr3927.h>
+#include <asm/txx9/jmr3927.h>
#define TIMEOUT 0xffffff
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
-#include <linux/kernel.h>
#include <linux/init.h>
-#include <linux/string.h>
-
#include <asm/bootinfo.h>
+#include <asm/txx9/generic.h>
+#include <asm/txx9/jmr3927.h>
-char * __init prom_getcmdline(void)
-{
- return &(arcs_cmdline[0]);
-}
+#define TIMEOUT 0xffffff
-void __init prom_init_cmdline(void)
+void
+prom_putchar(char c)
{
- char *cp;
- int actr;
- int prom_argc = fw_arg0;
- char **prom_argv = (char **) fw_arg1;
+ int i = 0;
- actr = 1; /* Always ignore argv[0] */
+ do {
+ i++;
+ if (i>TIMEOUT)
+ break;
+ } while (!(tx3927_sioptr(1)->cisr & TXx927_SICISR_TXALS));
+ tx3927_sioptr(1)->tfifo = c;
+ return;
+}
- cp = &(arcs_cmdline[0]);
- while(actr < prom_argc) {
- strcpy(cp, prom_argv[actr]);
- cp += strlen(prom_argv[actr]);
- *cp++ = ' ';
- actr++;
- }
- if (cp != &(arcs_cmdline[0])) /* get rid of trailing space */
- --cp;
- *cp = '\0';
+void
+puts(const char *cp)
+{
+ while (*cp)
+ prom_putchar(*cp++);
+ prom_putchar('\r');
+ prom_putchar('\n');
}
-void __init prom_free_prom_memory(void)
+void __init jmr3927_prom_init(void)
{
+ /* CCFG */
+ if ((tx3927_ccfgptr->ccfg & TX3927_CCFG_TLBOFF) == 0)
+ puts("Warning: TX3927 TLB off\n");
+
+ prom_init_cmdline();
+ add_memory_region(0, JMR3927_SDRAM_SIZE, BOOT_MEM_RAM);
}
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/types.h>
-#include <linux/pci.h>
#include <linux/ioport.h>
#include <linux/delay.h>
#include <linux/pm.h>
#include <linux/platform_device.h>
-#include <linux/clk.h>
#include <linux/gpio.h>
#ifdef CONFIG_SERIAL_TXX9
#include <linux/serial_core.h>
#endif
-
#include <asm/txx9tmr.h>
#include <asm/txx9pio.h>
#include <asm/reboot.h>
-#include <asm/jmr3927/jmr3927.h>
+#include <asm/txx9/generic.h>
+#include <asm/txx9/pci.h>
+#include <asm/txx9/jmr3927.h>
#include <asm/mipsregs.h>
extern void puts(const char *cp);
while (1);
}
-void __init plat_time_init(void)
+static void __init jmr3927_time_init(void)
{
txx9_clockevent_init(TX3927_TMR_REG(0),
TXX9_IRQ_BASE + JMR3927_IRQ_IRC_TMR(0),
#define DO_WRITE_THROUGH
#define DO_ENABLE_CACHE
-extern char * __init prom_getcmdline(void);
static void jmr3927_board_init(void);
-extern struct resource pci_io_resource;
-extern struct resource pci_mem_resource;
-void __init plat_mem_setup(void)
+static void __init jmr3927_mem_setup(void)
{
char *argptr;
/*
* IO/MEM resources.
*/
- ioport_resource.start = pci_io_resource.start;
- ioport_resource.end = pci_io_resource.end;
+ ioport_resource.start = 0;
+ ioport_resource.end = 0xffffffff;
iomem_resource.start = 0;
iomem_resource.end = 0xffffffff;
static void tx3927_setup(void);
+static void __init jmr3927_pci_setup(void)
+{
+#ifdef CONFIG_PCI
+ int extarb = !(tx3927_ccfgptr->ccfg & TX3927_CCFG_PCIXARB);
+ struct pci_controller *c;
+
+ c = txx9_alloc_pci_controller(&txx9_primary_pcic,
+ JMR3927_PCIMEM, JMR3927_PCIMEM_SIZE,
+ JMR3927_PCIIO, JMR3927_PCIIO_SIZE);
+ register_pci_controller(c);
+ if (!extarb) {
+ /* Reset PCI Bus */
+ jmr3927_ioc_reg_out(0, JMR3927_IOC_RESET_ADDR);
+ udelay(100);
+ jmr3927_ioc_reg_out(JMR3927_IOC_RESET_PCI,
+ JMR3927_IOC_RESET_ADDR);
+ udelay(100);
+ jmr3927_ioc_reg_out(0, JMR3927_IOC_RESET_ADDR);
+ }
+ tx3927_pcic_setup(c, JMR3927_SDRAM_SIZE, extarb);
+#endif /* CONFIG_PCI */
+}
+
static void __init jmr3927_board_init(void)
{
tx3927_setup();
+ jmr3927_pci_setup();
/* SIO0 DTR on */
jmr3927_ioc_reg_out(0, JMR3927_IOC_DTR_ADDR);
static void __init tx3927_setup(void)
{
int i;
-#ifdef CONFIG_PCI
- unsigned long mips_pci_io_base = JMR3927_PCIIO;
- unsigned long mips_pci_io_size = JMR3927_PCIIO_SIZE;
- unsigned long mips_pci_mem_base = JMR3927_PCIMEM;
- unsigned long mips_pci_mem_size = JMR3927_PCIMEM_SIZE;
- /* for legacy I/O, PCI I/O PCI Bus address must be 0 */
- unsigned long mips_pci_io_pciaddr = 0;
-#endif
+ txx9_cpu_clock = JMR3927_CORECLK;
+ txx9_gbus_clock = JMR3927_GBUSCLK;
/* SDRAMC are configured by PROM */
/* ROMC */
tx3927_dmaptr->mcr = TX3927_DMA_MCR_MSTEN | TX3927_DMA_MCR_LE;
#endif
-#ifdef CONFIG_PCI
- /* PCIC */
- printk("TX3927 PCIC -- DID:%04x VID:%04x RID:%02x Arbiter:",
- tx3927_pcicptr->did, tx3927_pcicptr->vid,
- tx3927_pcicptr->rid);
- if (!(tx3927_ccfgptr->ccfg & TX3927_CCFG_PCIXARB)) {
- printk("External\n");
- /* XXX */
- } else {
- printk("Internal\n");
-
- /* Reset PCI Bus */
- jmr3927_ioc_reg_out(0, JMR3927_IOC_RESET_ADDR);
- udelay(100);
- jmr3927_ioc_reg_out(JMR3927_IOC_RESET_PCI,
- JMR3927_IOC_RESET_ADDR);
- udelay(100);
- jmr3927_ioc_reg_out(0, JMR3927_IOC_RESET_ADDR);
-
-
- /* Disable External PCI Config. Access */
- tx3927_pcicptr->lbc = TX3927_PCIC_LBC_EPCAD;
-#ifdef __BIG_ENDIAN
- tx3927_pcicptr->lbc |= TX3927_PCIC_LBC_IBSE |
- TX3927_PCIC_LBC_TIBSE |
- TX3927_PCIC_LBC_TMFBSE | TX3927_PCIC_LBC_MSDSE;
-#endif
- /* LB->PCI mappings */
- tx3927_pcicptr->iomas = ~(mips_pci_io_size - 1);
- tx3927_pcicptr->ilbioma = mips_pci_io_base;
- tx3927_pcicptr->ipbioma = mips_pci_io_pciaddr;
- tx3927_pcicptr->mmas = ~(mips_pci_mem_size - 1);
- tx3927_pcicptr->ilbmma = mips_pci_mem_base;
- tx3927_pcicptr->ipbmma = mips_pci_mem_base;
- /* PCI->LB mappings */
- tx3927_pcicptr->iobas = 0xffffffff;
- tx3927_pcicptr->ioba = 0;
- tx3927_pcicptr->tlbioma = 0;
- tx3927_pcicptr->mbas = ~(mips_pci_mem_size - 1);
- tx3927_pcicptr->mba = 0;
- tx3927_pcicptr->tlbmma = 0;
- /* Enable Direct mapping Address Space Decoder */
- tx3927_pcicptr->lbc |= TX3927_PCIC_LBC_ILMDE | TX3927_PCIC_LBC_ILIDE;
-
- /* Clear All Local Bus Status */
- tx3927_pcicptr->lbstat = TX3927_PCIC_LBIM_ALL;
- /* Enable All Local Bus Interrupts */
- tx3927_pcicptr->lbim = TX3927_PCIC_LBIM_ALL;
- /* Clear All PCI Status Error */
- tx3927_pcicptr->pcistat = TX3927_PCIC_PCISTATIM_ALL;
- /* Enable All PCI Status Error Interrupts */
- tx3927_pcicptr->pcistatim = TX3927_PCIC_PCISTATIM_ALL;
-
- /* PCIC Int => IRC IRQ10 */
- tx3927_pcicptr->il = TX3927_IR_PCI;
- /* Target Control (per errata) */
- tx3927_pcicptr->tc = TX3927_PCIC_TC_OF8E | TX3927_PCIC_TC_IF8E;
-
- /* Enable Bus Arbiter */
- tx3927_pcicptr->pbapmc = TX3927_PCIC_PBAPMC_PBAEN;
-
- tx3927_pcicptr->pcicmd = PCI_COMMAND_MASTER |
- PCI_COMMAND_MEMORY |
- PCI_COMMAND_IO |
- PCI_COMMAND_PARITY | PCI_COMMAND_SERR;
- }
-#endif /* CONFIG_PCI */
-
/* PIO */
/* PIO[15:12] connected to LEDs */
__raw_writel(0x0000f000, &tx3927_pioptr->dir);
}
/* This trick makes rtc-ds1742 driver usable as is. */
-unsigned long __swizzle_addr_b(unsigned long port)
+static unsigned long jmr3927_swizzle_addr_b(unsigned long port)
{
if ((port & 0xffff0000) != JMR3927_IOC_NVRAMB_ADDR)
return port;
return port | 1;
#endif
}
-EXPORT_SYMBOL(__swizzle_addr_b);
static int __init jmr3927_rtc_init(void)
{
dev = platform_device_register_simple("rtc-ds1742", -1, &res, 1);
return IS_ERR(dev) ? PTR_ERR(dev) : 0;
}
-device_initcall(jmr3927_rtc_init);
/* Watchdog support */
{
return txx9_wdt_init(TX3927_TMR_REG(2));
}
-device_initcall(jmr3927_wdt_init);
-/* Minimum CLK support */
-
-struct clk *clk_get(struct device *dev, const char *id)
+static void __init jmr3927_device_init(void)
{
- if (!strcmp(id, "imbus_clk"))
- return (struct clk *)JMR3927_IMCLK;
- return ERR_PTR(-ENOENT);
+ __swizzle_addr_b = jmr3927_swizzle_addr_b;
+ jmr3927_rtc_init();
+ jmr3927_wdt_init();
}
-EXPORT_SYMBOL(clk_get);
-int clk_enable(struct clk *clk)
-{
- return 0;
-}
-EXPORT_SYMBOL(clk_enable);
-
-void clk_disable(struct clk *clk)
-{
-}
-EXPORT_SYMBOL(clk_disable);
-
-unsigned long clk_get_rate(struct clk *clk)
-{
- return (unsigned long)clk;
-}
-EXPORT_SYMBOL(clk_get_rate);
-
-void clk_put(struct clk *clk)
-{
-}
-EXPORT_SYMBOL(clk_put);
+struct txx9_board_vec jmr3927_vec __initdata = {
+ .system = "Toshiba JMR_TX3927",
+ .prom_init = jmr3927_prom_init,
+ .mem_setup = jmr3927_mem_setup,
+ .irq_setup = jmr3927_irq_setup,
+ .time_init = jmr3927_time_init,
+ .device_init = jmr3927_device_init,
+#ifdef CONFIG_PCI
+ .pci_map_irq = jmr3927_pci_map_irq,
+#endif
+};
--- /dev/null
+obj-y += prom.o setup.o irq.o
+
+EXTRA_CFLAGS += -Werror
--- /dev/null
+/*
+ * Toshiba RBTX4927 specific interrupt handlers
+ *
+ * Author: MontaVista Software, Inc.
+ * source@mvista.com
+ *
+ * Copyright 2001-2002 MontaVista Software Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+/*
+IRQ Device
+00 RBTX4927-ISA/00
+01 RBTX4927-ISA/01 PS2/Keyboard
+02 RBTX4927-ISA/02 Cascade RBTX4927-ISA (irqs 8-15)
+03 RBTX4927-ISA/03
+04 RBTX4927-ISA/04
+05 RBTX4927-ISA/05
+06 RBTX4927-ISA/06
+07 RBTX4927-ISA/07
+08 RBTX4927-ISA/08
+09 RBTX4927-ISA/09
+10 RBTX4927-ISA/10
+11 RBTX4927-ISA/11
+12 RBTX4927-ISA/12 PS2/Mouse (not supported at this time)
+13 RBTX4927-ISA/13
+14 RBTX4927-ISA/14 IDE
+15 RBTX4927-ISA/15
+
+16 TX4927-CP0/00 Software 0
+17 TX4927-CP0/01 Software 1
+18 TX4927-CP0/02 Cascade TX4927-CP0
+19 TX4927-CP0/03 Multiplexed -- do not use
+20 TX4927-CP0/04 Multiplexed -- do not use
+21 TX4927-CP0/05 Multiplexed -- do not use
+22 TX4927-CP0/06 Multiplexed -- do not use
+23 TX4927-CP0/07 CPU TIMER
+
+24 TX4927-PIC/00
+25 TX4927-PIC/01
+26 TX4927-PIC/02
+27 TX4927-PIC/03 Cascade RBTX4927-IOC
+28 TX4927-PIC/04
+29 TX4927-PIC/05 RBTX4927 RTL-8019AS ethernet
+30 TX4927-PIC/06
+31 TX4927-PIC/07
+32 TX4927-PIC/08 TX4927 SerialIO Channel 0
+33 TX4927-PIC/09 TX4927 SerialIO Channel 1
+34 TX4927-PIC/10
+35 TX4927-PIC/11
+36 TX4927-PIC/12
+37 TX4927-PIC/13
+38 TX4927-PIC/14
+39 TX4927-PIC/15
+40 TX4927-PIC/16 TX4927 PCI PCI-C
+41 TX4927-PIC/17
+42 TX4927-PIC/18
+43 TX4927-PIC/19
+44 TX4927-PIC/20
+45 TX4927-PIC/21
+46 TX4927-PIC/22 TX4927 PCI PCI-ERR
+47 TX4927-PIC/23 TX4927 PCI PCI-PMA (not used)
+48 TX4927-PIC/24
+49 TX4927-PIC/25
+50 TX4927-PIC/26
+51 TX4927-PIC/27
+52 TX4927-PIC/28
+53 TX4927-PIC/29
+54 TX4927-PIC/30
+55 TX4927-PIC/31
+
+56 RBTX4927-IOC/00 FPCIB0 PCI-D PJ4/A PJ5/B SB/C PJ6/D PJ7/A (SouthBridge/NotUsed) [RTL-8139=PJ4]
+57 RBTX4927-IOC/01 FPCIB0 PCI-C PJ4/D PJ5/A SB/B PJ6/C PJ7/D (SouthBridge/NotUsed) [RTL-8139=PJ5]
+58 RBTX4927-IOC/02 FPCIB0 PCI-B PJ4/C PJ5/D SB/A PJ6/B PJ7/C (SouthBridge/IDE/pin=1,INTR) [RTL-8139=NotSupported]
+59 RBTX4927-IOC/03 FPCIB0 PCI-A PJ4/B PJ5/C SB/D PJ6/A PJ7/B (SouthBridge/USB/pin=4) [RTL-8139=PJ6]
+60 RBTX4927-IOC/04
+61 RBTX4927-IOC/05
+62 RBTX4927-IOC/06
+63 RBTX4927-IOC/07
+
+NOTES:
+SouthBridge/INTR is mapped to SouthBridge/A=PCI-B/#58
+SouthBridge/ISA/pin=0 no pci irq used by this device
+SouthBridge/IDE/pin=1 no pci irq used by this device, using INTR via ISA IRQ14
+SouthBridge/USB/pin=4 using pci irq SouthBridge/D=PCI-A=#59
+SouthBridge/PMC/pin=0 no pci irq used by this device
+SuperIO/PS2/Keyboard, using INTR via ISA IRQ1
+SuperIO/PS2/Mouse, using INTR via ISA IRQ12 (mouse not currently supported)
+JP7 is not bus master -- do NOT use -- only 4 pci bus master's allowed -- SouthBridge, JP4, JP5, JP6
+*/
+
+#include <linux/init.h>
+#include <linux/types.h>
+#include <linux/interrupt.h>
+#include <asm/io.h>
+#include <asm/mipsregs.h>
+#include <asm/txx9/generic.h>
+#include <asm/txx9/rbtx4927.h>
+
+static void toshiba_rbtx4927_irq_ioc_enable(unsigned int irq);
+static void toshiba_rbtx4927_irq_ioc_disable(unsigned int irq);
+
+#define TOSHIBA_RBTX4927_IOC_NAME "RBTX4927-IOC"
+static struct irq_chip toshiba_rbtx4927_irq_ioc_type = {
+ .name = TOSHIBA_RBTX4927_IOC_NAME,
+ .ack = toshiba_rbtx4927_irq_ioc_disable,
+ .mask = toshiba_rbtx4927_irq_ioc_disable,
+ .mask_ack = toshiba_rbtx4927_irq_ioc_disable,
+ .unmask = toshiba_rbtx4927_irq_ioc_enable,
+};
+#define TOSHIBA_RBTX4927_IOC_INTR_ENAB (void __iomem *)0xbc002000UL
+#define TOSHIBA_RBTX4927_IOC_INTR_STAT (void __iomem *)0xbc002006UL
+
+static int toshiba_rbtx4927_irq_nested(int sw_irq)
+{
+ u8 level3;
+
+ level3 = readb(TOSHIBA_RBTX4927_IOC_INTR_STAT) & 0x1f;
+ if (level3)
+ sw_irq = RBTX4927_IRQ_IOC + fls(level3) - 1;
+ return (sw_irq);
+}
+
+static void __init toshiba_rbtx4927_irq_ioc_init(void)
+{
+ int i;
+
+ for (i = RBTX4927_IRQ_IOC;
+ i < RBTX4927_IRQ_IOC + RBTX4927_NR_IRQ_IOC; i++)
+ set_irq_chip_and_handler(i, &toshiba_rbtx4927_irq_ioc_type,
+ handle_level_irq);
+ set_irq_chained_handler(RBTX4927_IRQ_IOCINT, handle_simple_irq);
+}
+
+static void toshiba_rbtx4927_irq_ioc_enable(unsigned int irq)
+{
+ unsigned char v;
+
+ v = readb(TOSHIBA_RBTX4927_IOC_INTR_ENAB);
+ v |= (1 << (irq - RBTX4927_IRQ_IOC));
+ writeb(v, TOSHIBA_RBTX4927_IOC_INTR_ENAB);
+}
+
+static void toshiba_rbtx4927_irq_ioc_disable(unsigned int irq)
+{
+ unsigned char v;
+
+ v = readb(TOSHIBA_RBTX4927_IOC_INTR_ENAB);
+ v &= ~(1 << (irq - RBTX4927_IRQ_IOC));
+ writeb(v, TOSHIBA_RBTX4927_IOC_INTR_ENAB);
+ mmiowb();
+}
+
+
+static int rbtx4927_irq_dispatch(int pending)
+{
+ int irq;
+
+ if (pending & STATUSF_IP7) /* cpu timer */
+ irq = MIPS_CPU_IRQ_BASE + 7;
+ else if (pending & STATUSF_IP2) { /* tx4927 pic */
+ irq = txx9_irq();
+ if (irq == RBTX4927_IRQ_IOCINT)
+ irq = toshiba_rbtx4927_irq_nested(irq);
+ } else if (pending & STATUSF_IP0) /* user line 0 */
+ irq = MIPS_CPU_IRQ_BASE + 0;
+ else if (pending & STATUSF_IP1) /* user line 1 */
+ irq = MIPS_CPU_IRQ_BASE + 1;
+ else
+ irq = -1;
+ return irq;
+}
+
+void __init rbtx4927_irq_setup(void)
+{
+ txx9_irq_dispatch = rbtx4927_irq_dispatch;
+ tx4927_irq_init();
+ toshiba_rbtx4927_irq_ioc_init();
+ /* Onboard 10M Ether: High Active */
+ set_irq_type(RBTX4927_RTL_8019_IRQ, IRQF_TRIGGER_HIGH);
+}
/*
- * linux/arch/mips/tx4927/common/tx4927_dbgio.c
- *
- * kgdb interface for gdb
+ * rbtx4927 specific prom routines
*
* Author: MontaVista Software, Inc.
* source@mvista.com
*
* Copyright 2001-2002 MontaVista Software Inc.
*
+ * Copyright (C) 2004 MontaVista Software Inc.
+ * Author: Manish Lachwani, mlachwani@mvista.com
+ *
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
+#include <linux/init.h>
+#include <asm/bootinfo.h>
+#include <asm/txx9/generic.h>
+#include <asm/txx9/rbtx4927.h>
-#include <asm/mipsregs.h>
-#include <asm/system.h>
-
-u8 getDebugChar(void)
+void __init rbtx4927_prom_init(void)
{
- extern u8 txx9_sio_kdbg_rd(void);
- return (txx9_sio_kdbg_rd());
-}
-
+ extern int tx4927_get_mem_size(void);
+ int msize;
-int putDebugChar(u8 byte)
-{
- extern int txx9_sio_kdbg_wr( u8 ch );
- return (txx9_sio_kdbg_wr(byte));
+ prom_init_cmdline();
+ msize = tx4927_get_mem_size();
+ add_memory_region(0, msize << 20, BOOT_MEM_RAM);
}
--- /dev/null
+/*
+ * Toshiba rbtx4927 specific setup
+ *
+ * Author: MontaVista Software, Inc.
+ * source@mvista.com
+ *
+ * Copyright 2001-2002 MontaVista Software Inc.
+ *
+ * Copyright (C) 1996, 97, 2001, 04 Ralf Baechle (ralf@linux-mips.org)
+ * Copyright (C) 2000 RidgeRun, Inc.
+ * Author: RidgeRun, Inc.
+ * glonnon@ridgerun.com, skranz@ridgerun.com, stevej@ridgerun.com
+ *
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: jsun@mvista.com or jsun@junsun.net
+ *
+ * Copyright 2002 MontaVista Software Inc.
+ * Author: Michael Pruznick, michael_pruznick@mvista.com
+ *
+ * Copyright (C) 2000-2001 Toshiba Corporation
+ *
+ * Copyright (C) 2004 MontaVista Software Inc.
+ * Author: Manish Lachwani, mlachwani@mvista.com
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/ioport.h>
+#include <linux/interrupt.h>
+#include <linux/pm.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <asm/io.h>
+#include <asm/processor.h>
+#include <asm/reboot.h>
+#include <asm/time.h>
+#include <asm/txx9tmr.h>
+#include <asm/txx9/generic.h>
+#include <asm/txx9/pci.h>
+#include <asm/txx9/rbtx4927.h>
+#include <asm/txx9/tx4938.h> /* for TX4937 */
+#ifdef CONFIG_SERIAL_TXX9
+#include <linux/serial_core.h>
+#endif
+
+static int tx4927_ccfg_toeon = 1;
+
+#ifdef CONFIG_PCI
+static void __init tx4927_pci_setup(void)
+{
+ int extarb = !(__raw_readq(&tx4927_ccfgptr->ccfg) & TX4927_CCFG_PCIARB);
+ struct pci_controller *c = &txx9_primary_pcic;
+
+ register_pci_controller(c);
+
+ if (__raw_readq(&tx4927_ccfgptr->ccfg) & TX4927_CCFG_PCI66)
+ txx9_pci_option =
+ (txx9_pci_option & ~TXX9_PCI_OPT_CLK_MASK) |
+ TXX9_PCI_OPT_CLK_66; /* already configured */
+
+ /* Reset PCI Bus */
+ writeb(1, rbtx4927_pcireset_addr);
+ /* Reset PCIC */
+ txx9_set64(&tx4927_ccfgptr->clkctr, TX4927_CLKCTR_PCIRST);
+ if ((txx9_pci_option & TXX9_PCI_OPT_CLK_MASK) ==
+ TXX9_PCI_OPT_CLK_66)
+ tx4927_pciclk66_setup();
+ mdelay(10);
+ /* clear PCIC reset */
+ txx9_clear64(&tx4927_ccfgptr->clkctr, TX4927_CLKCTR_PCIRST);
+ writeb(0, rbtx4927_pcireset_addr);
+ iob();
+
+ tx4927_report_pciclk();
+ tx4927_pcic_setup(tx4927_pcicptr, c, extarb);
+ if ((txx9_pci_option & TXX9_PCI_OPT_CLK_MASK) ==
+ TXX9_PCI_OPT_CLK_AUTO &&
+ txx9_pci66_check(c, 0, 0)) {
+ /* Reset PCI Bus */
+ writeb(1, rbtx4927_pcireset_addr);
+ /* Reset PCIC */
+ txx9_set64(&tx4927_ccfgptr->clkctr, TX4927_CLKCTR_PCIRST);
+ tx4927_pciclk66_setup();
+ mdelay(10);
+ /* clear PCIC reset */
+ txx9_clear64(&tx4927_ccfgptr->clkctr, TX4927_CLKCTR_PCIRST);
+ writeb(0, rbtx4927_pcireset_addr);
+ iob();
+ /* Reinitialize PCIC */
+ tx4927_report_pciclk();
+ tx4927_pcic_setup(tx4927_pcicptr, c, extarb);
+ }
+}
+
+static void __init tx4937_pci_setup(void)
+{
+ int extarb = !(__raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_PCIARB);
+ struct pci_controller *c = &txx9_primary_pcic;
+
+ register_pci_controller(c);
+
+ if (__raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_PCI66)
+ txx9_pci_option =
+ (txx9_pci_option & ~TXX9_PCI_OPT_CLK_MASK) |
+ TXX9_PCI_OPT_CLK_66; /* already configured */
+
+ /* Reset PCI Bus */
+ writeb(1, rbtx4927_pcireset_addr);
+ /* Reset PCIC */
+ txx9_set64(&tx4938_ccfgptr->clkctr, TX4938_CLKCTR_PCIRST);
+ if ((txx9_pci_option & TXX9_PCI_OPT_CLK_MASK) ==
+ TXX9_PCI_OPT_CLK_66)
+ tx4938_pciclk66_setup();
+ mdelay(10);
+ /* clear PCIC reset */
+ txx9_clear64(&tx4938_ccfgptr->clkctr, TX4938_CLKCTR_PCIRST);
+ writeb(0, rbtx4927_pcireset_addr);
+ iob();
+
+ tx4938_report_pciclk();
+ tx4927_pcic_setup(tx4938_pcicptr, c, extarb);
+ if ((txx9_pci_option & TXX9_PCI_OPT_CLK_MASK) ==
+ TXX9_PCI_OPT_CLK_AUTO &&
+ txx9_pci66_check(c, 0, 0)) {
+ /* Reset PCI Bus */
+ writeb(1, rbtx4927_pcireset_addr);
+ /* Reset PCIC */
+ txx9_set64(&tx4938_ccfgptr->clkctr, TX4938_CLKCTR_PCIRST);
+ tx4938_pciclk66_setup();
+ mdelay(10);
+ /* clear PCIC reset */
+ txx9_clear64(&tx4938_ccfgptr->clkctr, TX4938_CLKCTR_PCIRST);
+ writeb(0, rbtx4927_pcireset_addr);
+ iob();
+ /* Reinitialize PCIC */
+ tx4938_report_pciclk();
+ tx4927_pcic_setup(tx4938_pcicptr, c, extarb);
+ }
+}
+
+static void __init rbtx4927_arch_init(void)
+{
+ tx4927_pci_setup();
+}
+
+static void __init rbtx4937_arch_init(void)
+{
+ tx4937_pci_setup();
+}
+#else
+#define rbtx4927_arch_init NULL
+#define rbtx4937_arch_init NULL
+#endif /* CONFIG_PCI */
+
+static void __noreturn wait_forever(void)
+{
+ while (1)
+ if (cpu_wait)
+ (*cpu_wait)();
+}
+
+static void toshiba_rbtx4927_restart(char *command)
+{
+ printk(KERN_NOTICE "System Rebooting...\n");
+
+ /* enable the s/w reset register */
+ writeb(RBTX4927_SW_RESET_ENABLE_SET, RBTX4927_SW_RESET_ENABLE);
+
+ /* wait for enable to be seen */
+ while ((readb(RBTX4927_SW_RESET_ENABLE) &
+ RBTX4927_SW_RESET_ENABLE_SET) == 0x00);
+
+ /* do a s/w reset */
+ writeb(RBTX4927_SW_RESET_DO_SET, RBTX4927_SW_RESET_DO);
+
+ /* do something passive while waiting for reset */
+ local_irq_disable();
+ wait_forever();
+ /* no return */
+}
+
+static void toshiba_rbtx4927_halt(void)
+{
+ printk(KERN_NOTICE "System Halted\n");
+ local_irq_disable();
+ wait_forever();
+ /* no return */
+}
+
+static void toshiba_rbtx4927_power_off(void)
+{
+ toshiba_rbtx4927_halt();
+ /* no return */
+}
+
+static void __init rbtx4927_mem_setup(void)
+{
+ int i;
+ u32 cp0_config;
+ char *argptr;
+
+ /* f/w leaves this on at startup */
+ clear_c0_status(ST0_ERL);
+
+ /* enable caches -- HCP5 does this, pmon does not */
+ cp0_config = read_c0_config();
+ cp0_config = cp0_config & ~(TX49_CONF_IC | TX49_CONF_DC);
+ write_c0_config(cp0_config);
+
+ ioport_resource.end = 0xffffffff;
+ iomem_resource.end = 0xffffffff;
+
+ _machine_restart = toshiba_rbtx4927_restart;
+ _machine_halt = toshiba_rbtx4927_halt;
+ pm_power_off = toshiba_rbtx4927_power_off;
+
+ for (i = 0; i < TX4927_NR_TMR; i++)
+ txx9_tmr_init(TX4927_TMR_REG(0) & 0xfffffffffULL);
+
+#ifdef CONFIG_PCI
+ txx9_alloc_pci_controller(&txx9_primary_pcic,
+ RBTX4927_PCIMEM, RBTX4927_PCIMEM_SIZE,
+ RBTX4927_PCIIO, RBTX4927_PCIIO_SIZE);
+#else
+ set_io_port_base(KSEG1 + RBTX4927_ISA_IO_OFFSET);
+#endif
+
+ /* CCFG */
+ /* do reset on watchdog */
+ tx4927_ccfg_set(TX4927_CCFG_WR);
+ /* enable Timeout BusError */
+ if (tx4927_ccfg_toeon)
+ tx4927_ccfg_set(TX4927_CCFG_TOE);
+
+#ifdef CONFIG_SERIAL_TXX9
+ {
+ extern int early_serial_txx9_setup(struct uart_port *port);
+ struct uart_port req;
+ for(i = 0; i < 2; i++) {
+ memset(&req, 0, sizeof(req));
+ req.line = i;
+ req.iotype = UPIO_MEM;
+ req.membase = (char *)(0xff1ff300 + i * 0x100);
+ req.mapbase = 0xff1ff300 + i * 0x100;
+ req.irq = TXX9_IRQ_BASE + TX4927_IR_SIO(i);
+ req.flags |= UPF_BUGGY_UART /*HAVE_CTS_LINE*/;
+ req.uartclk = 50000000;
+ early_serial_txx9_setup(&req);
+ }
+ }
+#ifdef CONFIG_SERIAL_TXX9_CONSOLE
+ argptr = prom_getcmdline();
+ if (strstr(argptr, "console=") == NULL) {
+ strcat(argptr, " console=ttyS0,38400");
+ }
+#endif
+#endif
+
+#ifdef CONFIG_ROOT_NFS
+ argptr = prom_getcmdline();
+ if (strstr(argptr, "root=") == NULL) {
+ strcat(argptr, " root=/dev/nfs rw");
+ }
+#endif
+
+#ifdef CONFIG_IP_PNP
+ argptr = prom_getcmdline();
+ if (strstr(argptr, "ip=") == NULL) {
+ strcat(argptr, " ip=any");
+ }
+#endif
+}
+
+static void __init rbtx49x7_common_time_init(void)
+{
+ /* change default value to udelay/mdelay take reasonable time */
+ loops_per_jiffy = txx9_cpu_clock / HZ / 2;
+
+ mips_hpt_frequency = txx9_cpu_clock / 2;
+ if (____raw_readq(&tx4927_ccfgptr->ccfg) & TX4927_CCFG_TINTDIS)
+ txx9_clockevent_init(TX4927_TMR_REG(0) & 0xfffffffffULL,
+ TXX9_IRQ_BASE + 17,
+ 50000000);
+}
+
+static void __init rbtx4927_time_init(void)
+{
+ /*
+ * ASSUMPTION: PCIDIVMODE is configured for PCI 33MHz or 66MHz.
+ *
+ * For TX4927:
+ * PCIDIVMODE[12:11]'s initial value is given by S9[4:3] (ON:0, OFF:1).
+ * CPU 166MHz: PCI 66MHz : PCIDIVMODE: 00 (1/2.5)
+ * CPU 200MHz: PCI 66MHz : PCIDIVMODE: 01 (1/3)
+ * CPU 166MHz: PCI 33MHz : PCIDIVMODE: 10 (1/5)
+ * CPU 200MHz: PCI 33MHz : PCIDIVMODE: 11 (1/6)
+ * i.e. S9[3]: ON (83MHz), OFF (100MHz)
+ */
+ switch ((unsigned long)__raw_readq(&tx4927_ccfgptr->ccfg) &
+ TX4927_CCFG_PCIDIVMODE_MASK) {
+ case TX4927_CCFG_PCIDIVMODE_2_5:
+ case TX4927_CCFG_PCIDIVMODE_5:
+ txx9_cpu_clock = 166666666; /* 166MHz */
+ break;
+ default:
+ txx9_cpu_clock = 200000000; /* 200MHz */
+ }
+
+ rbtx49x7_common_time_init();
+}
+
+static void __init rbtx4937_time_init(void)
+{
+ /*
+ * ASSUMPTION: PCIDIVMODE is configured for PCI 33MHz or 66MHz.
+ *
+ * For TX4937:
+ * PCIDIVMODE[12:11]'s initial value is given by S1[5:4] (ON:0, OFF:1)
+ * PCIDIVMODE[10] is 0.
+ * CPU 266MHz: PCI 33MHz : PCIDIVMODE: 000 (1/8)
+ * CPU 266MHz: PCI 66MHz : PCIDIVMODE: 001 (1/4)
+ * CPU 300MHz: PCI 33MHz : PCIDIVMODE: 010 (1/9)
+ * CPU 300MHz: PCI 66MHz : PCIDIVMODE: 011 (1/4.5)
+ * CPU 333MHz: PCI 33MHz : PCIDIVMODE: 100 (1/10)
+ * CPU 333MHz: PCI 66MHz : PCIDIVMODE: 101 (1/5)
+ */
+ switch ((unsigned long)__raw_readq(&tx4938_ccfgptr->ccfg) &
+ TX4938_CCFG_PCIDIVMODE_MASK) {
+ case TX4938_CCFG_PCIDIVMODE_8:
+ case TX4938_CCFG_PCIDIVMODE_4:
+ txx9_cpu_clock = 266666666; /* 266MHz */
+ break;
+ case TX4938_CCFG_PCIDIVMODE_9:
+ case TX4938_CCFG_PCIDIVMODE_4_5:
+ txx9_cpu_clock = 300000000; /* 300MHz */
+ break;
+ default:
+ txx9_cpu_clock = 333333333; /* 333MHz */
+ }
+
+ rbtx49x7_common_time_init();
+}
+
+static int __init toshiba_rbtx4927_rtc_init(void)
+{
+ static struct resource __initdata res = {
+ .start = 0x1c010000,
+ .end = 0x1c010000 + 0x800 - 1,
+ .flags = IORESOURCE_MEM,
+ };
+ struct platform_device *dev =
+ platform_device_register_simple("rtc-ds1742", -1, &res, 1);
+ return IS_ERR(dev) ? PTR_ERR(dev) : 0;
+}
+
+static int __init rbtx4927_ne_init(void)
+{
+ static struct resource __initdata res[] = {
+ {
+ .start = RBTX4927_RTL_8019_BASE,
+ .end = RBTX4927_RTL_8019_BASE + 0x20 - 1,
+ .flags = IORESOURCE_IO,
+ }, {
+ .start = RBTX4927_RTL_8019_IRQ,
+ .flags = IORESOURCE_IRQ,
+ }
+ };
+ struct platform_device *dev =
+ platform_device_register_simple("ne", -1,
+ res, ARRAY_SIZE(res));
+ return IS_ERR(dev) ? PTR_ERR(dev) : 0;
+}
+
+/* Watchdog support */
+
+static int __init txx9_wdt_init(unsigned long base)
+{
+ struct resource res = {
+ .start = base,
+ .end = base + 0x100 - 1,
+ .flags = IORESOURCE_MEM,
+ };
+ struct platform_device *dev =
+ platform_device_register_simple("txx9wdt", -1, &res, 1);
+ return IS_ERR(dev) ? PTR_ERR(dev) : 0;
+}
+
+static int __init rbtx4927_wdt_init(void)
+{
+ return txx9_wdt_init(TX4927_TMR_REG(2) & 0xfffffffffULL);
+}
+
+static void __init rbtx4927_device_init(void)
+{
+ toshiba_rbtx4927_rtc_init();
+ rbtx4927_ne_init();
+ rbtx4927_wdt_init();
+}
+
+struct txx9_board_vec rbtx4927_vec __initdata = {
+ .system = "Toshiba RBTX4927",
+ .prom_init = rbtx4927_prom_init,
+ .mem_setup = rbtx4927_mem_setup,
+ .irq_setup = rbtx4927_irq_setup,
+ .time_init = rbtx4927_time_init,
+ .device_init = rbtx4927_device_init,
+ .arch_init = rbtx4927_arch_init,
+#ifdef CONFIG_PCI
+ .pci_map_irq = rbtx4927_pci_map_irq,
+#endif
+};
+struct txx9_board_vec rbtx4937_vec __initdata = {
+ .system = "Toshiba RBTX4937",
+ .prom_init = rbtx4927_prom_init,
+ .mem_setup = rbtx4927_mem_setup,
+ .irq_setup = rbtx4927_irq_setup,
+ .time_init = rbtx4937_time_init,
+ .device_init = rbtx4927_device_init,
+ .arch_init = rbtx4937_arch_init,
+#ifdef CONFIG_PCI
+ .pci_map_irq = rbtx4927_pci_map_irq,
+#endif
+};
-#
-# Makefile for common code for Toshiba TX4927 based systems
-#
-
obj-y += prom.o setup.o irq.o spi_eeprom.o
EXTRA_CFLAGS += -Werror
/*
- * linux/arch/mips/tx4938/toshiba_rbtx4938/irq.c
- *
* Toshiba RBTX4938 specific interrupt handlers
* Copyright (C) 2000-2001 Toshiba Corporation
*
*/
#include <linux/init.h>
#include <linux/interrupt.h>
-#include <asm/tx4938/rbtx4938.h>
+#include <asm/mipsregs.h>
+#include <asm/txx9/generic.h>
+#include <asm/txx9/rbtx4938.h>
static void toshiba_rbtx4938_irq_ioc_enable(unsigned int irq);
static void toshiba_rbtx4938_irq_ioc_disable(unsigned int irq);
.unmask = toshiba_rbtx4938_irq_ioc_enable,
};
-int
-toshiba_rbtx4938_irq_nested(int sw_irq)
+static int toshiba_rbtx4938_irq_nested(int sw_irq)
{
u8 level3;
level3 = readb(rbtx4938_imstat_addr);
if (level3)
/* must use fls so onboard ATA has priority */
- sw_irq = TOSHIBA_RBTX4938_IRQ_IOC_BEG + fls(level3) - 1;
-
+ sw_irq = RBTX4938_IRQ_IOC + fls(level3) - 1;
return sw_irq;
}
-static struct irqaction toshiba_rbtx4938_irq_ioc_action = {
- .handler = no_action,
- .flags = 0,
- .mask = CPU_MASK_NONE,
- .name = TOSHIBA_RBTX4938_IOC_NAME,
-};
-
/**********************************************************************************/
/* Functions for ioc */
/**********************************************************************************/
{
int i;
- for (i = TOSHIBA_RBTX4938_IRQ_IOC_BEG;
- i <= TOSHIBA_RBTX4938_IRQ_IOC_END; i++)
+ for (i = RBTX4938_IRQ_IOC;
+ i < RBTX4938_IRQ_IOC + RBTX4938_NR_IRQ_IOC; i++)
set_irq_chip_and_handler(i, &toshiba_rbtx4938_irq_ioc_type,
handle_level_irq);
- setup_irq(RBTX4938_IRQ_IOCINT,
- &toshiba_rbtx4938_irq_ioc_action);
+ set_irq_chained_handler(RBTX4938_IRQ_IOCINT, handle_simple_irq);
}
static void
unsigned char v;
v = readb(rbtx4938_imask_addr);
- v |= (1 << (irq - TOSHIBA_RBTX4938_IRQ_IOC_BEG));
+ v |= (1 << (irq - RBTX4938_IRQ_IOC));
writeb(v, rbtx4938_imask_addr);
mmiowb();
}
unsigned char v;
v = readb(rbtx4938_imask_addr);
- v &= ~(1 << (irq - TOSHIBA_RBTX4938_IRQ_IOC_BEG));
+ v &= ~(1 << (irq - RBTX4938_IRQ_IOC));
writeb(v, rbtx4938_imask_addr);
mmiowb();
}
-void __init arch_init_irq(void)
+static int rbtx4938_irq_dispatch(int pending)
{
- extern void tx4938_irq_init(void);
+ int irq;
+
+ if (pending & STATUSF_IP7)
+ irq = MIPS_CPU_IRQ_BASE + 7;
+ else if (pending & STATUSF_IP2) {
+ irq = txx9_irq();
+ if (irq == RBTX4938_IRQ_IOCINT)
+ irq = toshiba_rbtx4938_irq_nested(irq);
+ } else if (pending & STATUSF_IP1)
+ irq = MIPS_CPU_IRQ_BASE + 0;
+ else if (pending & STATUSF_IP0)
+ irq = MIPS_CPU_IRQ_BASE + 1;
+ else
+ irq = -1;
+ return irq;
+}
+void __init rbtx4938_irq_setup(void)
+{
+ txx9_irq_dispatch = rbtx4938_irq_dispatch;
/* Now, interrupt control disabled, */
/* all IRC interrupts are masked, */
/* all IRC interrupt mode are Low Active. */
--- /dev/null
+/*
+ * rbtx4938 specific prom routines
+ * Copyright (C) 2000-2001 Toshiba Corporation
+ *
+ * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
+ * terms of the GNU General Public License version 2. This program is
+ * licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ *
+ * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
+ */
+
+#include <linux/init.h>
+#include <linux/bootmem.h>
+#include <asm/bootinfo.h>
+#include <asm/txx9/generic.h>
+#include <asm/txx9/rbtx4938.h>
+
+void __init rbtx4938_prom_init(void)
+{
+ extern int tx4938_get_mem_size(void);
+ int msize;
+#ifndef CONFIG_TX4938_NAND_BOOT
+ prom_init_cmdline();
+#endif
+
+ msize = tx4938_get_mem_size();
+ add_memory_region(0, msize << 20, BOOT_MEM_RAM);
+}
--- /dev/null
+/*
+ * Setup pointers to hardware-dependent routines.
+ * Copyright (C) 2000-2001 Toshiba Corporation
+ *
+ * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
+ * terms of the GNU General Public License version 2. This program is
+ * licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ *
+ * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
+ */
+#include <linux/init.h>
+#include <linux/types.h>
+#include <linux/ioport.h>
+#include <linux/delay.h>
+#include <linux/interrupt.h>
+#include <linux/console.h>
+#include <linux/pm.h>
+#include <linux/platform_device.h>
+#include <linux/gpio.h>
+
+#include <asm/reboot.h>
+#include <asm/time.h>
+#include <asm/txx9tmr.h>
+#include <asm/io.h>
+#include <asm/txx9/generic.h>
+#include <asm/txx9/pci.h>
+#include <asm/txx9/rbtx4938.h>
+#ifdef CONFIG_SERIAL_TXX9
+#include <linux/serial_core.h>
+#endif
+#include <linux/spi/spi.h>
+#include <asm/txx9/spi.h>
+#include <asm/txx9pio.h>
+
+static int tx4938_ccfg_toeon = 1;
+
+static void rbtx4938_machine_halt(void)
+{
+ printk(KERN_NOTICE "System Halted\n");
+ local_irq_disable();
+
+ while (1)
+ __asm__(".set\tmips3\n\t"
+ "wait\n\t"
+ ".set\tmips0");
+}
+
+static void rbtx4938_machine_power_off(void)
+{
+ rbtx4938_machine_halt();
+ /* no return */
+}
+
+static void rbtx4938_machine_restart(char *command)
+{
+ local_irq_disable();
+
+ printk("Rebooting...");
+ writeb(1, rbtx4938_softresetlock_addr);
+ writeb(1, rbtx4938_sfvol_addr);
+ writeb(1, rbtx4938_softreset_addr);
+ while(1)
+ ;
+}
+
+static void __init rbtx4938_pci_setup(void)
+{
+#ifdef CONFIG_PCI
+ int extarb = !(__raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_PCIARB);
+ struct pci_controller *c = &txx9_primary_pcic;
+
+ register_pci_controller(c);
+
+ if (__raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_PCI66)
+ txx9_pci_option =
+ (txx9_pci_option & ~TXX9_PCI_OPT_CLK_MASK) |
+ TXX9_PCI_OPT_CLK_66; /* already configured */
+
+ /* Reset PCI Bus */
+ writeb(0, rbtx4938_pcireset_addr);
+ /* Reset PCIC */
+ txx9_set64(&tx4938_ccfgptr->clkctr, TX4938_CLKCTR_PCIRST);
+ if ((txx9_pci_option & TXX9_PCI_OPT_CLK_MASK) ==
+ TXX9_PCI_OPT_CLK_66)
+ tx4938_pciclk66_setup();
+ mdelay(10);
+ /* clear PCIC reset */
+ txx9_clear64(&tx4938_ccfgptr->clkctr, TX4938_CLKCTR_PCIRST);
+ writeb(1, rbtx4938_pcireset_addr);
+ iob();
+
+ tx4938_report_pciclk();
+ tx4927_pcic_setup(tx4938_pcicptr, c, extarb);
+ if ((txx9_pci_option & TXX9_PCI_OPT_CLK_MASK) ==
+ TXX9_PCI_OPT_CLK_AUTO &&
+ txx9_pci66_check(c, 0, 0)) {
+ /* Reset PCI Bus */
+ writeb(0, rbtx4938_pcireset_addr);
+ /* Reset PCIC */
+ txx9_set64(&tx4938_ccfgptr->clkctr, TX4938_CLKCTR_PCIRST);
+ tx4938_pciclk66_setup();
+ mdelay(10);
+ /* clear PCIC reset */
+ txx9_clear64(&tx4938_ccfgptr->clkctr, TX4938_CLKCTR_PCIRST);
+ writeb(1, rbtx4938_pcireset_addr);
+ iob();
+ /* Reinitialize PCIC */
+ tx4938_report_pciclk();
+ tx4927_pcic_setup(tx4938_pcicptr, c, extarb);
+ }
+
+ if (__raw_readq(&tx4938_ccfgptr->pcfg) &
+ (TX4938_PCFG_ETH0_SEL|TX4938_PCFG_ETH1_SEL)) {
+ /* Reset PCIC1 */
+ txx9_set64(&tx4938_ccfgptr->clkctr, TX4938_CLKCTR_PCIC1RST);
+ /* PCI1DMD==0 => PCI1CLK==GBUSCLK/2 => PCI66 */
+ if (!(__raw_readq(&tx4938_ccfgptr->ccfg)
+ & TX4938_CCFG_PCI1DMD))
+ tx4938_ccfg_set(TX4938_CCFG_PCI1_66);
+ mdelay(10);
+ /* clear PCIC1 reset */
+ txx9_clear64(&tx4938_ccfgptr->clkctr, TX4938_CLKCTR_PCIC1RST);
+ tx4938_report_pci1clk();
+
+ /* mem:64K(max), io:64K(max) (enough for ETH0,ETH1) */
+ c = txx9_alloc_pci_controller(NULL, 0, 0x10000, 0, 0x10000);
+ register_pci_controller(c);
+ tx4927_pcic_setup(tx4938_pcic1ptr, c, 0);
+ }
+#endif /* CONFIG_PCI */
+}
+
+/* SPI support */
+
+/* chip select for SPI devices */
+#define SEEPROM1_CS 7 /* PIO7 */
+#define SEEPROM2_CS 0 /* IOC */
+#define SEEPROM3_CS 1 /* IOC */
+#define SRTC_CS 2 /* IOC */
+
+static int __init rbtx4938_ethaddr_init(void)
+{
+#ifdef CONFIG_PCI
+ unsigned char dat[17];
+ unsigned char sum;
+ int i;
+
+ /* 0-3: "MAC\0", 4-9:eth0, 10-15:eth1, 16:sum */
+ if (spi_eeprom_read(SEEPROM1_CS, 0, dat, sizeof(dat))) {
+ printk(KERN_ERR "seeprom: read error.\n");
+ return -ENODEV;
+ } else {
+ if (strcmp(dat, "MAC") != 0)
+ printk(KERN_WARNING "seeprom: bad signature.\n");
+ for (i = 0, sum = 0; i < sizeof(dat); i++)
+ sum += dat[i];
+ if (sum)
+ printk(KERN_WARNING "seeprom: bad checksum.\n");
+ }
+ for (i = 0; i < 2; i++) {
+ unsigned int id =
+ TXX9_IRQ_BASE + (i ? TX4938_IR_ETH1 : TX4938_IR_ETH0);
+ struct platform_device *pdev;
+ if (!(__raw_readq(&tx4938_ccfgptr->pcfg) &
+ (i ? TX4938_PCFG_ETH1_SEL : TX4938_PCFG_ETH0_SEL)))
+ continue;
+ pdev = platform_device_alloc("tc35815-mac", id);
+ if (!pdev ||
+ platform_device_add_data(pdev, &dat[4 + 6 * i], 6) ||
+ platform_device_add(pdev))
+ platform_device_put(pdev);
+ }
+#endif /* CONFIG_PCI */
+ return 0;
+}
+
+static void __init rbtx4938_spi_setup(void)
+{
+ /* set SPI_SEL */
+ txx9_set64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_SPI_SEL);
+}
+
+static struct resource rbtx4938_fpga_resource;
+static struct resource tx4938_sdram_resource[4];
+static struct resource tx4938_sram_resource;
+
+void __init tx4938_board_setup(void)
+{
+ int i;
+ unsigned long divmode;
+ int cpuclk = 0;
+ unsigned long pcode = TX4938_REV_PCODE();
+
+ ioport_resource.start = 0;
+ ioport_resource.end = 0xffffffff;
+ iomem_resource.start = 0;
+ iomem_resource.end = 0xffffffff; /* expand to 4GB */
+
+ txx9_reg_res_init(pcode, TX4938_REG_BASE,
+ TX4938_REG_SIZE);
+ /* SDRAMC,EBUSC are configured by PROM */
+ for (i = 0; i < 8; i++) {
+ if (!(TX4938_EBUSC_CR(i) & 0x8))
+ continue; /* disabled */
+ txx9_ce_res[i].start = (unsigned long)TX4938_EBUSC_BA(i);
+ txx9_ce_res[i].end =
+ txx9_ce_res[i].start + TX4938_EBUSC_SIZE(i) - 1;
+ request_resource(&iomem_resource, &txx9_ce_res[i]);
+ }
+
+ /* clocks */
+ if (txx9_master_clock) {
+ u64 ccfg = ____raw_readq(&tx4938_ccfgptr->ccfg);
+ /* calculate gbus_clock and cpu_clock_freq from master_clock */
+ divmode = (__u32)ccfg & TX4938_CCFG_DIVMODE_MASK;
+ switch (divmode) {
+ case TX4938_CCFG_DIVMODE_8:
+ case TX4938_CCFG_DIVMODE_10:
+ case TX4938_CCFG_DIVMODE_12:
+ case TX4938_CCFG_DIVMODE_16:
+ case TX4938_CCFG_DIVMODE_18:
+ txx9_gbus_clock = txx9_master_clock * 4; break;
+ default:
+ txx9_gbus_clock = txx9_master_clock;
+ }
+ switch (divmode) {
+ case TX4938_CCFG_DIVMODE_2:
+ case TX4938_CCFG_DIVMODE_8:
+ cpuclk = txx9_gbus_clock * 2; break;
+ case TX4938_CCFG_DIVMODE_2_5:
+ case TX4938_CCFG_DIVMODE_10:
+ cpuclk = txx9_gbus_clock * 5 / 2; break;
+ case TX4938_CCFG_DIVMODE_3:
+ case TX4938_CCFG_DIVMODE_12:
+ cpuclk = txx9_gbus_clock * 3; break;
+ case TX4938_CCFG_DIVMODE_4:
+ case TX4938_CCFG_DIVMODE_16:
+ cpuclk = txx9_gbus_clock * 4; break;
+ case TX4938_CCFG_DIVMODE_4_5:
+ case TX4938_CCFG_DIVMODE_18:
+ cpuclk = txx9_gbus_clock * 9 / 2; break;
+ }
+ txx9_cpu_clock = cpuclk;
+ } else {
+ u64 ccfg = ____raw_readq(&tx4938_ccfgptr->ccfg);
+ if (txx9_cpu_clock == 0) {
+ txx9_cpu_clock = 300000000; /* 300MHz */
+ }
+ /* calculate gbus_clock and master_clock from cpu_clock_freq */
+ cpuclk = txx9_cpu_clock;
+ divmode = (__u32)ccfg & TX4938_CCFG_DIVMODE_MASK;
+ switch (divmode) {
+ case TX4938_CCFG_DIVMODE_2:
+ case TX4938_CCFG_DIVMODE_8:
+ txx9_gbus_clock = cpuclk / 2; break;
+ case TX4938_CCFG_DIVMODE_2_5:
+ case TX4938_CCFG_DIVMODE_10:
+ txx9_gbus_clock = cpuclk * 2 / 5; break;
+ case TX4938_CCFG_DIVMODE_3:
+ case TX4938_CCFG_DIVMODE_12:
+ txx9_gbus_clock = cpuclk / 3; break;
+ case TX4938_CCFG_DIVMODE_4:
+ case TX4938_CCFG_DIVMODE_16:
+ txx9_gbus_clock = cpuclk / 4; break;
+ case TX4938_CCFG_DIVMODE_4_5:
+ case TX4938_CCFG_DIVMODE_18:
+ txx9_gbus_clock = cpuclk * 2 / 9; break;
+ }
+ switch (divmode) {
+ case TX4938_CCFG_DIVMODE_8:
+ case TX4938_CCFG_DIVMODE_10:
+ case TX4938_CCFG_DIVMODE_12:
+ case TX4938_CCFG_DIVMODE_16:
+ case TX4938_CCFG_DIVMODE_18:
+ txx9_master_clock = txx9_gbus_clock / 4; break;
+ default:
+ txx9_master_clock = txx9_gbus_clock;
+ }
+ }
+ /* change default value to udelay/mdelay take reasonable time */
+ loops_per_jiffy = txx9_cpu_clock / HZ / 2;
+
+ /* CCFG */
+ /* clear WatchDogReset,BusErrorOnWrite flag (W1C) */
+ tx4938_ccfg_set(TX4938_CCFG_WDRST | TX4938_CCFG_BEOW);
+ /* do reset on watchdog */
+ tx4938_ccfg_set(TX4938_CCFG_WR);
+ /* clear PCIC1 reset */
+ txx9_clear64(&tx4938_ccfgptr->clkctr, TX4938_CLKCTR_PCIC1RST);
+
+ /* enable Timeout BusError */
+ if (tx4938_ccfg_toeon)
+ tx4938_ccfg_set(TX4938_CCFG_TOE);
+
+ /* DMA selection */
+ txx9_clear64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_DMASEL_ALL);
+
+ /* Use external clock for external arbiter */
+ if (!(____raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_PCIARB))
+ txx9_clear64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_PCICLKEN_ALL);
+
+ printk(KERN_INFO "%s -- %dMHz(M%dMHz) CRIR:%08x CCFG:%llx PCFG:%llx\n",
+ txx9_pcode_str,
+ (cpuclk + 500000) / 1000000,
+ (txx9_master_clock + 500000) / 1000000,
+ (__u32)____raw_readq(&tx4938_ccfgptr->crir),
+ (unsigned long long)____raw_readq(&tx4938_ccfgptr->ccfg),
+ (unsigned long long)____raw_readq(&tx4938_ccfgptr->pcfg));
+
+ printk(KERN_INFO "%s SDRAMC --", txx9_pcode_str);
+ for (i = 0; i < 4; i++) {
+ unsigned long long cr = tx4938_sdramcptr->cr[i];
+ unsigned long ram_base, ram_size;
+ if (!((unsigned long)cr & 0x00000400))
+ continue; /* disabled */
+ ram_base = (unsigned long)(cr >> 49) << 21;
+ ram_size = ((unsigned long)(cr >> 33) + 1) << 21;
+ if (ram_base >= 0x20000000)
+ continue; /* high memory (ignore) */
+ printk(" CR%d:%016Lx", i, cr);
+ tx4938_sdram_resource[i].name = "SDRAM";
+ tx4938_sdram_resource[i].start = ram_base;
+ tx4938_sdram_resource[i].end = ram_base + ram_size - 1;
+ tx4938_sdram_resource[i].flags = IORESOURCE_MEM;
+ request_resource(&iomem_resource, &tx4938_sdram_resource[i]);
+ }
+ printk(" TR:%09Lx\n", tx4938_sdramcptr->tr);
+
+ /* SRAM */
+ if (tx4938_sramcptr->cr & 1) {
+ unsigned int size = 0x800;
+ unsigned long base =
+ (tx4938_sramcptr->cr >> (39-11)) & ~(size - 1);
+ tx4938_sram_resource.name = "SRAM";
+ tx4938_sram_resource.start = base;
+ tx4938_sram_resource.end = base + size - 1;
+ tx4938_sram_resource.flags = IORESOURCE_MEM;
+ request_resource(&iomem_resource, &tx4938_sram_resource);
+ }
+
+ /* TMR */
+ for (i = 0; i < TX4938_NR_TMR; i++)
+ txx9_tmr_init(TX4938_TMR_REG(i) & 0xfffffffffULL);
+
+ /* enable DMA */
+ for (i = 0; i < 2; i++)
+ ____raw_writeq(TX4938_DMA_MCR_MSTEN,
+ (void __iomem *)(TX4938_DMA_REG(i) + 0x50));
+
+ /* PIO */
+ __raw_writel(0, &tx4938_pioptr->maskcpu);
+ __raw_writel(0, &tx4938_pioptr->maskext);
+
+#ifdef CONFIG_PCI
+ txx9_alloc_pci_controller(&txx9_primary_pcic, 0, 0, 0, 0);
+#endif
+}
+
+static void __init rbtx4938_time_init(void)
+{
+ mips_hpt_frequency = txx9_cpu_clock / 2;
+ if (____raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_TINTDIS)
+ txx9_clockevent_init(TX4938_TMR_REG(0) & 0xfffffffffULL,
+ TXX9_IRQ_BASE + TX4938_IR_TMR(0),
+ txx9_gbus_clock / 2);
+}
+
+static void __init rbtx4938_mem_setup(void)
+{
+ unsigned long long pcfg;
+ char *argptr;
+
+ iomem_resource.end = 0xffffffff; /* 4GB */
+
+ if (txx9_master_clock == 0)
+ txx9_master_clock = 25000000; /* 25MHz */
+ tx4938_board_setup();
+#ifndef CONFIG_PCI
+ set_io_port_base(RBTX4938_ETHER_BASE);
+#endif
+
+#ifdef CONFIG_SERIAL_TXX9
+ {
+ extern int early_serial_txx9_setup(struct uart_port *port);
+ int i;
+ struct uart_port req;
+ for(i = 0; i < 2; i++) {
+ memset(&req, 0, sizeof(req));
+ req.line = i;
+ req.iotype = UPIO_MEM;
+ req.membase = (char *)(0xff1ff300 + i * 0x100);
+ req.mapbase = 0xff1ff300 + i * 0x100;
+ req.irq = RBTX4938_IRQ_IRC_SIO(i);
+ req.flags |= UPF_BUGGY_UART /*HAVE_CTS_LINE*/;
+ req.uartclk = 50000000;
+ early_serial_txx9_setup(&req);
+ }
+ }
+#ifdef CONFIG_SERIAL_TXX9_CONSOLE
+ argptr = prom_getcmdline();
+ if (strstr(argptr, "console=") == NULL) {
+ strcat(argptr, " console=ttyS0,38400");
+ }
+#endif
+#endif
+
+#ifdef CONFIG_TOSHIBA_RBTX4938_MPLEX_PIO58_61
+ printk("PIOSEL: disabling both ata and nand selection\n");
+ local_irq_disable();
+ txx9_clear64(&tx4938_ccfgptr->pcfg,
+ TX4938_PCFG_NDF_SEL | TX4938_PCFG_ATA_SEL);
+#endif
+
+#ifdef CONFIG_TOSHIBA_RBTX4938_MPLEX_NAND
+ printk("PIOSEL: enabling nand selection\n");
+ txx9_set64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_NDF_SEL);
+ txx9_clear64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_ATA_SEL);
+#endif
+
+#ifdef CONFIG_TOSHIBA_RBTX4938_MPLEX_ATA
+ printk("PIOSEL: enabling ata selection\n");
+ txx9_set64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_ATA_SEL);
+ txx9_clear64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_NDF_SEL);
+#endif
+
+#ifdef CONFIG_IP_PNP
+ argptr = prom_getcmdline();
+ if (strstr(argptr, "ip=") == NULL) {
+ strcat(argptr, " ip=any");
+ }
+#endif
+
+
+#ifdef CONFIG_FB
+ {
+ conswitchp = &dummy_con;
+ }
+#endif
+
+ rbtx4938_spi_setup();
+ pcfg = ____raw_readq(&tx4938_ccfgptr->pcfg); /* updated */
+ /* fixup piosel */
+ if ((pcfg & (TX4938_PCFG_ATA_SEL | TX4938_PCFG_NDF_SEL)) ==
+ TX4938_PCFG_ATA_SEL)
+ writeb((readb(rbtx4938_piosel_addr) & 0x03) | 0x04,
+ rbtx4938_piosel_addr);
+ else if ((pcfg & (TX4938_PCFG_ATA_SEL | TX4938_PCFG_NDF_SEL)) ==
+ TX4938_PCFG_NDF_SEL)
+ writeb((readb(rbtx4938_piosel_addr) & 0x03) | 0x08,
+ rbtx4938_piosel_addr);
+ else
+ writeb(readb(rbtx4938_piosel_addr) & ~(0x08 | 0x04),
+ rbtx4938_piosel_addr);
+
+ rbtx4938_fpga_resource.name = "FPGA Registers";
+ rbtx4938_fpga_resource.start = CPHYSADDR(RBTX4938_FPGA_REG_ADDR);
+ rbtx4938_fpga_resource.end = CPHYSADDR(RBTX4938_FPGA_REG_ADDR) + 0xffff;
+ rbtx4938_fpga_resource.flags = IORESOURCE_MEM | IORESOURCE_BUSY;
+ if (request_resource(&iomem_resource, &rbtx4938_fpga_resource))
+ printk("request resource for fpga failed\n");
+
+ _machine_restart = rbtx4938_machine_restart;
+ _machine_halt = rbtx4938_machine_halt;
+ pm_power_off = rbtx4938_machine_power_off;
+
+ writeb(0xff, rbtx4938_led_addr);
+ printk(KERN_INFO "RBTX4938 --- FPGA(Rev %02x) DIPSW:%02x,%02x\n",
+ readb(rbtx4938_fpga_rev_addr),
+ readb(rbtx4938_dipsw_addr), readb(rbtx4938_bdipsw_addr));
+}
+
+static int __init rbtx4938_ne_init(void)
+{
+ struct resource res[] = {
+ {
+ .start = RBTX4938_RTL_8019_BASE,
+ .end = RBTX4938_RTL_8019_BASE + 0x20 - 1,
+ .flags = IORESOURCE_IO,
+ }, {
+ .start = RBTX4938_RTL_8019_IRQ,
+ .flags = IORESOURCE_IRQ,
+ }
+ };
+ struct platform_device *dev =
+ platform_device_register_simple("ne", -1,
+ res, ARRAY_SIZE(res));
+ return IS_ERR(dev) ? PTR_ERR(dev) : 0;
+}
+
+/* GPIO support */
+
+int gpio_to_irq(unsigned gpio)
+{
+ return -EINVAL;
+}
+
+int irq_to_gpio(unsigned irq)
+{
+ return -EINVAL;
+}
+
+static DEFINE_SPINLOCK(rbtx4938_spi_gpio_lock);
+
+static void rbtx4938_spi_gpio_set(struct gpio_chip *chip, unsigned int offset,
+ int value)
+{
+ u8 val;
+ unsigned long flags;
+ spin_lock_irqsave(&rbtx4938_spi_gpio_lock, flags);
+ val = readb(rbtx4938_spics_addr);
+ if (value)
+ val |= 1 << offset;
+ else
+ val &= ~(1 << offset);
+ writeb(val, rbtx4938_spics_addr);
+ mmiowb();
+ spin_unlock_irqrestore(&rbtx4938_spi_gpio_lock, flags);
+}
+
+static int rbtx4938_spi_gpio_dir_out(struct gpio_chip *chip,
+ unsigned int offset, int value)
+{
+ rbtx4938_spi_gpio_set(chip, offset, value);
+ return 0;
+}
+
+static struct gpio_chip rbtx4938_spi_gpio_chip = {
+ .set = rbtx4938_spi_gpio_set,
+ .direction_output = rbtx4938_spi_gpio_dir_out,
+ .label = "RBTX4938-SPICS",
+ .base = 16,
+ .ngpio = 3,
+};
+
+/* SPI support */
+
+static void __init txx9_spi_init(unsigned long base, int irq)
+{
+ struct resource res[] = {
+ {
+ .start = base,
+ .end = base + 0x20 - 1,
+ .flags = IORESOURCE_MEM,
+ }, {
+ .start = irq,
+ .flags = IORESOURCE_IRQ,
+ },
+ };
+ platform_device_register_simple("spi_txx9", 0,
+ res, ARRAY_SIZE(res));
+}
+
+static int __init rbtx4938_spi_init(void)
+{
+ struct spi_board_info srtc_info = {
+ .modalias = "rtc-rs5c348",
+ .max_speed_hz = 1000000, /* 1.0Mbps @ Vdd 2.0V */
+ .bus_num = 0,
+ .chip_select = 16 + SRTC_CS,
+ /* Mode 1 (High-Active, Shift-Then-Sample), High Avtive CS */
+ .mode = SPI_MODE_1 | SPI_CS_HIGH,
+ };
+ spi_register_board_info(&srtc_info, 1);
+ spi_eeprom_register(SEEPROM1_CS);
+ spi_eeprom_register(16 + SEEPROM2_CS);
+ spi_eeprom_register(16 + SEEPROM3_CS);
+ gpio_request(16 + SRTC_CS, "rtc-rs5c348");
+ gpio_direction_output(16 + SRTC_CS, 0);
+ gpio_request(SEEPROM1_CS, "seeprom1");
+ gpio_direction_output(SEEPROM1_CS, 1);
+ gpio_request(16 + SEEPROM2_CS, "seeprom2");
+ gpio_direction_output(16 + SEEPROM2_CS, 1);
+ gpio_request(16 + SEEPROM3_CS, "seeprom3");
+ gpio_direction_output(16 + SEEPROM3_CS, 1);
+ txx9_spi_init(TX4938_SPI_REG & 0xfffffffffULL, RBTX4938_IRQ_IRC_SPI);
+ return 0;
+}
+
+static void __init rbtx4938_arch_init(void)
+{
+ txx9_gpio_init(TX4938_PIO_REG & 0xfffffffffULL, 0, 16);
+ gpiochip_add(&rbtx4938_spi_gpio_chip);
+ rbtx4938_pci_setup();
+ rbtx4938_spi_init();
+}
+
+/* Watchdog support */
+
+static int __init txx9_wdt_init(unsigned long base)
+{
+ struct resource res = {
+ .start = base,
+ .end = base + 0x100 - 1,
+ .flags = IORESOURCE_MEM,
+ };
+ struct platform_device *dev =
+ platform_device_register_simple("txx9wdt", -1, &res, 1);
+ return IS_ERR(dev) ? PTR_ERR(dev) : 0;
+}
+
+static int __init rbtx4938_wdt_init(void)
+{
+ return txx9_wdt_init(TX4938_TMR_REG(2) & 0xfffffffffULL);
+}
+
+static void __init rbtx4938_device_init(void)
+{
+ rbtx4938_ethaddr_init();
+ rbtx4938_ne_init();
+ rbtx4938_wdt_init();
+}
+
+struct txx9_board_vec rbtx4938_vec __initdata = {
+ .system = "Toshiba RBTX4938",
+ .prom_init = rbtx4938_prom_init,
+ .mem_setup = rbtx4938_mem_setup,
+ .irq_setup = rbtx4938_irq_setup,
+ .time_init = rbtx4938_time_init,
+ .device_init = rbtx4938_device_init,
+ .arch_init = rbtx4938_arch_init,
+#ifdef CONFIG_PCI
+ .pci_map_irq = rbtx4938_pci_map_irq,
+#endif
+};
/*
- * linux/arch/mips/tx4938/toshiba_rbtx4938/spi_eeprom.c
+ * spi_eeprom.c
* Copyright (C) 2000-2001 Toshiba Corporation
*
* 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
#include <linux/device.h>
#include <linux/spi/spi.h>
#include <linux/spi/eeprom.h>
-#include <asm/tx4938/spi.h>
+#include <asm/txx9/spi.h>
#define AT250X0_PAGE_SIZE 8
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_LITTLE_ENDIAN
-config NEC_CMBVR4133
- bool "NEC CMB-VR4133"
- select CEVT_R4K
- select CSRC_R4K
- select DMA_NONCOHERENT
- select IRQ_CPU
- select HW_HAS_PCI
- select SYS_SUPPORTS_32BIT_KERNEL
- select SYS_SUPPORTS_LITTLE_ENDIAN
-
config TANBAC_TB022X
bool "TANBAC VR4131 multichip module and TANBAC VR4131DIMM"
select CEVT_R4K
endchoice
-config ROCKHOPPER
- bool "Support for Rockhopper base board"
- depends on NEC_CMBVR4133
- select PCI_VR41XX
- select I8259
- select HAVE_STD_PC_SERIAL_PORT
-
choice
prompt "Base board type"
depends on TANBAC_TB022X
+++ /dev/null
-#
-# Makefile for the NEC-CMBVR4133
-#
-
-obj-y := init.o setup.o
-
-obj-$(CONFIG_PCI) += m1535plus.o
-obj-$(CONFIG_ROCKHOPPER) += irq.o
+++ /dev/null
-/*
- * arch/mips/vr41xx/nec-cmbvr4133/init.c
- *
- * PROM library initialisation code for NEC CMB-VR4133 board.
- *
- * Author: Yoichi Yuasa <yyuasa@mvista.com, or source@mvista.com> and
- * Jun Sun <jsun@mvista.com, or source@mvista.com> and
- * Alex Sapkov <asapkov@ru.mvista.com>
- *
- * 2001-2004 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- *
- * Support for NEC-CMBVR4133 in 2.6
- * Manish Lachwani (mlachwani@mvista.com)
- */
-
-#ifdef CONFIG_ROCKHOPPER
-#include <asm/io.h>
-#include <linux/pci.h>
-
-#define PCICONFDREG 0xaf000c14
-#define PCICONFAREG 0xaf000c18
-
-void disable_pcnet(void)
-{
- u32 data;
-
- /*
- * Workaround for the bug in PMON on VR4133. PMON leaves
- * AMD PCNet controller (on Rockhopper) initialized and running in
- * bus master mode. We have do disable it before doing any
- * further initialization. Or we get problems with PCI bus 2
- * and random lockups and crashes.
- */
-
- writel((2 << 16) |
- (PCI_DEVFN(1, 0) << 8) |
- (0 & 0xfc) |
- 1UL,
- PCICONFAREG);
-
- data = readl(PCICONFDREG);
-
- writel((2 << 16) |
- (PCI_DEVFN(1, 0) << 8) |
- (4 & 0xfc) |
- 1UL,
- PCICONFAREG);
-
- data = readl(PCICONFDREG);
-
- writel((2 << 16) |
- (PCI_DEVFN(1, 0) << 8) |
- (4 & 0xfc) |
- 1UL,
- PCICONFAREG);
-
- data &= ~4;
-
- writel(data, PCICONFDREG);
-}
-#endif
-
+++ /dev/null
-/*
- * arch/mips/vr41xx/nec-cmbvr4133/irq.c
- *
- * Interrupt routines for the NEC CMB-VR4133 board.
- *
- * Author: Yoichi Yuasa <yyuasa@mvista.com, or source@mvista.com> and
- * Alex Sapkov <asapkov@ru.mvista.com>
- *
- * 2003-2004 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- *
- * Support for NEC-CMBVR4133 in 2.6
- * Manish Lachwani (mlachwani@mvista.com)
- */
-#include <linux/bitops.h>
-#include <linux/errno.h>
-#include <linux/init.h>
-#include <linux/ioport.h>
-#include <linux/interrupt.h>
-
-#include <asm/io.h>
-#include <asm/i8259.h>
-#include <asm/vr41xx/cmbvr4133.h>
-
-extern int vr4133_rockhopper;
-
-static int i8259_get_irq_number(int irq)
-{
- return i8259_irq();
-}
-
-void __init rockhopper_init_irq(void)
-{
- int i;
-
- if(!vr4133_rockhopper) {
- printk(KERN_ERR "Not a Rockhopper Board \n");
- return;
- }
-
- vr41xx_set_irq_trigger(CMBVR41XX_INTC_PIN, TRIGGER_LEVEL, SIGNAL_THROUGH);
- vr41xx_set_irq_level(CMBVR41XX_INTC_PIN, LEVEL_HIGH);
- vr41xx_cascade_irq(CMBVR41XX_INTC_IRQ, i8259_get_irq_number);
-}
+++ /dev/null
-/*
- * arch/mips/vr41xx/nec-cmbvr4133/m1535plus.c
- *
- * Initialize for ALi M1535+(included M5229 and M5237).
- *
- * Author: Yoichi Yuasa <yyuasa@mvista.com, or source@mvista.com> and
- * Alex Sapkov <asapkov@ru.mvista.com>
- *
- * 2003-2004 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- *
- * Support for NEC-CMBVR4133 in 2.6
- * Author: Manish Lachwani (mlachwani@mvista.com)
- */
-#include <linux/init.h>
-#include <linux/types.h>
-#include <linux/serial.h>
-
-#include <asm/vr41xx/cmbvr4133.h>
-#include <linux/pci.h>
-#include <asm/io.h>
-
-#define CONFIG_PORT(port) ((port) ? 0x3f0 : 0x370)
-#define DATA_PORT(port) ((port) ? 0x3f1 : 0x371)
-#define INDEX_PORT(port) CONFIG_PORT(port)
-
-#define ENTER_CONFIG_MODE(port) \
- do { \
- outb_p(0x51, CONFIG_PORT(port)); \
- outb_p(0x23, CONFIG_PORT(port)); \
- } while(0)
-
-#define SELECT_LOGICAL_DEVICE(port, dev_no) \
- do { \
- outb_p(0x07, INDEX_PORT(port)); \
- outb_p((dev_no), DATA_PORT(port)); \
- } while(0)
-
-#define WRITE_CONFIG_DATA(port, index, data) \
- do { \
- outb_p((index), INDEX_PORT(port)); \
- outb_p((data), DATA_PORT(port)); \
- } while(0)
-
-#define EXIT_CONFIG_MODE(port) outb(0xbb, CONFIG_PORT(port))
-
-#define PCI_CONFIG_ADDR KSEG1ADDR(0x0f000c18)
-#define PCI_CONFIG_DATA KSEG1ADDR(0x0f000c14)
-
-#ifdef CONFIG_BLK_DEV_FD
-
-void __devinit ali_m1535plus_fdc_init(int port)
-{
- ENTER_CONFIG_MODE(port);
- SELECT_LOGICAL_DEVICE(port, 0); /* FDC */
- WRITE_CONFIG_DATA(port, 0x30, 0x01); /* FDC: enable */
- WRITE_CONFIG_DATA(port, 0x60, 0x03); /* I/O port base: 0x3f0 */
- WRITE_CONFIG_DATA(port, 0x61, 0xf0);
- WRITE_CONFIG_DATA(port, 0x70, 0x06); /* IRQ: 6 */
- WRITE_CONFIG_DATA(port, 0x74, 0x02); /* DMA: channel 2 */
- WRITE_CONFIG_DATA(port, 0xf0, 0x08);
- WRITE_CONFIG_DATA(port, 0xf1, 0x00);
- WRITE_CONFIG_DATA(port, 0xf2, 0xff);
- WRITE_CONFIG_DATA(port, 0xf4, 0x00);
- EXIT_CONFIG_MODE(port);
-}
-
-#endif
-
-void __devinit ali_m1535plus_parport_init(int port)
-{
- ENTER_CONFIG_MODE(port);
- SELECT_LOGICAL_DEVICE(port, 3); /* Parallel Port */
- WRITE_CONFIG_DATA(port, 0x30, 0x01);
- WRITE_CONFIG_DATA(port, 0x60, 0x03); /* I/O port base: 0x378 */
- WRITE_CONFIG_DATA(port, 0x61, 0x78);
- WRITE_CONFIG_DATA(port, 0x70, 0x07); /* IRQ: 7 */
- WRITE_CONFIG_DATA(port, 0x74, 0x04); /* DMA: None */
- WRITE_CONFIG_DATA(port, 0xf0, 0x8c); /* IRQ polarity: Active Low */
- WRITE_CONFIG_DATA(port, 0xf1, 0xc5);
- EXIT_CONFIG_MODE(port);
-}
-
-void __devinit ali_m1535plus_keyboard_init(int port)
-{
- ENTER_CONFIG_MODE(port);
- SELECT_LOGICAL_DEVICE(port, 7); /* KEYBOARD */
- WRITE_CONFIG_DATA(port, 0x30, 0x01); /* KEYBOARD: eable */
- WRITE_CONFIG_DATA(port, 0x70, 0x01); /* IRQ: 1 */
- WRITE_CONFIG_DATA(port, 0x72, 0x0c); /* PS/2 Mouse IRQ: 12 */
- WRITE_CONFIG_DATA(port, 0xf0, 0x00);
- EXIT_CONFIG_MODE(port);
-}
-
-void __devinit ali_m1535plus_hotkey_init(int port)
-{
- ENTER_CONFIG_MODE(port);
- SELECT_LOGICAL_DEVICE(port, 0xc); /* HOTKEY */
- WRITE_CONFIG_DATA(port, 0x30, 0x00);
- WRITE_CONFIG_DATA(port, 0xf0, 0x35);
- WRITE_CONFIG_DATA(port, 0xf1, 0x14);
- WRITE_CONFIG_DATA(port, 0xf2, 0x11);
- WRITE_CONFIG_DATA(port, 0xf3, 0x71);
- WRITE_CONFIG_DATA(port, 0xf5, 0x05);
- EXIT_CONFIG_MODE(port);
-}
-
-void ali_m1535plus_init(struct pci_dev *dev)
-{
- pci_write_config_byte(dev, 0x40, 0x18); /* PCI Interface Control */
- pci_write_config_byte(dev, 0x41, 0xc0); /* PS2 keyb & mouse enable */
- pci_write_config_byte(dev, 0x42, 0x41); /* ISA bus cycle control */
- pci_write_config_byte(dev, 0x43, 0x00); /* ISA bus cycle control 2 */
- pci_write_config_byte(dev, 0x44, 0x5d); /* IDE enable & IRQ 14 */
- pci_write_config_byte(dev, 0x45, 0x0b); /* PCI int polling mode */
- pci_write_config_byte(dev, 0x47, 0x00); /* BIOS chip select control */
-
- /* IRQ routing */
- pci_write_config_byte(dev, 0x48, 0x03); /* INTA IRQ10, INTB disable */
- pci_write_config_byte(dev, 0x49, 0x00); /* INTC and INTD disable */
- pci_write_config_byte(dev, 0x4a, 0x00); /* INTE and INTF disable */
- pci_write_config_byte(dev, 0x4b, 0x90); /* Audio IRQ11, Modem disable */
-
- pci_write_config_word(dev, 0x50, 0x4000); /* Parity check IDE enable */
- pci_write_config_word(dev, 0x52, 0x0000); /* USB & RTC disable */
- pci_write_config_word(dev, 0x54, 0x0002); /* ??? no info */
- pci_write_config_word(dev, 0x56, 0x0002); /* PCS1J signal disable */
-
- pci_write_config_byte(dev, 0x59, 0x00); /* PCSDS */
- pci_write_config_byte(dev, 0x5a, 0x00);
- pci_write_config_byte(dev, 0x5b, 0x00);
- pci_write_config_word(dev, 0x5c, 0x0000);
- pci_write_config_byte(dev, 0x5e, 0x00);
- pci_write_config_byte(dev, 0x5f, 0x00);
- pci_write_config_word(dev, 0x60, 0x0000);
-
- pci_write_config_byte(dev, 0x6c, 0x00);
- pci_write_config_byte(dev, 0x6d, 0x48); /* ROM address mapping */
- pci_write_config_byte(dev, 0x6e, 0x00); /* ??? what for? */
-
- pci_write_config_byte(dev, 0x70, 0x12); /* Serial IRQ control */
- pci_write_config_byte(dev, 0x71, 0xEF); /* DMA channel select */
- pci_write_config_byte(dev, 0x72, 0x03); /* USB IDSEL */
- pci_write_config_byte(dev, 0x73, 0x00); /* ??? no info */
-
- /*
- * IRQ setup ALi M5237 USB Host Controller
- * IRQ: 9
- */
- pci_write_config_byte(dev, 0x74, 0x01); /* USB IRQ9 */
-
- pci_write_config_byte(dev, 0x75, 0x1f); /* IDE2 IRQ 15 */
- pci_write_config_byte(dev, 0x76, 0x80); /* ACPI disable */
- pci_write_config_byte(dev, 0x77, 0x40); /* Modem disable */
- pci_write_config_dword(dev, 0x78, 0x20000000); /* Pin select 2 */
- pci_write_config_byte(dev, 0x7c, 0x00); /* Pin select 3 */
- pci_write_config_byte(dev, 0x81, 0x00); /* ID read/write control */
- pci_write_config_byte(dev, 0x90, 0x00); /* PCI PM block control */
- pci_write_config_word(dev, 0xa4, 0x0000); /* PMSCR */
-
-#ifdef CONFIG_BLK_DEV_FD
- ali_m1535plus_fdc_init(1);
-#endif
-
- ali_m1535plus_keyboard_init(1);
- ali_m1535plus_hotkey_init(1);
-}
-
-static inline void ali_config_writeb(u8 reg, u8 val, int devfn)
-{
- u32 data;
- int shift;
-
- writel((1 << 16) | (devfn << 8) | (reg & 0xfc) | 1UL, PCI_CONFIG_ADDR);
- data = readl(PCI_CONFIG_DATA);
-
- shift = (reg & 3) << 3;
- data &= ~(0xff << shift);
- data |= (((u32)val) << shift);
-
- writel(data, PCI_CONFIG_DATA);
-}
-
-static inline u8 ali_config_readb(u8 reg, int devfn)
-{
- u32 data;
-
- writel((1 << 16) | (devfn << 8) | (reg & 0xfc) | 1UL, PCI_CONFIG_ADDR);
- data = readl(PCI_CONFIG_DATA);
-
- return (u8)(data >> ((reg & 3) << 3));
-}
-
-static inline u16 ali_config_readw(u8 reg, int devfn)
-{
- u32 data;
-
- writel((1 << 16) | (devfn << 8) | (reg & 0xfc) | 1UL, PCI_CONFIG_ADDR);
- data = readl(PCI_CONFIG_DATA);
-
- return (u16)(data >> ((reg & 2) << 3));
-}
-
-int vr4133_rockhopper = 0;
-void __init ali_m5229_preinit(void)
-{
- if (ali_config_readw(PCI_VENDOR_ID, 16) == PCI_VENDOR_ID_AL &&
- ali_config_readw(PCI_DEVICE_ID, 16) == PCI_DEVICE_ID_AL_M1533) {
- printk(KERN_INFO "Found an NEC Rockhopper \n");
- vr4133_rockhopper = 1;
- /*
- * Enable ALi M5229 IDE Controller (both channels)
- * IDSEL: A27
- */
- ali_config_writeb(0x58, 0x4c, 16);
- }
-}
-
-void __init ali_m5229_init(struct pci_dev *dev)
-{
- /*
- * Enable Primary/Secondary Channel Cable Detect 40-Pin
- */
- pci_write_config_word(dev, 0x4a, 0xc023);
-
- /*
- * Set only the 3rd byteis for the master IDE's cycle and
- * enable Internal IDE Function
- */
- pci_write_config_byte(dev, 0x50, 0x23); /* Class code attr register */
-
- pci_write_config_byte(dev, 0x09, 0xff); /* Set native mode & stuff */
- pci_write_config_byte(dev, 0x52, 0x00); /* use timing registers */
- pci_write_config_byte(dev, 0x58, 0x02); /* Primary addr setup timing */
- pci_write_config_byte(dev, 0x59, 0x22); /* Primary cmd block timing */
- pci_write_config_byte(dev, 0x5a, 0x22); /* Pr drv 0 R/W timing */
- pci_write_config_byte(dev, 0x5b, 0x22); /* Pr drv 1 R/W timing */
- pci_write_config_byte(dev, 0x5c, 0x02); /* Sec addr setup timing */
- pci_write_config_byte(dev, 0x5d, 0x22); /* Sec cmd block timing */
- pci_write_config_byte(dev, 0x5e, 0x22); /* Sec drv 0 R/W timing */
- pci_write_config_byte(dev, 0x5f, 0x22); /* Sec drv 1 R/W timing */
- pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0x20);
- pci_write_config_word(dev, PCI_COMMAND,
- PCI_COMMAND_PARITY | PCI_COMMAND_MASTER |
- PCI_COMMAND_IO);
-}
-
+++ /dev/null
-/*
- * arch/mips/vr41xx/nec-cmbvr4133/setup.c
- *
- * Setup for the NEC CMB-VR4133.
- *
- * Author: Yoichi Yuasa <yyuasa@mvista.com, or source@mvista.com> and
- * Alex Sapkov <asapkov@ru.mvista.com>
- *
- * 2001-2004 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- *
- * Support for CMBVR4133 board in 2.6
- * Author: Manish Lachwani (mlachwani@mvista.com)
- */
-#include <linux/init.h>
-#include <linux/ide.h>
-#include <linux/ioport.h>
-
-#include <asm/reboot.h>
-#include <asm/time.h>
-#include <asm/vr41xx/cmbvr4133.h>
-#include <asm/bootinfo.h>
-
-#ifdef CONFIG_MTD
-#include <linux/mtd/physmap.h>
-#include <linux/mtd/partitions.h>
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/map.h>
-
-static struct mtd_partition cmbvr4133_mtd_parts[] = {
- {
- .name = "User FS",
- .size = 0x1be0000,
- .offset = 0,
- .mask_flags = 0,
- },
- {
- .name = "PMON",
- .size = 0x140000,
- .offset = MTDPART_OFS_APPEND,
- .mask_flags = MTD_WRITEABLE, /* force read-only */
- },
- {
- .name = "User FS2",
- .size = MTDPART_SIZ_FULL,
- .offset = MTDPART_OFS_APPEND,
- .mask_flags = 0,
- }
-};
-
-#define number_partitions ARRAY_SIZE(cmbvr4133_mtd_parts)
-#endif
-
-extern void i8259_init(void);
-
-static void __init nec_cmbvr4133_setup(void)
-{
-#ifdef CONFIG_ROCKHOPPER
- extern void disable_pcnet(void);
-
- disable_pcnet();
-#endif
- set_io_port_base(KSEG1ADDR(0x16000000));
-
-#ifdef CONFIG_PCI
-#ifdef CONFIG_ROCKHOPPER
- ali_m5229_preinit();
-#endif
-#endif
-
-#ifdef CONFIG_ROCKHOPPER
- rockhopper_init_irq();
-#endif
-
-#ifdef CONFIG_MTD
- /* we use generic physmap mapping driver and we use partitions */
- physmap_configure(0x1C000000, 0x02000000, 4, NULL);
- physmap_set_partitions(cmbvr4133_mtd_parts, number_partitions);
-#endif
-
- /* 128 MB memory support */
- add_memory_region(0, 0x08000000, BOOT_MEM_RAM);
-
-#ifdef CONFIG_ROCKHOPPER
- i8259_init();
-#endif
-}
help
Flash memory access on AMD Alchemy Pb/Db/RDK Reference Boards
-config MTD_MTX1
- tristate "4G Systems MTX-1 Flash device"
- depends on MIPS_MTX1 && MTD_CFI
- help
- Flash memory access on 4G Systems MTX-1 Board. If you have one of
- these boards and would like to use the flash chips on it, say 'Y'.
-
config MTD_DILNETPC
tristate "CFI Flash device mapped on DIL/Net PC"
depends on X86 && MTD_CONCAT && MTD_PARTITIONS && MTD_CFI_INTELEXT
obj-$(CONFIG_MTD_SHARP_SL) += sharpsl-flash.o
obj-$(CONFIG_MTD_PLATRAM) += plat-ram.o
obj-$(CONFIG_MTD_OMAP_NOR) += omap_nor.o
-obj-$(CONFIG_MTD_MTX1) += mtx-1_flash.o
obj-$(CONFIG_MTD_INTEL_VR_NOR) += intel_vr_nor.o
+++ /dev/null
-/*
- * Flash memory access on 4G Systems MTX-1 boards
- *
- * $Id: mtx-1_flash.c,v 1.2 2005/11/07 11:14:27 gleixner Exp $
- *
- * (C) 2005 Bruno Randolf <bruno.randolf@4g-systems.biz>
- * (C) 2005 Joern Engel <joern@wohnheim.fh-wedel.de>
- *
- */
-
-#include <linux/module.h>
-#include <linux/types.h>
-#include <linux/init.h>
-#include <linux/kernel.h>
-
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/map.h>
-#include <linux/mtd/partitions.h>
-
-#include <asm/io.h>
-
-static struct map_info mtx1_map = {
- .name = "MTX-1 flash",
- .bankwidth = 4,
- .size = 0x2000000,
- .phys = 0x1E000000,
-};
-
-static struct mtd_partition mtx1_partitions[] = {
- {
- .name = "filesystem",
- .size = 0x01C00000,
- .offset = 0,
- },{
- .name = "yamon",
- .size = 0x00100000,
- .offset = MTDPART_OFS_APPEND,
- .mask_flags = MTD_WRITEABLE,
- },{
- .name = "kernel",
- .size = 0x002c0000,
- .offset = MTDPART_OFS_APPEND,
- },{
- .name = "yamon env",
- .size = 0x00040000,
- .offset = MTDPART_OFS_APPEND,
- }
-};
-
-static struct mtd_info *mtx1_mtd;
-
-int __init mtx1_mtd_init(void)
-{
- int ret = -ENXIO;
-
- simple_map_init(&mtx1_map);
-
- mtx1_map.virt = ioremap(mtx1_map.phys, mtx1_map.size);
- if (!mtx1_map.virt)
- return -EIO;
-
- mtx1_mtd = do_map_probe("cfi_probe", &mtx1_map);
- if (!mtx1_mtd)
- goto err;
-
- mtx1_mtd->owner = THIS_MODULE;
-
- ret = add_mtd_partitions(mtx1_mtd, mtx1_partitions,
- ARRAY_SIZE(mtx1_partitions));
- if (ret)
- goto err;
-
- return 0;
-
-err:
- iounmap(mtx1_map.virt);
- return ret;
-}
-
-static void __exit mtx1_mtd_cleanup(void)
-{
- if (mtx1_mtd) {
- del_mtd_partitions(mtx1_mtd);
- map_destroy(mtx1_mtd);
- }
- if (mtx1_map.virt)
- iounmap(mtx1_map.virt);
-}
-
-module_init(mtx1_mtd_init);
-module_exit(mtx1_mtd_cleanup);
-
-MODULE_AUTHOR("Bruno Randolf <bruno.randolf@4g-systems.biz>");
-MODULE_DESCRIPTION("MTX-1 flash map");
-MODULE_LICENSE("GPL");
#define fast_wmb() __sync()
#define fast_rmb() __sync()
#define fast_mb() __sync()
+#ifdef CONFIG_SGI_IP28
+#define fast_iob() \
+ __asm__ __volatile__( \
+ ".set push\n\t" \
+ ".set noreorder\n\t" \
+ "lw $0,%0\n\t" \
+ "sync\n\t" \
+ "lw $0,%0\n\t" \
+ ".set pop" \
+ : /* no output */ \
+ : "m" (*(int *)CKSEG1ADDR(0x1fa00004)) \
+ : "memory")
+#else
#define fast_iob() \
do { \
__sync(); \
__fast_iob(); \
} while (0)
+#endif
#ifdef CONFIG_CPU_HAS_WB
"2: b 1b \n"
" .previous \n"
: "=&r" (temp), "=m" (*m)
- : "ir" (bit), "m" (*m), "r" (~0));
+ : "i" (bit), "m" (*m), "r" (~0));
#endif /* CONFIG_CPU_MIPSR2 */
} else if (cpu_has_llsc) {
__asm__ __volatile__(
"2: b 1b \n"
" .previous \n"
: "=&r" (temp), "=m" (*m)
- : "ir" (bit), "m" (*m));
+ : "i" (bit), "m" (*m));
#endif /* CONFIG_CPU_MIPSR2 */
} else if (cpu_has_llsc) {
__asm__ __volatile__(
"2: b 1b \n"
" .previous \n"
: "=&r" (temp), "=m" (*m), "=&r" (res)
- : "ri" (bit), "m" (*m)
+ : "i" (bit), "m" (*m)
: "memory");
#endif
} else if (cpu_has_llsc) {
*/
#define MACH_UNKNOWN 0 /* whatever... */
-/*
- * Valid machtype values for group JAZZ
- */
-#define MACH_ACER_PICA_61 0 /* Acer PICA-61 (PICA1) */
-#define MACH_MIPS_MAGNUM_4000 1 /* Mips Magnum 4000 "RC4030" */
-#define MACH_OLIVETTI_M700 2 /* Olivetti M700-10 (-15 ??) */
-
/*
* Valid machtype for group DEC
*/
#define MACH_DS5800 9 /* DECsystem 5800 */
#define MACH_DS5900 10 /* DECsystem 5900 */
-/*
- * Valid machtype for group SNI_RM
- */
-#define MACH_SNI_RM200_PCI 0 /* RM200/RM300/RM400 PCI series */
-
-/*
- * Valid machtype for group SGI
- */
-#define MACH_SGI_IP22 0 /* Indy, Indigo2, Challenge S */
-#define MACH_SGI_IP27 1 /* Origin 200, Origin 2000, Onyx 2 */
-#define MACH_SGI_IP28 2 /* Indigo2 Impact */
-#define MACH_SGI_IP32 3 /* O2 */
-#define MACH_SGI_IP30 4 /* Octane, Octane2 */
-
-/*
- * Valid machtypes for group Toshiba
- */
-#define MACH_PALLAS 0
-#define MACH_TOPAS 1
-#define MACH_JMR 2
-#define MACH_TOSHIBA_JMR3927 3 /* JMR-TX3927 CPU/IO board */
-#define MACH_TOSHIBA_RBTX4927 4
-#define MACH_TOSHIBA_RBTX4937 5
-#define MACH_TOSHIBA_RBTX4938 6
-
-/*
- * Valid machtype for group LASAT
- */
-#define MACH_LASAT_100 0 /* Masquerade II/SP100/SP50/SP25 */
-#define MACH_LASAT_200 1 /* Masquerade PRO/SP200 */
-
-/*
- * Valid machtype for group NEC EMMA2RH
- */
-#define MACH_NEC_MARKEINS 0 /* NEC EMMA2RH Mark-eins */
-
/*
* Valid machtype for group PMC-MSP
*/
#define PRID_IMP_RM7000 0x2700
#define PRID_IMP_NEVADA 0x2800 /* RM5260 ??? */
#define PRID_IMP_RM9000 0x3400
+#define PRID_IMP_LOONGSON1 0x4200
#define PRID_IMP_R5432 0x5400
#define PRID_IMP_R5500 0x5500
+#define PRID_IMP_LOONGSON2 0x6300
#define PRID_IMP_UNKNOWN 0xff00
#define PRID_IMP_24KE 0x9600
#define PRID_IMP_74K 0x9700
#define PRID_IMP_1004K 0x9900
-#define PRID_IMP_LOONGSON1 0x4200
-#define PRID_IMP_LOONGSON2 0x6300
/*
* These are the PRID's for when 23:16 == PRID_COMP_SIBYTE
* KN04-CA) and DECsystem 5900/260 (KN05) R4k CPU card MB ASIC
* definitions.
*
- * Copyright (C) 2002, 2003, 2005 Maciej W. Rozycki
+ * Copyright (C) 2002, 2003, 2005, 2008 Maciej W. Rozycki
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
*/
#define KN4K_MB_INT_TC (1<<0) /* TURBOchannel? */
#define KN4K_MB_INT_RTC (1<<1) /* RTC? */
-#define KN4K_MB_INT_MT (1<<3) /* ??? */
+#define KN4K_MB_INT_MT (1<<3) /* I/O ASIC cascade */
/*
* Bits for the MB control & status register.
- * Set to 0x00bf8001 on my system by the ROM.
+ * Set to 0x00bf8001 for KN05 and to 0x003f8000 for KN04 by the firmware.
*/
#define KN4K_MB_CSR_PF (1<<0) /* PreFetching enable? */
#define KN4K_MB_CSR_F (1<<1) /* ??? */
#define KN4K_MB_CSR_IM (1<<13) /* ??? */
#define KN4K_MB_CSR_NC (1<<14) /* ??? */
#define KN4K_MB_CSR_EE (1<<15) /* (bus) Exception Enable? */
-#define KN4K_MB_CSR_MSK (0x1f<<16) /* ??? */
+#define KN4K_MB_CSR_MSK (0x1f<<16) /* CPU Int[4:0] mask */
#define KN4K_MB_CSR_FW (1<<21) /* ??? */
+#define KN4K_MB_CSR_W (1<<31) /* ??? */
#endif /* __ASM_MIPS_DEC_KN05_H */
+++ /dev/null
-/*
- * Miguel de Icaza
- */
-#ifndef __ASM_INVENTORY_H
-#define __ASM_INVENTORY_H
-
-#include <linux/compiler.h>
-
-typedef struct inventory_s {
- struct inventory_s *inv_next;
- int inv_class;
- int inv_type;
- int inv_controller;
- int inv_unit;
- int inv_state;
-} inventory_t;
-
-extern int inventory_items;
-
-extern void add_to_inventory(int class, int type, int controller, int unit, int state);
-extern int dump_inventory_to_user(void __user *userbuf, int size);
-extern int __init init_inventory(void);
-
-#endif /* __ASM_INVENTORY_H */
#define virt_to_bus virt_to_phys
#define bus_to_virt phys_to_virt
-/*
- * isa_slot_offset is the address where E(ISA) busaddress 0 is mapped
- * for the processor. This implies the assumption that there is only
- * one of these busses.
- */
-extern unsigned long isa_slot_offset;
-
/*
* Change "struct page" to physical address.
*/
memcpy((void __force *) dst, src, count);
}
-/*
- * ISA space is 'always mapped' on currently supported MIPS systems, no need
- * to explicitly ioremap() it. The fact that the ISA IO space is mapped
- * to PAGE_OFFSET is pure coincidence - it does not mean ISA values
- * are physical addresses. The following constant pointer can be
- * used as the IO-area pointer (it can be iounmapped as well, so the
- * analogy with PCI is quite large):
- */
-#define __ISA_IO_base ((char *)(isa_slot_offset))
-
/*
* The caches on some architectures aren't dma-coherent and have need to
* handle this in software. There are three types of operations that
__delay(ns / lasat_ndelay_divider);
}
+#define IS_LASAT_200() (current_cpu_data.cputype == CPU_R5000)
+
#endif /* !defined (_LANGUAGE_ASSEMBLY) */
#define LASAT_SERVICEMODE_MAGIC_1 0xdeadbeef
+++ /dev/null
-/*
- * Copyright (C) 1999, 2000, 2005 MIPS Technologies, Inc.
- * All rights reserved.
- * Authors: Carsten Langgaard <carstenl@mips.com>
- * Maciej W. Rozycki <macro@mips.com>
- * Copyright (C) 2003, 05 Ralf Baechle (ralf@linux-mips.org)
- *
- * This program is free software; you can distribute it and/or modify it
- * under the terms of the GNU General Public License (Version 2) as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- */
-#ifndef __ASM_MACH_ATLAS_MC146818RTC_H
-#define __ASM_MACH_ATLAS_MC146818RTC_H
-
-#include <linux/types.h>
-
-#include <asm/addrspace.h>
-
-#include <asm/mips-boards/atlas.h>
-#include <asm/mips-boards/atlasint.h>
-
-#define ARCH_RTC_LOCATION
-
-#define RTC_PORT(x) (ATLAS_RTC_ADR_REG + (x) * 8)
-#define RTC_IO_EXTENT 0x100
-#define RTC_IOMAPPED 0
-#define RTC_IRQ ATLAS_INT_RTC
-
-static inline unsigned char CMOS_READ(unsigned long addr)
-{
- volatile u32 *ireg = (void *)CKSEG1ADDR(RTC_PORT(0));
- volatile u32 *dreg = (void *)CKSEG1ADDR(RTC_PORT(1));
-
- *ireg = addr;
- return *dreg;
-}
-
-static inline void CMOS_WRITE(unsigned char data, unsigned long addr)
-{
- volatile u32 *ireg = (void *)CKSEG1ADDR(RTC_PORT(0));
- volatile u32 *dreg = (void *)CKSEG1ADDR(RTC_PORT(1));
-
- *ireg = addr;
- *dreg = data;
-}
-
-#define RTC_ALWAYS_BCD 0
-
-#define mc146818_decode_year(year) ((year) < 70 ? (year) + 2000 : (year) + 1900)
-
-#endif /* __ASM_MACH_ATLAS_MC146818RTC_H */
#define SET_VCC_VPP(VCC, VPP, SLOT)\
((((VCC) << 2) | ((VPP) << 0)) << ((SLOT) * 8))
-/*
- * SD controller macros
- */
-
-/* Detect card. */
-#define mmc_card_inserted(_n_, _res_) \
- do { \
- BCSR * const bcsr = (BCSR *)0xAE000000; \
- unsigned long mmc_wp, board_specific; \
- if ((_n_)) { \
- mmc_wp = BCSR_BOARD_SD1_WP; \
- } else { \
- mmc_wp = BCSR_BOARD_SD0_WP; \
- } \
- board_specific = au_readl((unsigned long)(&bcsr->specific)); \
- if (!(board_specific & mmc_wp)) {/* low means card present */ \
- *(int *)(_res_) = 1; \
- } else { \
- *(int *)(_res_) = 0; \
- } \
- } while (0)
-
-/*
- * Apply power to card slot(s).
- */
-#define mmc_power_on(_n_) \
- do { \
- BCSR * const bcsr = (BCSR *)0xAE000000; \
- unsigned long mmc_pwr, mmc_wp, board_specific; \
- if ((_n_)) { \
- mmc_pwr = BCSR_BOARD_SD1_PWR; \
- mmc_wp = BCSR_BOARD_SD1_WP; \
- } else { \
- mmc_pwr = BCSR_BOARD_SD0_PWR; \
- mmc_wp = BCSR_BOARD_SD0_WP; \
- } \
- board_specific = au_readl((unsigned long)(&bcsr->specific)); \
- if (!(board_specific & mmc_wp)) {/* low means card present */ \
- board_specific |= mmc_pwr; \
- au_writel(board_specific, (int)(&bcsr->specific)); \
- au_sync(); \
- } \
- } while (0)
-
-
/*
* NAND defines
*
/*
- * include/asm-mips/mach-jmr3927/ioremap.h
+ * include/asm-mips/mach-tx39xx/ioremap.h
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
-#ifndef __ASM_MACH_JMR3927_IOREMAP_H
-#define __ASM_MACH_JMR3927_IOREMAP_H
+#ifndef __ASM_MACH_TX39XX_IOREMAP_H
+#define __ASM_MACH_TX39XX_IOREMAP_H
#include <linux/types.h>
return (unsigned long)addr >= TXX9_DIRECTMAP_BASE;
}
-#endif /* __ASM_MACH_JMR3927_IOREMAP_H */
+#endif /* __ASM_MACH_TX39XX_IOREMAP_H */
-#ifndef __ASM_MACH_JMR3927_MANGLE_PORT_H
-#define __ASM_MACH_JMR3927_MANGLE_PORT_H
+#ifndef __ASM_MACH_TX39XX_MANGLE_PORT_H
+#define __ASM_MACH_TX39XX_MANGLE_PORT_H
-extern unsigned long __swizzle_addr_b(unsigned long port);
+#if defined(CONFIG_TOSHIBA_JMR3927)
+extern unsigned long (*__swizzle_addr_b)(unsigned long port);
+#define NEEDS_TXX9_SWIZZLE_ADDR_B
+#else
+#define __swizzle_addr_b(port) (port)
+#endif
#define __swizzle_addr_w(port) (port)
#define __swizzle_addr_l(port) (port)
#define __swizzle_addr_q(port) (port)
#define ioswabq(a, x) le64_to_cpu(x)
#define __mem_ioswabq(a, x) (x)
-#endif /* __ASM_MACH_JMR3927_MANGLE_PORT_H */
+#endif /* __ASM_MACH_TX39XX_MANGLE_PORT_H */
*
* Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
*/
-#ifndef __ASM_MIPS_MACH_JMR3927_WAR_H
-#define __ASM_MIPS_MACH_JMR3927_WAR_H
+#ifndef __ASM_MIPS_MACH_TX39XX_WAR_H
+#define __ASM_MIPS_MACH_TX39XX_WAR_H
#define R4600_V1_INDEX_ICACHEOP_WAR 0
#define R4600_V1_HIT_CACHEOP_WAR 0
#define R10000_LLSC_WAR 0
#define MIPS34K_MISSED_ITLB_WAR 0
-#endif /* __ASM_MIPS_MACH_JMR3927_WAR_H */
+#endif /* __ASM_MIPS_MACH_TX39XX_WAR_H */
#define __ASM_MACH_VR41XX_IRQ_H
#include <asm/vr41xx/irq.h> /* for MIPS_CPU_IRQ_BASE */
-#ifdef CONFIG_NEC_CMBVR4133
-#include <asm/vr41xx/cmbvr4133.h> /* for I8259A_IRQ_BASE */
-#endif
#include_next <irq.h>
/*
* Display register base.
*/
-#ifdef CONFIG_MIPS_SEAD
-#define ASCII_DISPLAY_POS_BASE 0x1f0005c0
-#else
#define ASCII_DISPLAY_WORD_BASE 0x1f000410
#define ASCII_DISPLAY_POS_BASE 0x1f000418
-#endif
/*
/*
* Reset register.
*/
-#ifdef CONFIG_MIPS_SEAD
-#define SOFTRES_REG 0x1e800050
-#define GORESET 0x4d
-#else
#define SOFTRES_REG 0x1f000500
#define GORESET 0x42
-#endif
/*
* Revision register.
#ifndef _ASM_NAMEI_H
#define _ASM_NAMEI_H
-#include <linux/personality.h>
-#include <linux/stddef.h>
+/*
+ * This dummy routine maybe changed to something useful
+ * for /usr/gnemul/ emulation stuff.
+ */
-#define IRIX_EMUL "/usr/gnemul/irix/"
-#define RISCOS_EMUL "/usr/gnemul/riscos/"
-
-static inline char *__emul_prefix(void)
-{
- switch (current->personality) {
- case PER_IRIX32:
- case PER_IRIXN32:
- case PER_IRIX64:
- return IRIX_EMUL;
-
- case PER_RISCOS:
- return RISCOS_EMUL;
-
- default:
- return NULL;
- }
-}
+#define __emul_prefix() NULL
#endif /* _ASM_NAMEI_H */
return channel ? 15 : 14;
}
+extern int pci_probe_only;
+extern unsigned int pcibios_max_latency;
+
#endif /* _ASM_PCI_H */
+++ /dev/null
-/*
- * IRIX prctl interface
- *
- * The IRIX kernel maps a page at PRDA_ADDRESS with the
- * contents of prda and fills it the bits on prda_sys.
- */
-
-#ifndef __PRCTL_H__
-#define __PRCTL_H__
-
-#define PRDA_ADDRESS 0x200000L
-#define PRDA ((struct prda *) PRDA_ADDRESS)
-
-struct prda_sys {
- pid_t t_pid;
- u32 t_hint;
- u32 t_dlactseq;
- u32 t_fpflags;
- u32 t_prid; /* processor type, $prid CP0 register */
- u32 t_dlendseq;
- u64 t_unused1[5];
- pid_t t_rpid;
- s32 t_resched;
- u32 t_unused[8];
- u32 t_cpu; /* current/last cpu */
-
- /* FIXME: The signal information, not supported by Linux now */
- u32 t_flags; /* if true, then the sigprocmask is in userspace */
- u32 t_sigprocmask [1]; /* the sigprocmask */
-};
-
-struct prda {
- char fill [0xe00];
- struct prda_sys prda_sys;
-};
-
-#define t_sys prda_sys
-
-ptrdiff_t prctl(int op, int v1, int v2);
-
-#endif
#define COMMAND_LINE_SIZE 256
+extern void setup_early_printk(void);
+
#endif /* __SETUP_H */
struct k_sigaction {
struct sigaction sa;
-#ifdef CONFIG_BINFMT_IRIX
- void (*sa_restorer)(void);
-#endif
};
/* IRIX compatible stack_t */
extern void (*board_nmi_handler_setup)(void);
extern void (*board_ejtag_handler_setup)(void);
extern void (*board_bind_eic_interrupt)(int irq, int regset);
-extern void (*board_watchpoint_handler)(struct pt_regs *regs);
#endif /* _ASM_TRAPS_H */
+++ /dev/null
-/*
- * Author: MontaVista Software, Inc.
- * source@mvista.com
- *
- * Copyright 2001-2006 MontaVista Software Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
- * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
- * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-#ifndef __ASM_TX4927_TX4927_H
-#define __ASM_TX4927_TX4927_H
-
-#include <asm/txx9irq.h>
-
-#define TX4927_IRQ_CP0_BEG MIPS_CPU_IRQ_BASE
-#define TX4927_IRQ_CP0_END (MIPS_CPU_IRQ_BASE + 8 - 1)
-
-#define TX4927_IRQ_PIC_BEG TXX9_IRQ_BASE
-#define TX4927_IRQ_PIC_END (TXX9_IRQ_BASE + TXx9_MAX_IR - 1)
-
-
-#define TX4927_IRQ_USER0 (TX4927_IRQ_CP0_BEG+0)
-#define TX4927_IRQ_USER1 (TX4927_IRQ_CP0_BEG+1)
-#define TX4927_IRQ_NEST_PIC_ON_CP0 (TX4927_IRQ_CP0_BEG+2)
-#define TX4927_IRQ_CPU_TIMER (TX4927_IRQ_CP0_BEG+7)
-
-#define TX4927_IRQ_NEST_EXT_ON_PIC (TX4927_IRQ_PIC_BEG+3)
-
-#endif /* __ASM_TX4927_TX4927_H */
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2000-2001 Toshiba Corporation
- */
-#ifndef __ASM_TX4927_TX4927_PCI_H
-#define __ASM_TX4927_TX4927_PCI_H
-
-#define TX4927_CCFG_TOE 0x00004000
-#define TX4927_CCFG_WR 0x00008000
-#define TX4927_CCFG_TINTDIS 0x01000000
-
-#define TX4927_PCIMEM 0x08000000
-#define TX4927_PCIMEM_SIZE 0x08000000
-#define TX4927_PCIIO 0x16000000
-#define TX4927_PCIIO_SIZE 0x01000000
-
-#define TX4927_SDRAMC_REG 0xff1f8000
-#define TX4927_EBUSC_REG 0xff1f9000
-#define TX4927_PCIC_REG 0xff1fd000
-#define TX4927_CCFG_REG 0xff1fe000
-#define TX4927_IRC_REG 0xff1ff600
-#define TX4927_NR_TMR 3
-#define TX4927_TMR_REG(ch) (0xff1ff000 + (ch) * 0x100)
-#define TX4927_CE3 0x17f00000 /* 1M */
-#define TX4927_PCIRESET_ADDR 0xbc00f006
-#define TX4927_PCI_CLK_ADDR (KSEG1 + TX4927_CE3 + 0x00040020)
-
-#define TX4927_IMSTAT_ADDR(n) (KSEG1 + TX4927_CE3 + 0x0004001a + (n))
-#define tx4927_imstat_ptr(n) \
- ((volatile unsigned char *)TX4927_IMSTAT_ADDR(n))
-
-/* bits for ISTAT3/IMASK3/IMSTAT3 */
-#define TX4927_INT3B_PCID 0
-#define TX4927_INT3B_PCIC 1
-#define TX4927_INT3B_PCIB 2
-#define TX4927_INT3B_PCIA 3
-#define TX4927_INT3F_PCID (1 << TX4927_INT3B_PCID)
-#define TX4927_INT3F_PCIC (1 << TX4927_INT3B_PCIC)
-#define TX4927_INT3F_PCIB (1 << TX4927_INT3B_PCIB)
-#define TX4927_INT3F_PCIA (1 << TX4927_INT3B_PCIA)
-
-/* bits for PCI_CLK (S6) */
-#define TX4927_PCI_CLK_HOST 0x80
-#define TX4927_PCI_CLK_MASK (0x0f << 3)
-#define TX4927_PCI_CLK_33 (0x01 << 3)
-#define TX4927_PCI_CLK_25 (0x04 << 3)
-#define TX4927_PCI_CLK_66 (0x09 << 3)
-#define TX4927_PCI_CLK_50 (0x0c << 3)
-#define TX4927_PCI_CLK_ACK 0x04
-#define TX4927_PCI_CLK_ACE 0x02
-#define TX4927_PCI_CLK_ENDIAN 0x01
-#define TX4927_NR_IRQ_LOCAL TX4927_IRQ_PIC_BEG
-#define TX4927_NR_IRQ_IRC 32 /* On-Chip IRC */
-
-#define TX4927_IR_PCIC 16
-#define TX4927_IR_PCIERR 22
-#define TX4927_IR_PCIPMA 23
-#define TX4927_IRQ_IRC_PCIC (TX4927_NR_IRQ_LOCAL + TX4927_IR_PCIC)
-#define TX4927_IRQ_IRC_PCIERR (TX4927_NR_IRQ_LOCAL + TX4927_IR_PCIERR)
-#define TX4927_IRQ_IOC1 (TX4927_NR_IRQ_LOCAL + TX4927_NR_IRQ_IRC)
-#define TX4927_IRQ_IOC_PCID (TX4927_IRQ_IOC1 + TX4927_INT3B_PCID)
-#define TX4927_IRQ_IOC_PCIC (TX4927_IRQ_IOC1 + TX4927_INT3B_PCIC)
-#define TX4927_IRQ_IOC_PCIB (TX4927_IRQ_IOC1 + TX4927_INT3B_PCIB)
-#define TX4927_IRQ_IOC_PCIA (TX4927_IRQ_IOC1 + TX4927_INT3B_PCIA)
-
-#ifdef _LANGUAGE_ASSEMBLY
-#define _CONST64(c) c
-#else
-#define _CONST64(c) c##ull
-
-#include <asm/byteorder.h>
-
-#define tx4927_pcireset_ptr \
- ((volatile unsigned char *)TX4927_PCIRESET_ADDR)
-#define tx4927_pci_clk_ptr \
- ((volatile unsigned char *)TX4927_PCI_CLK_ADDR)
-
-struct tx4927_sdramc_reg {
- volatile unsigned long long cr[4];
- volatile unsigned long long unused0[4];
- volatile unsigned long long tr;
- volatile unsigned long long unused1[2];
- volatile unsigned long long cmd;
-};
-
-struct tx4927_ebusc_reg {
- volatile unsigned long long cr[8];
-};
-
-struct tx4927_ccfg_reg {
- volatile unsigned long long ccfg;
- volatile unsigned long long crir;
- volatile unsigned long long pcfg;
- volatile unsigned long long tear;
- volatile unsigned long long clkctr;
- volatile unsigned long long unused0;
- volatile unsigned long long garbc;
- volatile unsigned long long unused1;
- volatile unsigned long long unused2;
- volatile unsigned long long ramp;
-};
-
-struct tx4927_pcic_reg {
- volatile unsigned long pciid;
- volatile unsigned long pcistatus;
- volatile unsigned long pciccrev;
- volatile unsigned long pcicfg1;
- volatile unsigned long p2gm0plbase; /* +10 */
- volatile unsigned long p2gm0pubase;
- volatile unsigned long p2gm1plbase;
- volatile unsigned long p2gm1pubase;
- volatile unsigned long p2gm2pbase; /* +20 */
- volatile unsigned long p2giopbase;
- volatile unsigned long unused0;
- volatile unsigned long pcisid;
- volatile unsigned long unused1; /* +30 */
- volatile unsigned long pcicapptr;
- volatile unsigned long unused2;
- volatile unsigned long pcicfg2;
- volatile unsigned long g2ptocnt; /* +40 */
- volatile unsigned long unused3[15];
- volatile unsigned long g2pstatus; /* +80 */
- volatile unsigned long g2pmask;
- volatile unsigned long pcisstatus;
- volatile unsigned long pcimask;
- volatile unsigned long p2gcfg; /* +90 */
- volatile unsigned long p2gstatus;
- volatile unsigned long p2gmask;
- volatile unsigned long p2gccmd;
- volatile unsigned long unused4[24]; /* +a0 */
- volatile unsigned long pbareqport; /* +100 */
- volatile unsigned long pbacfg;
- volatile unsigned long pbastatus;
- volatile unsigned long pbamask;
- volatile unsigned long pbabm; /* +110 */
- volatile unsigned long pbacreq;
- volatile unsigned long pbacgnt;
- volatile unsigned long pbacstate;
- volatile unsigned long long g2pmgbase[3]; /* +120 */
- volatile unsigned long long g2piogbase;
- volatile unsigned long g2pmmask[3]; /* +140 */
- volatile unsigned long g2piomask;
- volatile unsigned long long g2pmpbase[3]; /* +150 */
- volatile unsigned long long g2piopbase;
- volatile unsigned long pciccfg; /* +170 */
- volatile unsigned long pcicstatus;
- volatile unsigned long pcicmask;
- volatile unsigned long unused5;
- volatile unsigned long long p2gmgbase[3]; /* +180 */
- volatile unsigned long long p2giogbase;
- volatile unsigned long g2pcfgadrs; /* +1a0 */
- volatile unsigned long g2pcfgdata;
- volatile unsigned long unused6[8];
- volatile unsigned long g2pintack;
- volatile unsigned long g2pspc;
- volatile unsigned long unused7[12]; /* +1d0 */
- volatile unsigned long long pdmca; /* +200 */
- volatile unsigned long long pdmga;
- volatile unsigned long long pdmpa;
- volatile unsigned long long pdmcut;
- volatile unsigned long long pdmcnt; /* +220 */
- volatile unsigned long long pdmsts;
- volatile unsigned long long unused8[2];
- volatile unsigned long long pdmdb[4]; /* +240 */
- volatile unsigned long long pdmtdh; /* +260 */
- volatile unsigned long long pdmdms;
-};
-
-#endif /* _LANGUAGE_ASSEMBLY */
-
-/*
- * PCIC
- */
-
-/* bits for G2PSTATUS/G2PMASK */
-#define TX4927_PCIC_G2PSTATUS_ALL 0x00000003
-#define TX4927_PCIC_G2PSTATUS_TTOE 0x00000002
-#define TX4927_PCIC_G2PSTATUS_RTOE 0x00000001
-
-/* bits for PCIMASK (see also PCI_STATUS_XXX in linux/pci.h */
-#define TX4927_PCIC_PCISTATUS_ALL 0x0000f900
-
-/* bits for PBACFG */
-#define TX4927_PCIC_PBACFG_RPBA 0x00000004
-#define TX4927_PCIC_PBACFG_PBAEN 0x00000002
-#define TX4927_PCIC_PBACFG_BMCEN 0x00000001
-
-/* bits for G2PMnGBASE */
-#define TX4927_PCIC_G2PMnGBASE_BSDIS _CONST64(0x0000002000000000)
-#define TX4927_PCIC_G2PMnGBASE_ECHG _CONST64(0x0000001000000000)
-
-/* bits for G2PIOGBASE */
-#define TX4927_PCIC_G2PIOGBASE_BSDIS _CONST64(0x0000002000000000)
-#define TX4927_PCIC_G2PIOGBASE_ECHG _CONST64(0x0000001000000000)
-
-/* bits for PCICSTATUS/PCICMASK */
-#define TX4927_PCIC_PCICSTATUS_ALL 0x000007dc
-
-/* bits for PCICCFG */
-#define TX4927_PCIC_PCICCFG_LBWC_MASK 0x0fff0000
-#define TX4927_PCIC_PCICCFG_HRST 0x00000800
-#define TX4927_PCIC_PCICCFG_SRST 0x00000400
-#define TX4927_PCIC_PCICCFG_IRBER 0x00000200
-#define TX4927_PCIC_PCICCFG_IMSE0 0x00000100
-#define TX4927_PCIC_PCICCFG_IMSE1 0x00000080
-#define TX4927_PCIC_PCICCFG_IMSE2 0x00000040
-#define TX4927_PCIC_PCICCFG_IISE 0x00000020
-#define TX4927_PCIC_PCICCFG_ATR 0x00000010
-#define TX4927_PCIC_PCICCFG_ICAE 0x00000008
-
-/* bits for P2GMnGBASE */
-#define TX4927_PCIC_P2GMnGBASE_TMEMEN _CONST64(0x0000004000000000)
-#define TX4927_PCIC_P2GMnGBASE_TBSDIS _CONST64(0x0000002000000000)
-#define TX4927_PCIC_P2GMnGBASE_TECHG _CONST64(0x0000001000000000)
-
-/* bits for P2GIOGBASE */
-#define TX4927_PCIC_P2GIOGBASE_TIOEN _CONST64(0x0000004000000000)
-#define TX4927_PCIC_P2GIOGBASE_TBSDIS _CONST64(0x0000002000000000)
-#define TX4927_PCIC_P2GIOGBASE_TECHG _CONST64(0x0000001000000000)
-
-#define TX4927_PCIC_IDSEL_AD_TO_SLOT(ad) ((ad) - 11)
-#define TX4927_PCIC_MAX_DEVNU TX4927_PCIC_IDSEL_AD_TO_SLOT(32)
-
-/*
- * CCFG
- */
-/* CCFG : Chip Configuration */
-#define TX4927_CCFG_PCI66 0x00800000
-#define TX4927_CCFG_PCIMIDE 0x00400000
-#define TX4927_CCFG_PCIXARB 0x00002000
-#define TX4927_CCFG_PCIDIVMODE_MASK 0x00001800
-#define TX4927_CCFG_PCIDIVMODE_2_5 0x00000000
-#define TX4927_CCFG_PCIDIVMODE_3 0x00000800
-#define TX4927_CCFG_PCIDIVMODE_5 0x00001000
-#define TX4927_CCFG_PCIDIVMODE_6 0x00001800
-
-#define TX4937_CCFG_PCIDIVMODE_MASK 0x00001c00
-#define TX4937_CCFG_PCIDIVMODE_8 0x00000000
-#define TX4937_CCFG_PCIDIVMODE_4 0x00000400
-#define TX4937_CCFG_PCIDIVMODE_9 0x00000800
-#define TX4937_CCFG_PCIDIVMODE_4_5 0x00000c00
-#define TX4937_CCFG_PCIDIVMODE_10 0x00001000
-#define TX4937_CCFG_PCIDIVMODE_5 0x00001400
-#define TX4937_CCFG_PCIDIVMODE_11 0x00001800
-#define TX4937_CCFG_PCIDIVMODE_5_5 0x00001c00
-
-/* PCFG : Pin Configuration */
-#define TX4927_PCFG_PCICLKEN_ALL 0x003f0000
-#define TX4927_PCFG_PCICLKEN(ch) (0x00010000<<(ch))
-
-/* CLKCTR : Clock Control */
-#define TX4927_CLKCTR_PCICKD 0x00400000
-#define TX4927_CLKCTR_PCIRST 0x00000040
-
-
-#ifndef _LANGUAGE_ASSEMBLY
-
-#define tx4927_sdramcptr ((struct tx4927_sdramc_reg *)TX4927_SDRAMC_REG)
-#define tx4927_pcicptr ((struct tx4927_pcic_reg *)TX4927_PCIC_REG)
-#define tx4927_ccfgptr ((struct tx4927_ccfg_reg *)TX4927_CCFG_REG)
-#define tx4927_ebuscptr ((struct tx4927_ebusc_reg *)TX4927_EBUSC_REG)
-
-#endif /* _LANGUAGE_ASSEMBLY */
-
-#endif /* __ASM_TX4927_TX4927_PCI_H */
--- /dev/null
+/*
+ * linux/include/asm-mips/txx9/generic.h
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#ifndef __ASM_TXX9_GENERIC_H
+#define __ASM_TXX9_GENERIC_H
+
+#include <linux/init.h>
+#include <linux/ioport.h> /* for struct resource */
+
+extern struct resource txx9_ce_res[];
+extern char txx9_pcode_str[8];
+void txx9_reg_res_init(unsigned int pcode, unsigned long base,
+ unsigned long size);
+
+extern unsigned int txx9_master_clock;
+extern unsigned int txx9_cpu_clock;
+extern unsigned int txx9_gbus_clock;
+
+struct pci_dev;
+struct txx9_board_vec {
+ const char *system;
+ void (*prom_init)(void);
+ void (*mem_setup)(void);
+ void (*irq_setup)(void);
+ void (*time_init)(void);
+ void (*arch_init)(void);
+ void (*device_init)(void);
+#ifdef CONFIG_PCI
+ int (*pci_map_irq)(const struct pci_dev *dev, u8 slot, u8 pin);
+#endif
+};
+extern struct txx9_board_vec *txx9_board_vec;
+extern int (*txx9_irq_dispatch)(int pending);
+void prom_init_cmdline(void);
+char *prom_getcmdline(void);
+
+#endif /* __ASM_TXX9_GENERIC_H */
*
* Copyright (C) 2000-2001 Toshiba Corporation
*/
-#ifndef __ASM_TX3927_JMR3927_H
-#define __ASM_TX3927_JMR3927_H
+#ifndef __ASM_TXX9_JMR3927_H
+#define __ASM_TXX9_JMR3927_H
-#include <asm/jmr3927/tx3927.h>
+#include <asm/txx9/tx3927.h>
#include <asm/addrspace.h>
#include <asm/system.h>
#include <asm/txx9irq.h>
* INT[3:0]
*/
-#endif /* __ASM_TX3927_JMR3927_H */
+void jmr3927_prom_init(void);
+void jmr3927_irq_setup(void);
+struct pci_dev;
+int jmr3927_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
+
+#endif /* __ASM_TXX9_JMR3927_H */
--- /dev/null
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#ifndef __ASM_TXX9_PCI_H
+#define __ASM_TXX9_PCI_H
+
+#include <linux/pci.h>
+
+extern struct pci_controller txx9_primary_pcic;
+struct pci_controller *
+txx9_alloc_pci_controller(struct pci_controller *pcic,
+ unsigned long mem_base, unsigned long mem_size,
+ unsigned long io_base, unsigned long io_size);
+
+int txx9_pci66_check(struct pci_controller *hose, int top_bus,
+ int current_bus);
+extern int txx9_pci_mem_high __initdata;
+
+extern int txx9_pci_option;
+#define TXX9_PCI_OPT_PICMG 0x0002
+#define TXX9_PCI_OPT_CLK_33 0x0008
+#define TXX9_PCI_OPT_CLK_66 0x0010
+#define TXX9_PCI_OPT_CLK_MASK \
+ (TXX9_PCI_OPT_CLK_33 | TXX9_PCI_OPT_CLK_66)
+#define TXX9_PCI_OPT_CLK_AUTO TXX9_PCI_OPT_CLK_MASK
+
+enum txx9_pci_err_action {
+ TXX9_PCI_ERR_REPORT,
+ TXX9_PCI_ERR_IGNORE,
+ TXX9_PCI_ERR_PANIC,
+};
+extern enum txx9_pci_err_action txx9_pci_err_action;
+
+#endif /* __ASM_TXX9_PCI_H */
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
-#ifndef __ASM_TX4927_TOSHIBA_RBTX4927_H
-#define __ASM_TX4927_TOSHIBA_RBTX4927_H
+#ifndef __ASM_TXX9_RBTX4927_H
+#define __ASM_TXX9_RBTX4927_H
-#include <asm/tx4927/tx4927.h>
-#ifdef CONFIG_PCI
-#include <asm/tx4927/tx4927_pci.h>
-#endif
+#include <asm/txx9/tx4927.h>
+
+#define RBTX4927_PCIMEM 0x08000000
+#define RBTX4927_PCIMEM_SIZE 0x08000000
+#define RBTX4927_PCIIO 0x16000000
+#define RBTX4927_PCIIO_SIZE 0x01000000
+
+#define rbtx4927_pcireset_addr ((__u8 __iomem *)0xbc00f006UL)
+
+/* bits for ISTAT/IMASK/IMSTAT */
+#define RBTX4927_INTB_PCID 0
+#define RBTX4927_INTB_PCIC 1
+#define RBTX4927_INTB_PCIB 2
+#define RBTX4927_INTB_PCIA 3
+#define RBTX4927_INTF_PCID (1 << RBTX4927_INTB_PCID)
+#define RBTX4927_INTF_PCIC (1 << RBTX4927_INTB_PCIC)
+#define RBTX4927_INTF_PCIB (1 << RBTX4927_INTB_PCIB)
+#define RBTX4927_INTF_PCIA (1 << RBTX4927_INTB_PCIA)
+
+#define RBTX4927_NR_IRQ_IOC 8 /* IOC */
+
+#define RBTX4927_IRQ_IOC (TXX9_IRQ_BASE + TX4927_NUM_IR)
+#define RBTX4927_IRQ_IOC_PCID (RBTX4927_IRQ_IOC + RBTX4927_INTB_PCID)
+#define RBTX4927_IRQ_IOC_PCIC (RBTX4927_IRQ_IOC + RBTX4927_INTB_PCIC)
+#define RBTX4927_IRQ_IOC_PCIB (RBTX4927_IRQ_IOC + RBTX4927_INTB_PCIB)
+#define RBTX4927_IRQ_IOC_PCIA (RBTX4927_IRQ_IOC + RBTX4927_INTB_PCIA)
+
+#define RBTX4927_IRQ_IOCINT (TXX9_IRQ_BASE + TX4927_IR_INT(1))
#ifdef CONFIG_PCI
-#define TBTX4927_ISA_IO_OFFSET TX4927_PCIIO
+#define RBTX4927_ISA_IO_OFFSET RBTX4927_PCIIO
#else
-#define TBTX4927_ISA_IO_OFFSET 0
+#define RBTX4927_ISA_IO_OFFSET 0
#endif
#define RBTX4927_SW_RESET_DO (void __iomem *)0xbc00f000UL
#define RBTX4927_SW_RESET_ENABLE (void __iomem *)0xbc00f002UL
#define RBTX4927_SW_RESET_ENABLE_SET 0x01
+#define RBTX4927_RTL_8019_BASE (0x1c020280 - RBTX4927_ISA_IO_OFFSET)
+#define RBTX4927_RTL_8019_IRQ (TXX9_IRQ_BASE + TX4927_IR_INT(3))
-#define RBTX4927_RTL_8019_BASE (0x1c020280-TBTX4927_ISA_IO_OFFSET)
-#define RBTX4927_RTL_8019_IRQ (TX4927_IRQ_PIC_BEG + 5)
-
-int toshiba_rbtx4927_irq_nested(int sw_irq);
+void rbtx4927_prom_init(void);
+void rbtx4927_irq_setup(void);
+struct pci_dev;
+int rbtx4927_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
-#endif /* __ASM_TX4927_TOSHIBA_RBTX4927_H */
+#endif /* __ASM_TXX9_RBTX4927_H */
/*
- * linux/include/asm-mips/tx4938/rbtx4938.h
* Definitions for TX4937/TX4938
*
* 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
*
* Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
*/
-#ifndef __ASM_TX_BOARDS_RBTX4938_H
-#define __ASM_TX_BOARDS_RBTX4938_H
+#ifndef __ASM_TXX9_RBTX4938_H
+#define __ASM_TXX9_RBTX4938_H
#include <asm/addrspace.h>
-#include <asm/tx4938/tx4938.h>
#include <asm/txx9irq.h>
+#include <asm/txx9/tx4938.h>
/* CS */
#define RBTX4938_CE0 0x1c000000 /* 64M */
* that particular IRQ on an RBTX4938 machine. Add new 'spaces' as new
* IRQ hardware is supported.
*/
-#define RBTX4938_NR_IRQ_LOCAL 8
-#define RBTX4938_NR_IRQ_IRC 32 /* On-Chip IRC */
#define RBTX4938_NR_IRQ_IOC 8
-#define TX4938_IRQ_CP0_BEG MIPS_CPU_IRQ_BASE
-#define TX4938_IRQ_CP0_END (MIPS_CPU_IRQ_BASE + 8 - 1)
-
-#define TX4938_IRQ_PIC_BEG TXX9_IRQ_BASE
-#define TX4938_IRQ_PIC_END (TXX9_IRQ_BASE + TXx9_MAX_IR - 1)
-#define TX4938_IRQ_NEST_EXT_ON_PIC (TX4938_IRQ_PIC_BEG+2)
-#define TX4938_IRQ_NEST_PIC_ON_CP0 (TX4938_IRQ_CP0_BEG+2)
-#define TX4938_IRQ_USER0 (TX4938_IRQ_CP0_BEG+0)
-#define TX4938_IRQ_USER1 (TX4938_IRQ_CP0_BEG+1)
-#define TX4938_IRQ_CPU_TIMER (TX4938_IRQ_CP0_BEG+7)
-
-#define TOSHIBA_RBTX4938_IRQ_IOC_RAW_BEG 0
-#define TOSHIBA_RBTX4938_IRQ_IOC_RAW_END 7
-
-#define TOSHIBA_RBTX4938_IRQ_IOC_BEG ((TX4938_IRQ_PIC_END+1)+TOSHIBA_RBTX4938_IRQ_IOC_RAW_BEG) /* 56 */
-#define TOSHIBA_RBTX4938_IRQ_IOC_END ((TX4938_IRQ_PIC_END+1)+TOSHIBA_RBTX4938_IRQ_IOC_RAW_END) /* 63 */
-#define RBTX4938_IRQ_LOCAL TX4938_IRQ_CP0_BEG
-#define RBTX4938_IRQ_IRC (RBTX4938_IRQ_LOCAL + RBTX4938_NR_IRQ_LOCAL)
-#define RBTX4938_IRQ_IOC (RBTX4938_IRQ_IRC + RBTX4938_NR_IRQ_IRC)
+#define RBTX4938_IRQ_IRC TXX9_IRQ_BASE
+#define RBTX4938_IRQ_IOC (TXX9_IRQ_BASE + TX4938_NUM_IR)
#define RBTX4938_IRQ_END (RBTX4938_IRQ_IOC + RBTX4938_NR_IRQ_IOC)
-#define RBTX4938_IRQ_LOCAL_SOFT0 (RBTX4938_IRQ_LOCAL + RBTX4938_SOFT_INT0)
-#define RBTX4938_IRQ_LOCAL_SOFT1 (RBTX4938_IRQ_LOCAL + RBTX4938_SOFT_INT1)
-#define RBTX4938_IRQ_LOCAL_IRC (RBTX4938_IRQ_LOCAL + RBTX4938_IRC_INT)
-#define RBTX4938_IRQ_LOCAL_TIMER (RBTX4938_IRQ_LOCAL + RBTX4938_TIMER_INT)
#define RBTX4938_IRQ_IRC_ECCERR (RBTX4938_IRQ_IRC + TX4938_IR_ECCERR)
#define RBTX4938_IRQ_IRC_WTOERR (RBTX4938_IRQ_IRC + TX4938_IR_WTOERR)
#define RBTX4938_IRQ_IRC_INT(n) (RBTX4938_IRQ_IRC + TX4938_IR_INT(n))
/* IOC (PCI, etc) */
-#define RBTX4938_IRQ_IOCINT (TX4938_IRQ_NEST_EXT_ON_PIC)
+#define RBTX4938_IRQ_IOCINT (TXX9_IRQ_BASE + TX4938_IR_INT(0))
/* Onboard 10M Ether */
-#define RBTX4938_IRQ_ETHER (TX4938_IRQ_NEST_EXT_ON_PIC + 1)
+#define RBTX4938_IRQ_ETHER (TXX9_IRQ_BASE + TX4938_IR_INT(1))
#define RBTX4938_RTL_8019_BASE (RBTX4938_ETHER_ADDR - mips_io_port_base)
#define RBTX4938_RTL_8019_IRQ (RBTX4938_IRQ_ETHER)
-#endif /* __ASM_TX_BOARDS_RBTX4938_H */
+void rbtx4938_prom_init(void);
+void rbtx4938_irq_setup(void);
+struct pci_dev;
+int rbtx4938_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
+
+#endif /* __ASM_TXX9_RBTX4938_H */
/*
- * linux/include/asm-mips/tx4927/smsc_fdc37m81x.h
- *
* Interface for smsc fdc48m81x Super IO chip
*
* Author: MontaVista Software, Inc. source@mvista.com
/*
- * linux/include/asm-mips/tx4938/spi.h
* Definitions for TX4937/TX4938 SPI
*
* Copyright (C) 2000-2001 Toshiba Corporation
*
* Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
*/
-#ifndef __ASM_TX_BOARDS_TX4938_SPI_H
-#define __ASM_TX_BOARDS_TX4938_SPI_H
+#ifndef __ASM_TXX9_SPI_H
+#define __ASM_TXX9_SPI_H
extern int spi_eeprom_register(int chipid);
extern int spi_eeprom_read(int chipid, int address, unsigned char *buf, int len);
-#endif /* __ASM_TX_BOARDS_TX4938_SPI_H */
+#endif /* __ASM_TXX9_SPI_H */
*
* Copyright (C) 2000 Toshiba Corporation
*/
-#ifndef __ASM_TX3927_H
-#define __ASM_TX3927_H
+#ifndef __ASM_TXX9_TX3927_H
+#define __ASM_TXX9_TX3927_H
-#include <asm/jmr3927/txx927.h>
+#include <asm/txx9/txx927.h>
#define TX3927_SDRAMC_REG 0xfffe8000
#define TX3927_ROMC_REG 0xfffe9000
#define tx3927_sioptr(ch) ((struct txx927_sio_reg *)TX3927_SIO_REG(ch))
#define tx3927_pioptr ((struct txx9_pio_reg __iomem *)TX3927_PIO_REG)
-#endif /* __ASM_TX3927_H */
+struct pci_controller;
+void __init tx3927_pcic_setup(struct pci_controller *channel,
+ unsigned long sdram_size, int extarb);
+
+#endif /* __ASM_TXX9_TX3927_H */
--- /dev/null
+/*
+ * Author: MontaVista Software, Inc.
+ * source@mvista.com
+ *
+ * Copyright 2001-2006 MontaVista Software Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#ifndef __ASM_TXX9_TX4927_H
+#define __ASM_TXX9_TX4927_H
+
+#include <linux/types.h>
+#include <linux/io.h>
+#include <asm/txx9irq.h>
+#include <asm/txx9/tx4927pcic.h>
+
+#define TX4927_SDRAMC_REG 0xff1f8000
+#define TX4927_EBUSC_REG 0xff1f9000
+#define TX4927_PCIC_REG 0xff1fd000
+#define TX4927_CCFG_REG 0xff1fe000
+#define TX4927_IRC_REG 0xff1ff600
+#define TX4927_NR_TMR 3
+#define TX4927_TMR_REG(ch) (0xff1ff000 + (ch) * 0x100)
+
+#define TX4927_IR_INT(n) (2 + (n))
+#define TX4927_IR_SIO(n) (8 + (n))
+#define TX4927_IR_PCIC 16
+#define TX4927_IR_PCIERR 22
+#define TX4927_NUM_IR 32
+
+#define TX4927_IRC_INT 2 /* IP[2] in Status register */
+
+struct tx4927_sdramc_reg {
+ volatile unsigned long long cr[4];
+ volatile unsigned long long unused0[4];
+ volatile unsigned long long tr;
+ volatile unsigned long long unused1[2];
+ volatile unsigned long long cmd;
+};
+
+struct tx4927_ebusc_reg {
+ volatile unsigned long long cr[8];
+};
+
+struct tx4927_ccfg_reg {
+ u64 ccfg;
+ u64 crir;
+ u64 pcfg;
+ u64 toea;
+ u64 clkctr;
+ u64 unused0;
+ u64 garbc;
+ u64 unused1;
+ u64 unused2;
+ u64 ramp;
+};
+
+/*
+ * CCFG
+ */
+/* CCFG : Chip Configuration */
+#define TX4927_CCFG_WDRST 0x0000020000000000ULL
+#define TX4927_CCFG_WDREXEN 0x0000010000000000ULL
+#define TX4927_CCFG_BCFG_MASK 0x000000ff00000000ULL
+#define TX4927_CCFG_TINTDIS 0x01000000
+#define TX4927_CCFG_PCI66 0x00800000
+#define TX4927_CCFG_PCIMODE 0x00400000
+#define TX4927_CCFG_DIVMODE_MASK 0x000e0000
+#define TX4927_CCFG_DIVMODE_8 (0x0 << 17)
+#define TX4927_CCFG_DIVMODE_12 (0x1 << 17)
+#define TX4927_CCFG_DIVMODE_16 (0x2 << 17)
+#define TX4927_CCFG_DIVMODE_10 (0x3 << 17)
+#define TX4927_CCFG_DIVMODE_2 (0x4 << 17)
+#define TX4927_CCFG_DIVMODE_3 (0x5 << 17)
+#define TX4927_CCFG_DIVMODE_4 (0x6 << 17)
+#define TX4927_CCFG_DIVMODE_2_5 (0x7 << 17)
+#define TX4927_CCFG_BEOW 0x00010000
+#define TX4927_CCFG_WR 0x00008000
+#define TX4927_CCFG_TOE 0x00004000
+#define TX4927_CCFG_PCIARB 0x00002000
+#define TX4927_CCFG_PCIDIVMODE_MASK 0x00001800
+#define TX4927_CCFG_PCIDIVMODE_2_5 0x00000000
+#define TX4927_CCFG_PCIDIVMODE_3 0x00000800
+#define TX4927_CCFG_PCIDIVMODE_5 0x00001000
+#define TX4927_CCFG_PCIDIVMODE_6 0x00001800
+#define TX4927_CCFG_SYSSP_MASK 0x000000c0
+#define TX4927_CCFG_ENDIAN 0x00000004
+#define TX4927_CCFG_HALT 0x00000002
+#define TX4927_CCFG_ACEHOLD 0x00000001
+#define TX4927_CCFG_W1CBITS (TX4927_CCFG_WDRST | TX4927_CCFG_BEOW)
+
+/* PCFG : Pin Configuration */
+#define TX4927_PCFG_SDCLKDLY_MASK 0x30000000
+#define TX4927_PCFG_SDCLKDLY(d) ((d)<<28)
+#define TX4927_PCFG_SYSCLKEN 0x08000000
+#define TX4927_PCFG_SDCLKEN_ALL 0x07800000
+#define TX4927_PCFG_SDCLKEN(ch) (0x00800000<<(ch))
+#define TX4927_PCFG_PCICLKEN_ALL 0x003f0000
+#define TX4927_PCFG_PCICLKEN(ch) (0x00010000<<(ch))
+#define TX4927_PCFG_SEL2 0x00000200
+#define TX4927_PCFG_SEL1 0x00000100
+#define TX4927_PCFG_DMASEL_ALL 0x000000ff
+#define TX4927_PCFG_DMASEL0_MASK 0x00000003
+#define TX4927_PCFG_DMASEL1_MASK 0x0000000c
+#define TX4927_PCFG_DMASEL2_MASK 0x00000030
+#define TX4927_PCFG_DMASEL3_MASK 0x000000c0
+#define TX4927_PCFG_DMASEL0_DRQ0 0x00000000
+#define TX4927_PCFG_DMASEL0_SIO1 0x00000001
+#define TX4927_PCFG_DMASEL0_ACL0 0x00000002
+#define TX4927_PCFG_DMASEL0_ACL2 0x00000003
+#define TX4927_PCFG_DMASEL1_DRQ1 0x00000000
+#define TX4927_PCFG_DMASEL1_SIO1 0x00000004
+#define TX4927_PCFG_DMASEL1_ACL1 0x00000008
+#define TX4927_PCFG_DMASEL1_ACL3 0x0000000c
+#define TX4927_PCFG_DMASEL2_DRQ2 0x00000000 /* SEL2=0 */
+#define TX4927_PCFG_DMASEL2_SIO0 0x00000010 /* SEL2=0 */
+#define TX4927_PCFG_DMASEL2_ACL1 0x00000000 /* SEL2=1 */
+#define TX4927_PCFG_DMASEL2_ACL2 0x00000020 /* SEL2=1 */
+#define TX4927_PCFG_DMASEL2_ACL0 0x00000030 /* SEL2=1 */
+#define TX4927_PCFG_DMASEL3_DRQ3 0x00000000
+#define TX4927_PCFG_DMASEL3_SIO0 0x00000040
+#define TX4927_PCFG_DMASEL3_ACL3 0x00000080
+#define TX4927_PCFG_DMASEL3_ACL1 0x000000c0
+
+/* CLKCTR : Clock Control */
+#define TX4927_CLKCTR_ACLCKD 0x02000000
+#define TX4927_CLKCTR_PIOCKD 0x01000000
+#define TX4927_CLKCTR_DMACKD 0x00800000
+#define TX4927_CLKCTR_PCICKD 0x00400000
+#define TX4927_CLKCTR_TM0CKD 0x00100000
+#define TX4927_CLKCTR_TM1CKD 0x00080000
+#define TX4927_CLKCTR_TM2CKD 0x00040000
+#define TX4927_CLKCTR_SIO0CKD 0x00020000
+#define TX4927_CLKCTR_SIO1CKD 0x00010000
+#define TX4927_CLKCTR_ACLRST 0x00000200
+#define TX4927_CLKCTR_PIORST 0x00000100
+#define TX4927_CLKCTR_DMARST 0x00000080
+#define TX4927_CLKCTR_PCIRST 0x00000040
+#define TX4927_CLKCTR_TM0RST 0x00000010
+#define TX4927_CLKCTR_TM1RST 0x00000008
+#define TX4927_CLKCTR_TM2RST 0x00000004
+#define TX4927_CLKCTR_SIO0RST 0x00000002
+#define TX4927_CLKCTR_SIO1RST 0x00000001
+
+#define tx4927_sdramcptr ((struct tx4927_sdramc_reg *)TX4927_SDRAMC_REG)
+#define tx4927_pcicptr \
+ ((struct tx4927_pcic_reg __iomem *)TX4927_PCIC_REG)
+#define tx4927_ccfgptr \
+ ((struct tx4927_ccfg_reg __iomem *)TX4927_CCFG_REG)
+#define tx4927_ebuscptr ((struct tx4927_ebusc_reg *)TX4927_EBUSC_REG)
+
+/* utilities */
+static inline void txx9_clear64(__u64 __iomem *adr, __u64 bits)
+{
+#ifdef CONFIG_32BIT
+ unsigned long flags;
+ local_irq_save(flags);
+#endif
+ ____raw_writeq(____raw_readq(adr) & ~bits, adr);
+#ifdef CONFIG_32BIT
+ local_irq_restore(flags);
+#endif
+}
+static inline void txx9_set64(__u64 __iomem *adr, __u64 bits)
+{
+#ifdef CONFIG_32BIT
+ unsigned long flags;
+ local_irq_save(flags);
+#endif
+ ____raw_writeq(____raw_readq(adr) | bits, adr);
+#ifdef CONFIG_32BIT
+ local_irq_restore(flags);
+#endif
+}
+
+/* These functions are not interrupt safe. */
+static inline void tx4927_ccfg_clear(__u64 bits)
+{
+ ____raw_writeq(____raw_readq(&tx4927_ccfgptr->ccfg)
+ & ~(TX4927_CCFG_W1CBITS | bits),
+ &tx4927_ccfgptr->ccfg);
+}
+static inline void tx4927_ccfg_set(__u64 bits)
+{
+ ____raw_writeq((____raw_readq(&tx4927_ccfgptr->ccfg)
+ & ~TX4927_CCFG_W1CBITS) | bits,
+ &tx4927_ccfgptr->ccfg);
+}
+static inline void tx4927_ccfg_change(__u64 change, __u64 new)
+{
+ ____raw_writeq((____raw_readq(&tx4927_ccfgptr->ccfg)
+ & ~(TX4927_CCFG_W1CBITS | change)) |
+ new,
+ &tx4927_ccfgptr->ccfg);
+}
+
+int tx4927_report_pciclk(void);
+int tx4927_pciclk66_setup(void);
+void tx4927_irq_init(void);
+
+#endif /* __ASM_TXX9_TX4927_H */
--- /dev/null
+/*
+ * include/asm-mips/txx9/tx4927pcic.h
+ * TX4927 PCI controller definitions.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#ifndef __ASM_TXX9_TX4927PCIC_H
+#define __ASM_TXX9_TX4927PCIC_H
+
+#include <linux/pci.h>
+
+struct tx4927_pcic_reg {
+ u32 pciid;
+ u32 pcistatus;
+ u32 pciccrev;
+ u32 pcicfg1;
+ u32 p2gm0plbase; /* +10 */
+ u32 p2gm0pubase;
+ u32 p2gm1plbase;
+ u32 p2gm1pubase;
+ u32 p2gm2pbase; /* +20 */
+ u32 p2giopbase;
+ u32 unused0;
+ u32 pcisid;
+ u32 unused1; /* +30 */
+ u32 pcicapptr;
+ u32 unused2;
+ u32 pcicfg2;
+ u32 g2ptocnt; /* +40 */
+ u32 unused3[15];
+ u32 g2pstatus; /* +80 */
+ u32 g2pmask;
+ u32 pcisstatus;
+ u32 pcimask;
+ u32 p2gcfg; /* +90 */
+ u32 p2gstatus;
+ u32 p2gmask;
+ u32 p2gccmd;
+ u32 unused4[24]; /* +a0 */
+ u32 pbareqport; /* +100 */
+ u32 pbacfg;
+ u32 pbastatus;
+ u32 pbamask;
+ u32 pbabm; /* +110 */
+ u32 pbacreq;
+ u32 pbacgnt;
+ u32 pbacstate;
+ u64 g2pmgbase[3]; /* +120 */
+ u64 g2piogbase;
+ u32 g2pmmask[3]; /* +140 */
+ u32 g2piomask;
+ u64 g2pmpbase[3]; /* +150 */
+ u64 g2piopbase;
+ u32 pciccfg; /* +170 */
+ u32 pcicstatus;
+ u32 pcicmask;
+ u32 unused5;
+ u64 p2gmgbase[3]; /* +180 */
+ u64 p2giogbase;
+ u32 g2pcfgadrs; /* +1a0 */
+ u32 g2pcfgdata;
+ u32 unused6[8];
+ u32 g2pintack;
+ u32 g2pspc;
+ u32 unused7[12]; /* +1d0 */
+ u64 pdmca; /* +200 */
+ u64 pdmga;
+ u64 pdmpa;
+ u64 pdmctr;
+ u64 pdmcfg; /* +220 */
+ u64 pdmsts;
+};
+
+/* bits for PCICMD */
+/* see PCI_COMMAND_XXX in linux/pci_regs.h */
+
+/* bits for PCISTAT */
+/* see PCI_STATUS_XXX in linux/pci_regs.h */
+
+/* bits for IOBA/MBA */
+/* see PCI_BASE_ADDRESS_XXX in linux/pci_regs.h */
+
+/* bits for G2PSTATUS/G2PMASK */
+#define TX4927_PCIC_G2PSTATUS_ALL 0x00000003
+#define TX4927_PCIC_G2PSTATUS_TTOE 0x00000002
+#define TX4927_PCIC_G2PSTATUS_RTOE 0x00000001
+
+/* bits for PCIMASK (see also PCI_STATUS_XXX in linux/pci_regs.h */
+#define TX4927_PCIC_PCISTATUS_ALL 0x0000f900
+
+/* bits for PBACFG */
+#define TX4927_PCIC_PBACFG_FIXPA 0x00000008
+#define TX4927_PCIC_PBACFG_RPBA 0x00000004
+#define TX4927_PCIC_PBACFG_PBAEN 0x00000002
+#define TX4927_PCIC_PBACFG_BMCEN 0x00000001
+
+/* bits for PBASTATUS/PBAMASK */
+#define TX4927_PCIC_PBASTATUS_ALL 0x00000001
+#define TX4927_PCIC_PBASTATUS_BM 0x00000001
+
+/* bits for G2PMnGBASE */
+#define TX4927_PCIC_G2PMnGBASE_BSDIS 0x0000002000000000ULL
+#define TX4927_PCIC_G2PMnGBASE_ECHG 0x0000001000000000ULL
+
+/* bits for G2PIOGBASE */
+#define TX4927_PCIC_G2PIOGBASE_BSDIS 0x0000002000000000ULL
+#define TX4927_PCIC_G2PIOGBASE_ECHG 0x0000001000000000ULL
+
+/* bits for PCICSTATUS/PCICMASK */
+#define TX4927_PCIC_PCICSTATUS_ALL 0x000007b8
+#define TX4927_PCIC_PCICSTATUS_PME 0x00000400
+#define TX4927_PCIC_PCICSTATUS_TLB 0x00000200
+#define TX4927_PCIC_PCICSTATUS_NIB 0x00000100
+#define TX4927_PCIC_PCICSTATUS_ZIB 0x00000080
+#define TX4927_PCIC_PCICSTATUS_PERR 0x00000020
+#define TX4927_PCIC_PCICSTATUS_SERR 0x00000010
+#define TX4927_PCIC_PCICSTATUS_GBE 0x00000008
+#define TX4927_PCIC_PCICSTATUS_IWB 0x00000002
+#define TX4927_PCIC_PCICSTATUS_E2PDONE 0x00000001
+
+/* bits for PCICCFG */
+#define TX4927_PCIC_PCICCFG_GBWC_MASK 0x0fff0000
+#define TX4927_PCIC_PCICCFG_HRST 0x00000800
+#define TX4927_PCIC_PCICCFG_SRST 0x00000400
+#define TX4927_PCIC_PCICCFG_IRBER 0x00000200
+#define TX4927_PCIC_PCICCFG_G2PMEN(ch) (0x00000100>>(ch))
+#define TX4927_PCIC_PCICCFG_G2PM0EN 0x00000100
+#define TX4927_PCIC_PCICCFG_G2PM1EN 0x00000080
+#define TX4927_PCIC_PCICCFG_G2PM2EN 0x00000040
+#define TX4927_PCIC_PCICCFG_G2PIOEN 0x00000020
+#define TX4927_PCIC_PCICCFG_TCAR 0x00000010
+#define TX4927_PCIC_PCICCFG_ICAEN 0x00000008
+
+/* bits for P2GMnGBASE */
+#define TX4927_PCIC_P2GMnGBASE_TMEMEN 0x0000004000000000ULL
+#define TX4927_PCIC_P2GMnGBASE_TBSDIS 0x0000002000000000ULL
+#define TX4927_PCIC_P2GMnGBASE_TECHG 0x0000001000000000ULL
+
+/* bits for P2GIOGBASE */
+#define TX4927_PCIC_P2GIOGBASE_TIOEN 0x0000004000000000ULL
+#define TX4927_PCIC_P2GIOGBASE_TBSDIS 0x0000002000000000ULL
+#define TX4927_PCIC_P2GIOGBASE_TECHG 0x0000001000000000ULL
+
+#define TX4927_PCIC_IDSEL_AD_TO_SLOT(ad) ((ad) - 11)
+#define TX4927_PCIC_MAX_DEVNU TX4927_PCIC_IDSEL_AD_TO_SLOT(32)
+
+/* bits for PDMCFG */
+#define TX4927_PCIC_PDMCFG_RSTFIFO 0x00200000
+#define TX4927_PCIC_PDMCFG_EXFER 0x00100000
+#define TX4927_PCIC_PDMCFG_REQDLY_MASK 0x00003800
+#define TX4927_PCIC_PDMCFG_REQDLY_NONE (0 << 11)
+#define TX4927_PCIC_PDMCFG_REQDLY_16 (1 << 11)
+#define TX4927_PCIC_PDMCFG_REQDLY_32 (2 << 11)
+#define TX4927_PCIC_PDMCFG_REQDLY_64 (3 << 11)
+#define TX4927_PCIC_PDMCFG_REQDLY_128 (4 << 11)
+#define TX4927_PCIC_PDMCFG_REQDLY_256 (5 << 11)
+#define TX4927_PCIC_PDMCFG_REQDLY_512 (6 << 11)
+#define TX4927_PCIC_PDMCFG_REQDLY_1024 (7 << 11)
+#define TX4927_PCIC_PDMCFG_ERRIE 0x00000400
+#define TX4927_PCIC_PDMCFG_NCCMPIE 0x00000200
+#define TX4927_PCIC_PDMCFG_NTCMPIE 0x00000100
+#define TX4927_PCIC_PDMCFG_CHNEN 0x00000080
+#define TX4927_PCIC_PDMCFG_XFRACT 0x00000040
+#define TX4927_PCIC_PDMCFG_BSWAP 0x00000020
+#define TX4927_PCIC_PDMCFG_XFRSIZE_MASK 0x0000000c
+#define TX4927_PCIC_PDMCFG_XFRSIZE_1DW 0x00000000
+#define TX4927_PCIC_PDMCFG_XFRSIZE_1QW 0x00000004
+#define TX4927_PCIC_PDMCFG_XFRSIZE_4QW 0x00000008
+#define TX4927_PCIC_PDMCFG_XFRDIRC 0x00000002
+#define TX4927_PCIC_PDMCFG_CHRST 0x00000001
+
+/* bits for PDMSTS */
+#define TX4927_PCIC_PDMSTS_REQCNT_MASK 0x3f000000
+#define TX4927_PCIC_PDMSTS_FIFOCNT_MASK 0x00f00000
+#define TX4927_PCIC_PDMSTS_FIFOWP_MASK 0x000c0000
+#define TX4927_PCIC_PDMSTS_FIFORP_MASK 0x00030000
+#define TX4927_PCIC_PDMSTS_ERRINT 0x00000800
+#define TX4927_PCIC_PDMSTS_DONEINT 0x00000400
+#define TX4927_PCIC_PDMSTS_CHNEN 0x00000200
+#define TX4927_PCIC_PDMSTS_XFRACT 0x00000100
+#define TX4927_PCIC_PDMSTS_ACCMP 0x00000080
+#define TX4927_PCIC_PDMSTS_NCCMP 0x00000040
+#define TX4927_PCIC_PDMSTS_NTCMP 0x00000020
+#define TX4927_PCIC_PDMSTS_CFGERR 0x00000008
+#define TX4927_PCIC_PDMSTS_PCIERR 0x00000004
+#define TX4927_PCIC_PDMSTS_CHNERR 0x00000002
+#define TX4927_PCIC_PDMSTS_DATAERR 0x00000001
+#define TX4927_PCIC_PDMSTS_ALL_CMP 0x000000e0
+#define TX4927_PCIC_PDMSTS_ALL_ERR 0x0000000f
+
+struct tx4927_pcic_reg __iomem *get_tx4927_pcicptr(
+ struct pci_controller *channel);
+void __init tx4927_pcic_setup(struct tx4927_pcic_reg __iomem *pcicptr,
+ struct pci_controller *channel, int extarb);
+void tx4927_report_pcic_status(void);
+
+#endif /* __ASM_TXX9_TX4927PCIC_H */
/*
- * linux/include/asm-mips/tx4938/tx4938.h
* Definitions for TX4937/TX4938
* Copyright (C) 2000-2001 Toshiba Corporation
*
*
* Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
*/
-#ifndef __ASM_TX_BOARDS_TX4938_H
-#define __ASM_TX_BOARDS_TX4938_H
+#ifndef __ASM_TXX9_TX4938_H
+#define __ASM_TXX9_TX4938_H
+
+/* some controllers are compatible with 4927 */
+#include <asm/txx9/tx4927.h>
#define tx4938_read_nfmc(addr) (*(volatile unsigned int *)(addr))
#define tx4938_write_nfmc(b, addr) (*(volatile unsigned int *)(addr)) = (b)
-#define TX4938_NR_IRQ_LOCAL TX4938_IRQ_PIC_BEG
-
-#define TX4938_IRQ_IRC_PCIC (TX4938_NR_IRQ_LOCAL + TX4938_IR_PCIC)
-#define TX4938_IRQ_IRC_PCIERR (TX4938_NR_IRQ_LOCAL + TX4938_IR_PCIERR)
-
#define TX4938_PCIIO_0 0x10000000
#define TX4938_PCIIO_1 0x01010000
#define TX4938_PCIMEM_0 0x08000000
#define TX4938_ACLC_REG (TX4938_REG_BASE + 0xf700)
#define TX4938_SPI_REG (TX4938_REG_BASE + 0xf800)
-#ifdef __ASSEMBLY__
-#define _CONST64(c) c
-#else
#define _CONST64(c) c##ull
#include <asm/byteorder.h>
endian_def_l2(unused0, mcr);
};
-struct tx4938_pcic_reg {
- volatile unsigned long pciid;
- volatile unsigned long pcistatus;
- volatile unsigned long pciccrev;
- volatile unsigned long pcicfg1;
- volatile unsigned long p2gm0plbase; /* +10 */
- volatile unsigned long p2gm0pubase;
- volatile unsigned long p2gm1plbase;
- volatile unsigned long p2gm1pubase;
- volatile unsigned long p2gm2pbase; /* +20 */
- volatile unsigned long p2giopbase;
- volatile unsigned long unused0;
- volatile unsigned long pcisid;
- volatile unsigned long unused1; /* +30 */
- volatile unsigned long pcicapptr;
- volatile unsigned long unused2;
- volatile unsigned long pcicfg2;
- volatile unsigned long g2ptocnt; /* +40 */
- volatile unsigned long unused3[15];
- volatile unsigned long g2pstatus; /* +80 */
- volatile unsigned long g2pmask;
- volatile unsigned long pcisstatus;
- volatile unsigned long pcimask;
- volatile unsigned long p2gcfg; /* +90 */
- volatile unsigned long p2gstatus;
- volatile unsigned long p2gmask;
- volatile unsigned long p2gccmd;
- volatile unsigned long unused4[24]; /* +a0 */
- volatile unsigned long pbareqport; /* +100 */
- volatile unsigned long pbacfg;
- volatile unsigned long pbastatus;
- volatile unsigned long pbamask;
- volatile unsigned long pbabm; /* +110 */
- volatile unsigned long pbacreq;
- volatile unsigned long pbacgnt;
- volatile unsigned long pbacstate;
- volatile unsigned long long g2pmgbase[3]; /* +120 */
- volatile unsigned long long g2piogbase;
- volatile unsigned long g2pmmask[3]; /* +140 */
- volatile unsigned long g2piomask;
- volatile unsigned long long g2pmpbase[3]; /* +150 */
- volatile unsigned long long g2piopbase;
- volatile unsigned long pciccfg; /* +170 */
- volatile unsigned long pcicstatus;
- volatile unsigned long pcicmask;
- volatile unsigned long unused5;
- volatile unsigned long long p2gmgbase[3]; /* +180 */
- volatile unsigned long long p2giogbase;
- volatile unsigned long g2pcfgadrs; /* +1a0 */
- volatile unsigned long g2pcfgdata;
- volatile unsigned long unused6[8];
- volatile unsigned long g2pintack;
- volatile unsigned long g2pspc;
- volatile unsigned long unused7[12]; /* +1d0 */
- volatile unsigned long long pdmca; /* +200 */
- volatile unsigned long long pdmga;
- volatile unsigned long long pdmpa;
- volatile unsigned long long pdmctr;
- volatile unsigned long long pdmcfg; /* +220 */
- volatile unsigned long long pdmsts;
-};
-
struct tx4938_aclc_reg {
volatile unsigned long acctlen;
volatile unsigned long acctldis;
};
struct tx4938_ccfg_reg {
- volatile unsigned long long ccfg;
- volatile unsigned long long crir;
- volatile unsigned long long pcfg;
- volatile unsigned long long tear;
- volatile unsigned long long clkctr;
- volatile unsigned long long unused0;
- volatile unsigned long long garbc;
- volatile unsigned long long unused1;
- volatile unsigned long long unused2;
- volatile unsigned long long ramp;
- volatile unsigned long long unused3;
- volatile unsigned long long jmpadr;
+ u64 ccfg;
+ u64 crir;
+ u64 pcfg;
+ u64 toea;
+ u64 clkctr;
+ u64 unused0;
+ u64 garbc;
+ u64 unused1;
+ u64 unused2;
+ u64 ramp;
+ u64 unused3;
+ u64 jmpadr;
};
#undef endian_def_l2
#undef endian_def_b2s
#undef endian_def_b4
-#endif /* __ASSEMBLY__ */
-
/*
* NDFMC
*/
#define TX4938_IR_ETH0 TX4938_IR_INT(4)
#define TX4938_IR_ETH1 TX4938_IR_INT(3)
+#define TX4938_IRC_INT 2 /* IP[2] in Status register */
+
/*
* CCFG
*/
#define TX4938_CCFG_BEOW 0x00010000
#define TX4938_CCFG_WR 0x00008000
#define TX4938_CCFG_TOE 0x00004000
-#define TX4938_CCFG_PCIXARB 0x00002000
+#define TX4938_CCFG_PCIARB 0x00002000
#define TX4938_CCFG_PCIDIVMODE_MASK 0x00001c00
#define TX4938_CCFG_PCIDIVMODE_4 (0x1 << 10)
#define TX4938_CCFG_PCIDIVMODE_4_5 (0x3 << 10)
#define TX4938_CLKCTR_SIO0RST 0x00000002
#define TX4938_CLKCTR_SIO1RST 0x00000001
-/* bits for G2PSTATUS/G2PMASK */
-#define TX4938_PCIC_G2PSTATUS_ALL 0x00000003
-#define TX4938_PCIC_G2PSTATUS_TTOE 0x00000002
-#define TX4938_PCIC_G2PSTATUS_RTOE 0x00000001
-
-/* bits for PCIMASK (see also PCI_STATUS_XXX in linux/pci.h */
-#define TX4938_PCIC_PCISTATUS_ALL 0x0000f900
-
-/* bits for PBACFG */
-#define TX4938_PCIC_PBACFG_FIXPA 0x00000008
-#define TX4938_PCIC_PBACFG_RPBA 0x00000004
-#define TX4938_PCIC_PBACFG_PBAEN 0x00000002
-#define TX4938_PCIC_PBACFG_BMCEN 0x00000001
-
-/* bits for G2PMnGBASE */
-#define TX4938_PCIC_G2PMnGBASE_BSDIS _CONST64(0x0000002000000000)
-#define TX4938_PCIC_G2PMnGBASE_ECHG _CONST64(0x0000001000000000)
-
-/* bits for G2PIOGBASE */
-#define TX4938_PCIC_G2PIOGBASE_BSDIS _CONST64(0x0000002000000000)
-#define TX4938_PCIC_G2PIOGBASE_ECHG _CONST64(0x0000001000000000)
-
-/* bits for PCICSTATUS/PCICMASK */
-#define TX4938_PCIC_PCICSTATUS_ALL 0x000007b8
-#define TX4938_PCIC_PCICSTATUS_PME 0x00000400
-#define TX4938_PCIC_PCICSTATUS_TLB 0x00000200
-#define TX4938_PCIC_PCICSTATUS_NIB 0x00000100
-#define TX4938_PCIC_PCICSTATUS_ZIB 0x00000080
-#define TX4938_PCIC_PCICSTATUS_PERR 0x00000020
-#define TX4938_PCIC_PCICSTATUS_SERR 0x00000010
-#define TX4938_PCIC_PCICSTATUS_GBE 0x00000008
-#define TX4938_PCIC_PCICSTATUS_IWB 0x00000002
-#define TX4938_PCIC_PCICSTATUS_E2PDONE 0x00000001
-
-/* bits for PCICCFG */
-#define TX4938_PCIC_PCICCFG_GBWC_MASK 0x0fff0000
-#define TX4938_PCIC_PCICCFG_HRST 0x00000800
-#define TX4938_PCIC_PCICCFG_SRST 0x00000400
-#define TX4938_PCIC_PCICCFG_IRBER 0x00000200
-#define TX4938_PCIC_PCICCFG_G2PMEN(ch) (0x00000100>>(ch))
-#define TX4938_PCIC_PCICCFG_G2PM0EN 0x00000100
-#define TX4938_PCIC_PCICCFG_G2PM1EN 0x00000080
-#define TX4938_PCIC_PCICCFG_G2PM2EN 0x00000040
-#define TX4938_PCIC_PCICCFG_G2PIOEN 0x00000020
-#define TX4938_PCIC_PCICCFG_TCAR 0x00000010
-#define TX4938_PCIC_PCICCFG_ICAEN 0x00000008
-
-/* bits for P2GMnGBASE */
-#define TX4938_PCIC_P2GMnGBASE_TMEMEN _CONST64(0x0000004000000000)
-#define TX4938_PCIC_P2GMnGBASE_TBSDIS _CONST64(0x0000002000000000)
-#define TX4938_PCIC_P2GMnGBASE_TECHG _CONST64(0x0000001000000000)
-
-/* bits for P2GIOGBASE */
-#define TX4938_PCIC_P2GIOGBASE_TIOEN _CONST64(0x0000004000000000)
-#define TX4938_PCIC_P2GIOGBASE_TBSDIS _CONST64(0x0000002000000000)
-#define TX4938_PCIC_P2GIOGBASE_TECHG _CONST64(0x0000001000000000)
-
-#define TX4938_PCIC_IDSEL_AD_TO_SLOT(ad) ((ad) - 11)
-#define TX4938_PCIC_MAX_DEVNU TX4938_PCIC_IDSEL_AD_TO_SLOT(32)
-
-/* bits for PDMCFG */
-#define TX4938_PCIC_PDMCFG_RSTFIFO 0x00200000
-#define TX4938_PCIC_PDMCFG_EXFER 0x00100000
-#define TX4938_PCIC_PDMCFG_REQDLY_MASK 0x00003800
-#define TX4938_PCIC_PDMCFG_REQDLY_NONE (0 << 11)
-#define TX4938_PCIC_PDMCFG_REQDLY_16 (1 << 11)
-#define TX4938_PCIC_PDMCFG_REQDLY_32 (2 << 11)
-#define TX4938_PCIC_PDMCFG_REQDLY_64 (3 << 11)
-#define TX4938_PCIC_PDMCFG_REQDLY_128 (4 << 11)
-#define TX4938_PCIC_PDMCFG_REQDLY_256 (5 << 11)
-#define TX4938_PCIC_PDMCFG_REQDLY_512 (6 << 11)
-#define TX4938_PCIC_PDMCFG_REQDLY_1024 (7 << 11)
-#define TX4938_PCIC_PDMCFG_ERRIE 0x00000400
-#define TX4938_PCIC_PDMCFG_NCCMPIE 0x00000200
-#define TX4938_PCIC_PDMCFG_NTCMPIE 0x00000100
-#define TX4938_PCIC_PDMCFG_CHNEN 0x00000080
-#define TX4938_PCIC_PDMCFG_XFRACT 0x00000040
-#define TX4938_PCIC_PDMCFG_BSWAP 0x00000020
-#define TX4938_PCIC_PDMCFG_XFRSIZE_MASK 0x0000000c
-#define TX4938_PCIC_PDMCFG_XFRSIZE_1DW 0x00000000
-#define TX4938_PCIC_PDMCFG_XFRSIZE_1QW 0x00000004
-#define TX4938_PCIC_PDMCFG_XFRSIZE_4QW 0x00000008
-#define TX4938_PCIC_PDMCFG_XFRDIRC 0x00000002
-#define TX4938_PCIC_PDMCFG_CHRST 0x00000001
-
-/* bits for PDMSTS */
-#define TX4938_PCIC_PDMSTS_REQCNT_MASK 0x3f000000
-#define TX4938_PCIC_PDMSTS_FIFOCNT_MASK 0x00f00000
-#define TX4938_PCIC_PDMSTS_FIFOWP_MASK 0x000c0000
-#define TX4938_PCIC_PDMSTS_FIFORP_MASK 0x00030000
-#define TX4938_PCIC_PDMSTS_ERRINT 0x00000800
-#define TX4938_PCIC_PDMSTS_DONEINT 0x00000400
-#define TX4938_PCIC_PDMSTS_CHNEN 0x00000200
-#define TX4938_PCIC_PDMSTS_XFRACT 0x00000100
-#define TX4938_PCIC_PDMSTS_ACCMP 0x00000080
-#define TX4938_PCIC_PDMSTS_NCCMP 0x00000040
-#define TX4938_PCIC_PDMSTS_NTCMP 0x00000020
-#define TX4938_PCIC_PDMSTS_CFGERR 0x00000008
-#define TX4938_PCIC_PDMSTS_PCIERR 0x00000004
-#define TX4938_PCIC_PDMSTS_CHNERR 0x00000002
-#define TX4938_PCIC_PDMSTS_DATAERR 0x00000001
-#define TX4938_PCIC_PDMSTS_ALL_CMP 0x000000e0
-#define TX4938_PCIC_PDMSTS_ALL_ERR 0x0000000f
-
/*
* DMA
*/
#define TX4938_DMA_CSR_DESERR 0x00000002
#define TX4938_DMA_CSR_SORERR 0x00000001
-#ifndef __ASSEMBLY__
-
#define tx4938_sdramcptr ((struct tx4938_sdramc_reg *)TX4938_SDRAMC_REG)
#define tx4938_ebuscptr ((struct tx4938_ebusc_reg *)TX4938_EBUSC_REG)
#define tx4938_dmaptr(ch) ((struct tx4938_dma_reg *)TX4938_DMA_REG(ch))
#define tx4938_ndfmcptr ((struct tx4938_ndfmc_reg *)TX4938_NDFMC_REG)
-#define tx4938_pcicptr ((struct tx4938_pcic_reg *)TX4938_PCIC_REG)
-#define tx4938_pcic1ptr ((struct tx4938_pcic_reg *)TX4938_PCIC1_REG)
-#define tx4938_ccfgptr ((struct tx4938_ccfg_reg *)TX4938_CCFG_REG)
+#define tx4938_pcicptr tx4927_pcicptr
+#define tx4938_pcic1ptr \
+ ((struct tx4927_pcic_reg __iomem *)TX4938_PCIC1_REG)
+#define tx4938_ccfgptr \
+ ((struct tx4938_ccfg_reg __iomem *)TX4938_CCFG_REG)
#define tx4938_sioptr(ch) ((struct tx4938_sio_reg *)TX4938_SIO_REG(ch))
#define tx4938_pioptr ((struct txx9_pio_reg __iomem *)TX4938_PIO_REG)
#define tx4938_aclcptr ((struct tx4938_aclc_reg *)TX4938_ACLC_REG)
#define tx4938_sramcptr ((struct tx4938_sramc_reg *)TX4938_SRAMC_REG)
-#define TX4938_REV_MAJ_MIN() ((unsigned long)tx4938_ccfgptr->crir & 0x00ff)
-#define TX4938_REV_PCODE() ((unsigned long)tx4938_ccfgptr->crir >> 16)
+#define TX4938_REV_PCODE() \
+ ((__u32)__raw_readq(&tx4938_ccfgptr->crir) >> 16)
+
+#define tx4938_ccfg_clear(bits) tx4927_ccfg_clear(bits)
+#define tx4938_ccfg_set(bits) tx4927_ccfg_set(bits)
+#define tx4938_ccfg_change(change, new) tx4927_ccfg_change(change, new)
#define TX4938_SDRAMC_BA(ch) ((tx4938_sdramcptr->cr[ch] >> 49) << 21)
#define TX4938_SDRAMC_SIZE(ch) (((tx4938_sdramcptr->cr[ch] >> 33) + 1) << 21)
+#define TX4938_EBUSC_CR(ch) __raw_readq(&tx4938_ebuscptr->cr[(ch)])
#define TX4938_EBUSC_BA(ch) ((tx4938_ebuscptr->cr[ch] >> 48) << 20)
#define TX4938_EBUSC_SIZE(ch) \
(0x00100000 << ((unsigned long)(tx4938_ebuscptr->cr[ch] >> 8) & 0xf))
-
-#endif /* !__ASSEMBLY__ */
+int tx4938_report_pciclk(void);
+void tx4938_report_pci1clk(void);
+int tx4938_pciclk66_setup(void);
+struct pci_dev;
+int tx4938_pcic1_map_irq(const struct pci_dev *dev, u8 slot);
+void tx4938_irq_init(void);
#endif
*
* Copyright (C) 2000 Toshiba Corporation
*/
-#ifndef __ASM_TXX927_H
-#define __ASM_TXX927_H
+#ifndef __ASM_TXX9_TXX927_H
+#define __ASM_TXX9_TXX927_H
struct txx927_sio_reg {
volatile unsigned long lcr;
* PIO
*/
-#endif /* __ASM_TXX927_H */
+#endif /* __ASM_TXX9_TXX927_H */
+++ /dev/null
-/*
- * include/asm-mips/vr41xx/cmbvr4133.h
- *
- * Include file for NEC CMB-VR4133.
- *
- * Author: Yoichi Yuasa <yyuasa@mvista.com, or source@mvista.com> and
- * Jun Sun <jsun@mvista.com, or source@mvista.com> and
- * Alex Sapkov <asapkov@ru.mvista.com>
- *
- * 2002-2004 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-#ifndef __NEC_CMBVR4133_H
-#define __NEC_CMBVR4133_H
-
-#include <asm/vr41xx/irq.h>
-
-/*
- * General-Purpose I/O Pin Number
- */
-#define CMBVR41XX_INTA_PIN 1
-#define CMBVR41XX_INTB_PIN 1
-#define CMBVR41XX_INTC_PIN 3
-#define CMBVR41XX_INTD_PIN 1
-#define CMBVR41XX_INTE_PIN 1
-
-/*
- * Interrupt Number
- */
-#define CMBVR41XX_INTA_IRQ GIU_IRQ(CMBVR41XX_INTA_PIN)
-#define CMBVR41XX_INTB_IRQ GIU_IRQ(CMBVR41XX_INTB_PIN)
-#define CMBVR41XX_INTC_IRQ GIU_IRQ(CMBVR41XX_INTC_PIN)
-#define CMBVR41XX_INTD_IRQ GIU_IRQ(CMBVR41XX_INTD_PIN)
-#define CMBVR41XX_INTE_IRQ GIU_IRQ(CMBVR41XX_INTE_PIN)
-
-#define I8259A_IRQ_BASE 72
-#define I8259_IRQ(x) (I8259A_IRQ_BASE + (x))
-#define TIMER_IRQ I8259_IRQ(0)
-#define KEYBOARD_IRQ I8259_IRQ(1)
-#define I8259_SLAVE_IRQ I8259_IRQ(2)
-#define UART3_IRQ I8259_IRQ(3)
-#define UART1_IRQ I8259_IRQ(4)
-#define UART2_IRQ I8259_IRQ(5)
-#define FDC_IRQ I8259_IRQ(6)
-#define PARPORT_IRQ I8259_IRQ(7)
-#define RTC_IRQ I8259_IRQ(8)
-#define USB_IRQ I8259_IRQ(9)
-#define I8259_INTA_IRQ I8259_IRQ(10)
-#define AUDIO_IRQ I8259_IRQ(11)
-#define AUX_IRQ I8259_IRQ(12)
-#define IDE_PRIMARY_IRQ I8259_IRQ(14)
-#define IDE_SECONDARY_IRQ I8259_IRQ(15)
-
-#endif /* __NEC_CMBVR4133_H */
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