]> err.no Git - linux-2.6/commitdiff
[Blackfin] arch: Give the DMA base registers a more descriptive name
authorBernd Schmidt <bernds_cb1@t-online.de>
Wed, 23 Apr 2008 21:31:18 +0000 (05:31 +0800)
committerBryan Wu <cooloney@kernel.org>
Wed, 23 Apr 2008 21:31:18 +0000 (05:31 +0800)
The DMA base registers are available in a global named "base_addr" for
every Blackfin variant. Give this a more descriptive name, and remove
duplicate tables from some drivers.

Signed-off-by: Bernd Schmidt <bernds_cb1@t-online.de>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
12 files changed:
arch/blackfin/kernel/bfin_dma_5xx.c
arch/blackfin/mach-bf527/dma.c
arch/blackfin/mach-bf533/dma.c
arch/blackfin/mach-bf537/dma.c
arch/blackfin/mach-bf548/dma.c
arch/blackfin/mach-bf561/dma.c
include/asm-blackfin/dma.h
include/asm-blackfin/mach-bf527/dma.h
include/asm-blackfin/mach-bf533/dma.h
include/asm-blackfin/mach-bf537/dma.h
include/asm-blackfin/mach-bf548/dma.h
include/asm-blackfin/mach-bf561/dma.h

index 8fd5d22cec34d124dfedb031bcad84a4149a4b33..18fc8a83594444bcc20981d48ea5be27a0114a0b 100644 (file)
@@ -67,7 +67,7 @@ static int __init blackfin_dma_init(void)
 
        for (i = 0; i < MAX_BLACKFIN_DMA_CHANNEL; i++) {
                dma_ch[i].chan_status = DMA_CHANNEL_FREE;
-               dma_ch[i].regs = base_addr[i];
+               dma_ch[i].regs = dma_io_base_addr[i];
                mutex_init(&(dma_ch[i].dmalock));
        }
        /* Mark MEMDMA Channel 0 as requested since we're using it internally */
index 0a82b154c0822d2b47ef8e10dd4ce53fb6ee4305..dfd080cda787cbbc33ad0e13d68027f908471817 100644 (file)
@@ -31,7 +31,7 @@
 #include <asm/blackfin.h>
 #include <asm/dma.h>
 
-struct dma_register *base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
+struct dma_register *dma_io_base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
        (struct dma_register *) DMA0_NEXT_DESC_PTR,
        (struct dma_register *) DMA1_NEXT_DESC_PTR,
        (struct dma_register *) DMA2_NEXT_DESC_PTR,
@@ -49,7 +49,7 @@ struct dma_register *base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
        (struct dma_register *) MDMA_D1_NEXT_DESC_PTR,
        (struct dma_register *) MDMA_S1_NEXT_DESC_PTR,
 };
-EXPORT_SYMBOL(base_addr);
+EXPORT_SYMBOL(dma_io_base_addr);
 
 int channel2irq(unsigned int channel)
 {
index 8d80efce396e22377fa000e9af811fdbc9a30396..28655c1cb7dc52ecdbc24bca24f34f58ce63e243 100644 (file)
@@ -31,7 +31,7 @@
 #include <asm/blackfin.h>
 #include <asm/dma.h>
 
-struct dma_register *base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
+struct dma_register *dma_io_base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
        (struct dma_register *) DMA0_NEXT_DESC_PTR,
        (struct dma_register *) DMA1_NEXT_DESC_PTR,
        (struct dma_register *) DMA2_NEXT_DESC_PTR,
@@ -45,7 +45,7 @@ struct dma_register *base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
        (struct dma_register *) MDMA_D1_NEXT_DESC_PTR,
        (struct dma_register *) MDMA_S1_NEXT_DESC_PTR,
 };
-EXPORT_SYMBOL(base_addr);
+EXPORT_SYMBOL(dma_io_base_addr);
 
 int channel2irq(unsigned int channel)
 {
index 992b19f400e759e757be0da871a6ef6b715623ca..4edb363ff99c041884501d6ae225abcb3397bd8d 100644 (file)
@@ -31,7 +31,7 @@
 #include <asm/blackfin.h>
 #include <asm/dma.h>
 
-struct dma_register *base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
+struct dma_register *dma_io_base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
        (struct dma_register *) DMA0_NEXT_DESC_PTR,
        (struct dma_register *) DMA1_NEXT_DESC_PTR,
        (struct dma_register *) DMA2_NEXT_DESC_PTR,
@@ -49,7 +49,7 @@ struct dma_register *base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
        (struct dma_register *) MDMA_D1_NEXT_DESC_PTR,
        (struct dma_register *) MDMA_S1_NEXT_DESC_PTR,
 };
-EXPORT_SYMBOL(base_addr);
+EXPORT_SYMBOL(dma_io_base_addr);
 
 int channel2irq(unsigned int channel)
 {
index e78a8833149554278e916d2e948b02600ebac9c1..74730eb8ae1bf41208d3da8b67b15fde18246f0c 100644 (file)
@@ -32,7 +32,7 @@
 #include <asm/blackfin.h>
 #include <asm/dma.h>
 
-struct dma_register *base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
+struct dma_register *dma_io_base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
        (struct dma_register *) DMA0_NEXT_DESC_PTR,
        (struct dma_register *) DMA1_NEXT_DESC_PTR,
        (struct dma_register *) DMA2_NEXT_DESC_PTR,
@@ -66,7 +66,7 @@ struct dma_register *base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
        (struct dma_register *) MDMA_D3_NEXT_DESC_PTR,
        (struct dma_register *) MDMA_S3_NEXT_DESC_PTR,
 };
-EXPORT_SYMBOL(base_addr);
+EXPORT_SYMBOL(dma_io_base_addr);
 
 int channel2irq(unsigned int channel)
 {
index 9863ae4fb8a4dd9d21fcc089b8f3f091310d3352..24415eb82698dd4961b1fddb3ac9c738aac141d0 100644 (file)
@@ -31,7 +31,7 @@
 #include <asm/blackfin.h>
 #include <asm/dma.h>
 
-struct dma_register *base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
+struct dma_register *dma_io_base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
        (struct dma_register *) DMA1_0_NEXT_DESC_PTR,
        (struct dma_register *) DMA1_1_NEXT_DESC_PTR,
        (struct dma_register *) DMA1_2_NEXT_DESC_PTR,
@@ -69,7 +69,7 @@ struct dma_register *base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
        (struct dma_register *) IMDMA_D1_NEXT_DESC_PTR,
        (struct dma_register *) IMDMA_S1_NEXT_DESC_PTR,
 };
-EXPORT_SYMBOL(base_addr);
+EXPORT_SYMBOL(dma_io_base_addr);
 
 int channel2irq(unsigned int channel)
 {
index 16d493574ba8cb97e4ee78a2cd62420909e4b6bd..c0d5259e315b05f155d3bcc9dd299b5fb0062679 100644 (file)
@@ -191,4 +191,7 @@ void clear_dma_irqstat(unsigned int channel);
 void *dma_memcpy(void *dest, const void *src, size_t count);
 void *safe_dma_memcpy(void *dest, const void *src, size_t count);
 
+extern int channel2irq(unsigned int channel);
+extern struct dma_register *dma_io_base_addr[MAX_BLACKFIN_DMA_CHANNEL];
+
 #endif
index 2dfee12864f684010e99496942cca94858ff3f42..49dd693223e8739c62d3422e2cffc6226f21e7d6 100644 (file)
@@ -59,7 +59,4 @@
 #define CH_NFC                 CH_EMAC_TX /* PPI receive/transmit or NFC */
 #endif
 
-extern int channel2irq(unsigned int channel);
-extern struct dma_register *base_addr[];
-
 #endif
index 16c672c01d80cb490d2dc0fceff35ed6d67947f7..bd9d5e94307d0ca7823ff50c88bf19d0f74c94f0 100644 (file)
@@ -51,7 +51,4 @@
 #define CH_MEM_STREAM1_DEST     10      /* TX */
 #define CH_MEM_STREAM1_SRC      11      /* RX */
 
-extern int channel2irq(unsigned int channel);
-extern struct dma_register *base_addr[];
-
 #endif
index 021991984e6e7ce4f5ae7adc197396d954bf83ca..7a964040870a047292f84678c3788dc2c2bff07f 100644 (file)
@@ -52,7 +52,4 @@
 #define CH_MEM_STREAM1_DEST    14       /* TX */
 #define CH_MEM_STREAM1_SRC     15       /* RX */
 
-extern int channel2irq(unsigned int channel);
-extern struct dma_register *base_addr[];
-
 #endif
index 46ff31f20ae5b821d7205b1b20a1e910f6854483..36a2ef7e7849fa6dc3d40653678277d009f130a3 100644 (file)
@@ -73,6 +73,4 @@
 
 #define MAX_BLACKFIN_DMA_CHANNEL 32
 
-extern int channel2irq(unsigned int channel);
-extern struct dma_register *base_addr[MAX_BLACKFIN_DMA_CHANNEL];
 #endif
index 766334b7d8ab8bf3a225408bb1dc6fe353356714..21d982003e7525c80188ae55bf2df8985ec77658 100644 (file)
@@ -32,7 +32,4 @@
 #define CH_IMEM_STREAM1_SRC    34
 #define CH_IMEM_STREAM1_DEST   35
 
-extern int channel2irq(unsigned int channel);
-extern struct dma_register *base_addr[];
-
 #endif