ucc_geth: Fix interrupt coalescing size and alignment

The rx interrupt coalescing table alignment was "guessed" to be 4,
but should be 64. The size should be 8 * number of queues + 4.
Verified in the MPC8323E manual.

Signed-off-by: Michael Barkowski <Michael.Barkowski@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>

diff --git a/drivers/net/ucc_geth.c b/drivers/net/ucc_geth.c
index 60be1e7753802208694462a84994517ff444a624..1a16ab20b39ecdfdc9dae06ff9d5cebeaf022a4d 100644 (file)
--- a/drivers/net/ucc_geth.c
+++ b/drivers/net/ucc_geth.c
@@ -2958,8 +2958,8 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth)
        /* Size varies with number of Rx queues */
        ugeth->rx_irq_coalescing_tbl_offset =
            qe_muram_alloc(ug_info->numQueuesRx *
-                          sizeof(struct ucc_geth_rx_interrupt_coalescing_entry),
-                          UCC_GETH_RX_INTERRUPT_COALESCING_ALIGNMENT);
+                          sizeof(struct ucc_geth_rx_interrupt_coalescing_entry)
+                          + 4, UCC_GETH_RX_INTERRUPT_COALESCING_ALIGNMENT);
        if (IS_MURAM_ERR(ugeth->rx_irq_coalescing_tbl_offset)) {
                ugeth_err
                    ("%s: Can not allocate DPRAM memory for"

diff --git a/drivers/net/ucc_geth.h b/drivers/net/ucc_geth.h
index 7cf3dbc9fd4c9c8969da47e1db45ca3675fef240..a29e1c3ca4b798ee293d4774a8df3c67a75d694f 100644 (file)
--- a/drivers/net/ucc_geth.h
+++ b/drivers/net/ucc_geth.h
@@ -867,8 +867,7 @@ struct ucc_geth_hardware_statistics {
 #define UCC_GETH_SCHEDULER_ALIGNMENT           4       /* This is a guess */
 #define UCC_GETH_TX_STATISTICS_ALIGNMENT       4       /* This is a guess */
 #define UCC_GETH_RX_STATISTICS_ALIGNMENT       4       /* This is a guess */
-#define UCC_GETH_RX_INTERRUPT_COALESCING_ALIGNMENT     4       /* This is a
-                                                                  guess */
+#define UCC_GETH_RX_INTERRUPT_COALESCING_ALIGNMENT     64
 #define UCC_GETH_RX_BD_QUEUES_ALIGNMENT                8       /* This is a guess */
 #define UCC_GETH_RX_PREFETCHED_BDS_ALIGNMENT   128     /* This is a guess */
 #define UCC_GETH_RX_EXTENDED_FILTERING_GLOBAL_PARAMETERS_ALIGNMENT 4   /* This