[ARM] Move FLUSH_BASE macros to asm/arch/memory.h

FLUSH_BASE must be visible to arch/arm/mm/init.c in order for the
memory region to be setup.  Move these definitions from
asm-arm/arch-*/hardware.h into asm-arm/arch-*/memory.h where mm
stuff can see them.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index 88279124317a6f5079091e62fb1c7d3487faf419..9ea1f87a7079b863ee4d061103ef46b2aa00fa9b 100644 (file)
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -20,6 +20,7 @@
 
 #include <asm/mach-types.h>
 #include <asm/setup.h>
+#include <asm/sizes.h>
 #include <asm/tlb.h>
 
 #include <asm/mach/arch.h>
@@ -455,14 +456,14 @@ static void __init devicemaps_init(struct machine_desc *mdesc)
 #ifdef FLUSH_BASE
        map.pfn = __phys_to_pfn(FLUSH_BASE_PHYS);
        map.virtual = FLUSH_BASE;
-       map.length = PGDIR_SIZE;
+       map.length = SZ_1M;
        map.type = MT_CACHECLEAN;
        create_mapping(&map);
 #endif
 #ifdef FLUSH_BASE_MINICACHE
-       map.pfn = __phys_to_pfn(FLUSH_BASE_PHYS + PGDIR_SIZE);
+       map.pfn = __phys_to_pfn(FLUSH_BASE_PHYS + SZ_1M);
        map.virtual = FLUSH_BASE_MINICACHE;
-       map.length = PGDIR_SIZE;
+       map.length = SZ_1M;
        map.type = MT_MINICLEAN;
        create_mapping(&map);
 #endif

diff --git a/include/asm-arm/arch-cl7500/hardware.h b/include/asm-arm/arch-cl7500/hardware.h
index 2339b764f69f611c949a9d22068a6e62f31136fa..1adfd18e6154ba116c1121bb76825afdb489cd53 100644 (file)
--- a/include/asm-arm/arch-cl7500/hardware.h
+++ b/include/asm-arm/arch-cl7500/hardware.h
@@ -53,16 +53,12 @@
 #define SCREEN_END             0xdfc00000
 #define SCREEN_BASE            0xdf800000
 
-#define FLUSH_BASE             0xdf000000
-
 #define VIDC_BASE              (void __iomem *)0xe0400000
 #define IOMD_BASE              IOMEM(0xe0200000)
 #define IOC_BASE               IOMEM(0xe0200000)
 #define FLOPPYDMA_BASE         IOMEM(0xe002a000)
 #define PCIO_BASE              IOMEM(0xe0010000)
 
-#define FLUSH_BASE_PHYS                0x00000000      /* ROM */
-
 #define vidc_writel(val)       __raw_writel(val, VIDC_BASE)
 
 /* in/out bias for the ISA slot region */

diff --git a/include/asm-arm/arch-cl7500/memory.h b/include/asm-arm/arch-cl7500/memory.h
index 34f40a6cec3042d065636750c6f5ca5d69ccf3da..3178140e24cae0b07e23ff01de8856962c006ffb 100644 (file)
--- a/include/asm-arm/arch-cl7500/memory.h
+++ b/include/asm-arm/arch-cl7500/memory.h
@@ -26,4 +26,10 @@
 #define __virt_to_bus(x) __virt_to_phys(x)
 #define __bus_to_virt(x) __phys_to_virt(x)
 
+/*
+ * Cache flushing area - ROM
+ */
+#define FLUSH_BASE_PHYS                0x00000000
+#define FLUSH_BASE             0xdf000000
+
 #endif

diff --git a/include/asm-arm/arch-ebsa110/hardware.h b/include/asm-arm/arch-ebsa110/hardware.h
index 4e41c2358f4eee850e91ec0c48e36275ae60e75b..3ce864def41efc2cd17c8b60aa1ff63e7e85b7ec 100644 (file)
--- a/include/asm-arm/arch-ebsa110/hardware.h
+++ b/include/asm-arm/arch-ebsa110/hardware.h
@@ -57,9 +57,6 @@
 /*
  * RAM definitions
  */
-#define FLUSH_BASE_PHYS                0x40000000
-#define FLUSH_BASE             0xdf000000
-
 #define UNCACHEABLE_ADDR       0xff000000      /* IRQ_STAT */
 
 #endif

diff --git a/include/asm-arm/arch-ebsa110/memory.h b/include/asm-arm/arch-ebsa110/memory.h
index 02f144520c10f647d16d79d6f8e01d994b2552d7..c7c500e176d0e3727414e5eb0084f8b24851d092 100644 (file)
--- a/include/asm-arm/arch-ebsa110/memory.h
+++ b/include/asm-arm/arch-ebsa110/memory.h
@@ -28,4 +28,10 @@
 #define __virt_to_bus(x)       (x)
 #define __bus_to_virt(x)       (x)
 
+/*
+ * Cache flushing area - SRAM
+ */
+#define FLUSH_BASE_PHYS                0x40000000
+#define FLUSH_BASE             0xdf000000
+
 #endif

diff --git a/include/asm-arm/arch-ebsa285/hardware.h b/include/asm-arm/arch-ebsa285/hardware.h
index 2ef2200f108cd8f18ac9e5865c01683290582ac5..ec51fe92483b13e12485f7753a6db86b0293b613 100644 (file)
--- a/include/asm-arm/arch-ebsa285/hardware.h
+++ b/include/asm-arm/arch-ebsa285/hardware.h
@@ -48,9 +48,6 @@
 #define PCICFG0_SIZE           0x01000000
 #define PCICFG0_BASE           0xfa000000
 
-#define FLUSH_SIZE             0x00100000
-#define FLUSH_BASE             0xf9000000
-
 #define PCIMEM_SIZE            0x01000000
 #define PCIMEM_BASE            0xf0000000
 
@@ -61,9 +58,6 @@
 #define PCIMEM_SIZE            0x80000000
 #define PCIMEM_BASE            0x80000000
 
-#define FLUSH_SIZE             0x00100000
-#define FLUSH_BASE             0x7e000000
-
 #define WFLUSH_SIZE            0x01000000
 #define WFLUSH_BASE            0x7d000000
 
@@ -94,7 +88,6 @@
 #define XBUS_SWITCH_J17_11     ((*XBUS_SWITCH) & (1 << 5))
 #define XBUS_SWITCH_J17_9      ((*XBUS_SWITCH) & (1 << 6))
 
-#define FLUSH_BASE_PHYS                0x50000000
 #define UNCACHEABLE_ADDR       (ARMCSR_BASE + 0x108)
 
 

diff --git a/include/asm-arm/arch-ebsa285/memory.h b/include/asm-arm/arch-ebsa285/memory.h
index 09e335cd687d8623a3fb843f7d0f16442c28c58b..99181ffc7e27977899929aa65eed85501403bb36 100644 (file)
--- a/include/asm-arm/arch-ebsa285/memory.h
+++ b/include/asm-arm/arch-ebsa285/memory.h
@@ -49,12 +49,22 @@ extern unsigned long __bus_to_virt(unsigned long);
 #define TASK_SIZE              UL(0xbf000000)
 #define PAGE_OFFSET            UL(0xc0000000)
 
+/*
+ * Cache flushing area.
+ */
+#define FLUSH_BASE             0xf9000000
+
 #elif defined(CONFIG_ARCH_CO285)
 
 /* Task size and page offset at 1.5GB */
 #define TASK_SIZE              UL(0x5f000000)
 #define PAGE_OFFSET            UL(0x60000000)
 
+/*
+ * Cache flushing area.
+ */
+#define FLUSH_BASE             0x7e000000
+
 #else
 
 #error "Undefined footbridge architecture"
@@ -72,4 +82,6 @@ extern unsigned long __bus_to_virt(unsigned long);
  */
 #define TASK_UNMAPPED_BASE ((TASK_SIZE + 0x01000000) / 3)
 
+#define FLUSH_BASE_PHYS                0x50000000
+
 #endif

diff --git a/include/asm-arm/arch-l7200/hardware.h b/include/asm-arm/arch-l7200/hardware.h
index b755079befabb40d8d6ece8338a9bbc263dd23d0..2ab43f3a4a8deafee20d63b20f7da469214f4918 100644 (file)
--- a/include/asm-arm/arch-l7200/hardware.h
+++ b/include/asm-arm/arch-l7200/hardware.h
@@ -52,9 +52,6 @@
 #define ISA_SIZE               0x20000000
 #define ISA_BASE               0xe0000000
 
-#define FLUSH_BASE_PHYS                0x40000000      /* ROM */
-#define FLUSH_BASE             0xdf000000
-
 #define PCIO_BASE              IO_BASE
 
 #endif

diff --git a/include/asm-arm/arch-l7200/memory.h b/include/asm-arm/arch-l7200/memory.h
index 9e50a171f78ac5843eb5872255affaa53d3833dc..402df637e7403b1924a9e20a0bc432852d7307ad 100644 (file)
--- a/include/asm-arm/arch-l7200/memory.h
+++ b/include/asm-arm/arch-l7200/memory.h
@@ -20,4 +20,10 @@
 #define __virt_to_bus(x) __virt_to_phys(x)
 #define __bus_to_virt(x) __phys_to_virt(x)
 
+/*
+ * Cache flushing area - ROM
+ */
+#define FLUSH_BASE_PHYS                0x40000000
+#define FLUSH_BASE             0xdf000000
+
 #endif

diff --git a/include/asm-arm/arch-rpc/hardware.h b/include/asm-arm/arch-rpc/hardware.h
index 9d7f87375aa774b477485aa79eb422d00c9536ac..7480f4e8d9747e480e78bccd708d3ea7388800cb 100644 (file)
--- a/include/asm-arm/arch-rpc/hardware.h
+++ b/include/asm-arm/arch-rpc/hardware.h
@@ -46,7 +46,6 @@
 #define SCREEN_END             0xdfc00000
 #define SCREEN_BASE            0xdf800000
 
-#define FLUSH_BASE             0xdf000000
 #define UNCACHEABLE_ADDR       0xdf010000
 
 /*
@@ -59,8 +58,6 @@
 #define PCIO_BASE              IOMEM(0xe0010000)
 #define FLOPPYDMA_BASE         IOMEM(0xe002a000)
 
-#define FLUSH_BASE_PHYS                0x00000000      /* ROM */
-
 #define vidc_writel(val)       __raw_writel(val, VIDC_BASE)
 
 #define IO_EC_EASI_BASE                0x81400000

diff --git a/include/asm-arm/arch-rpc/memory.h b/include/asm-arm/arch-rpc/memory.h
index 0592cb3f0c7436c4856af1246430a2e0ff8fc0e3..303c424ce673e502d740c824afabb635ff2bb56d 100644 (file)
--- a/include/asm-arm/arch-rpc/memory.h
+++ b/include/asm-arm/arch-rpc/memory.h
@@ -30,4 +30,10 @@
 #define __virt_to_bus(x) __virt_to_phys(x)
 #define __bus_to_virt(x) __phys_to_virt(x)
 
+/*
+ * Cache flushing area - ROM
+ */
+#define FLUSH_BASE_PHYS                0x00000000
+#define FLUSH_BASE             0xdf000000
+
 #endif

diff --git a/include/asm-arm/arch-sa1100/hardware.h b/include/asm-arm/arch-sa1100/hardware.h
index 28711aaa4968b5daa5882f905780ed120793fdee..ee008a5484f316a64afc59046985b9e48f0e1d66 100644 (file)
--- a/include/asm-arm/arch-sa1100/hardware.h
+++ b/include/asm-arm/arch-sa1100/hardware.h
@@ -14,10 +14,6 @@
 
 #include <linux/config.h>
 
-/* Flushing areas */
-#define FLUSH_BASE_PHYS                0xe0000000      /* SA1100 zero bank */
-#define FLUSH_BASE             0xf5000000
-#define FLUSH_BASE_MINICACHE   0xf5800000
 #define UNCACHEABLE_ADDR       0xfa050000
 
 

diff --git a/include/asm-arm/arch-sa1100/memory.h b/include/asm-arm/arch-sa1100/memory.h
index 018a9f0e3986d2d8f2c53f7f33b7ef17cfb86dc2..a29fac1387caf7324016a7d3607568924f71294f 100644 (file)
--- a/include/asm-arm/arch-sa1100/memory.h
+++ b/include/asm-arm/arch-sa1100/memory.h
@@ -91,4 +91,11 @@ void sa1111_adjust_zones(int node, unsigned long *size, unsigned long *holes);
 
 #endif
 
+/*
+ * Cache flushing area - SA1100 zero bank
+ */
+#define FLUSH_BASE_PHYS                0xe0000000
+#define FLUSH_BASE             0xf5000000
+#define FLUSH_BASE_MINICACHE   0xf5100000
+
 #endif

diff --git a/include/asm-arm/arch-shark/hardware.h b/include/asm-arm/arch-shark/hardware.h
index 4d35f8c154c308ec7abf0437eab8ab258a35633a..ecba45260898d029b0a28f26e269a63e1defb859 100644 (file)
--- a/include/asm-arm/arch-shark/hardware.h
+++ b/include/asm-arm/arch-shark/hardware.h
@@ -17,11 +17,6 @@
  */
 #define IO_BASE                        0xe0000000
 
-/*
- * RAM definitions
- */
-#define FLUSH_BASE_PHYS                0x80000000
-
 #else
 
 #define IO_BASE                        0
@@ -33,7 +28,6 @@
 #define ROMCARD_SIZE           0x08000000
 #define ROMCARD_START          0x10000000
 
-#define FLUSH_BASE             0xdf000000
 #define PCIO_BASE              0xe0000000
 
 

diff --git a/include/asm-arm/arch-shark/memory.h b/include/asm-arm/arch-shark/memory.h
index 95a29b4bc5d07d11306947ef0b3e241c150b57af..6968d6103ea00b8386163184e1b64a98c151e201 100644 (file)
--- a/include/asm-arm/arch-shark/memory.h
+++ b/include/asm-arm/arch-shark/memory.h
@@ -39,4 +39,10 @@ static inline void __arch_adjust_zones(int node, unsigned long *zone_size, unsig
 #define __virt_to_bus(x)       __virt_to_phys(x)
 #define __bus_to_virt(x)       __phys_to_virt(x)
 
+/*
+ * Cache flushing area
+ */
+#define FLUSH_BASE_PHYS                0x80000000
+#define FLUSH_BASE             0xdf000000
+
 #endif