while (status != 0xff && (status & ATA_BUSY) &&
time_before(jiffies, timeout)) {
msleep(50);
- status = ata_chk_status(ap);
+ status = ap->ops->check_status(ap);
}
if (status == 0xff)
int warned = 0;
while (1) {
- u8 status = ata_chk_status(ap);
+ u8 status = ap->ops->check_status(ap);
unsigned long now = jiffies;
if (!(status & ATA_BUSY))
goto idle_irq;
/* check main status, clearing INTRQ */
- status = ata_chk_status(ap);
+ status = ap->ops->check_status(ap);
if (unlikely(status & ATA_BUSY))
goto idle_irq;
#ifdef ATA_IRQ_TRAP
if ((ap->stats.idle_irq % 1000) == 0) {
- ata_chk_status(ap);
+ ap->ops->check_status(ap);
ap->ops->irq_clear(ap);
ata_port_printk(ap, KERN_WARNING, "irq trap\n");
return 1;
* ATA_NIEN manipulation. Also, many controllers fail to mask
* previously pending IRQ on ATA_NIEN assertion. Clear it.
*/
- ata_chk_status(ap);
+ ap->ops->check_status(ap);
ap->ops->irq_clear(ap);
}
void ata_bmdma_thaw(struct ata_port *ap)
{
/* clear & re-enable interrupts */
- ata_chk_status(ap);
+ ap->ops->check_status(ap);
ap->ops->irq_clear(ap);
ap->ops->irq_on(ap);
}
class = ATA_DEV_ATA;
else
class = ATA_DEV_NONE;
- } else if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
+ } else if ((class == ATA_DEV_ATA) && (ap->ops->check_status(ap) == 0))
class = ATA_DEV_NONE;
return class;
*/
if (ap->flags & ATA_FLAG_SATA) {
while (1) {
- u8 status = ata_chk_status(ap);
+ u8 status = ap->ops->check_status(ap);
if (status != 0xff || time_after(jiffies, deadline))
return;
* the bus shows 0xFF because the odd clown forgets the D7
* pulldown resistor.
*/
- if (ata_chk_status(ap) == 0xFF)
+ if (ap->ops->check_status(ap) == 0xFF)
return -ENODEV;
return ata_bus_post_reset(ap, devmask, deadline);
}
ata_altstatus(ap);
- ata_chk_status(ap);
+ ap->ops->check_status(ap);
ap->ops->irq_clear(ap);
spin_unlock_irqrestore(ap->lock, flags);
EXPORT_SYMBOL_GPL(ata_bmdma_port_ops);
EXPORT_SYMBOL_GPL(ata_qc_prep);
EXPORT_SYMBOL_GPL(ata_dumb_qc_prep);
-EXPORT_SYMBOL_GPL(ata_pci_default_filter);
EXPORT_SYMBOL_GPL(ata_std_dev_select);
EXPORT_SYMBOL_GPL(ata_check_status);
EXPORT_SYMBOL_GPL(ata_altstatus);
EXPORT_SYMBOL_GPL(ata_bmdma_post_internal_cmd);
EXPORT_SYMBOL_GPL(ata_sff_port_start);
EXPORT_SYMBOL_GPL(ata_std_ports);
+EXPORT_SYMBOL_GPL(ata_pci_default_filter);
EXPORT_SYMBOL_GPL(ata_bmdma_setup);
EXPORT_SYMBOL_GPL(ata_bmdma_start);
EXPORT_SYMBOL_GPL(ata_bmdma_stop);
ata_qc_from_tag(ap, ap->link.active_tag);
if (unlikely(!qc || (qc->tf.flags & ATA_TFLAG_POLLING))) {
- ata_chk_status(ap); /* clear ATA interrupt */
+ ap->ops->check_status(ap); /* clear ATA interrupt */
return;
}
if (likely(ata_host_intr(ap, qc)))
return;
- ata_chk_status(ap); /* clear ATA interrupt */
+ ap->ops->check_status(ap); /* clear ATA interrupt */
ata_port_printk(ap, KERN_WARNING, "unhandled "
"interrupt, irq_stat=%x\n", irq_stat);
return;
*/
if (unlikely(qc->tf.command == ATA_CMD_ID_ATA ||
qc->tf.command == ATA_CMD_ID_ATAPI)) {
- u8 stat = ata_chk_status(ap);
+ u8 stat = ap->ops->check_status(ap);
if (stat == 0x7f || stat == 0xff)
return AC_ERR_HSM;
}
__inic_set_pirq_mask(ap, PIRQ_MASK_FREEZE);
- ata_chk_status(ap);
+ ap->ops->check_status(ap);
writeb(0xff, port_base + PORT_IRQ_STAT);
readb(port_base + PORT_IRQ_STAT); /* flush */
{
void __iomem *port_base = inic_port_base(ap);
- ata_chk_status(ap);
+ ap->ops->check_status(ap);
writeb(0xff, port_base + PORT_IRQ_STAT);
__inic_set_pirq_mask(ap, PIRQ_MASK_OTHER);
if (unlikely(!qc || (qc->tf.flags & ATA_TFLAG_POLLING))) {
/* this sometimes happens, just clear IRQ */
- ata_chk_status(ap);
+ ap->ops->check_status(ap);
return;
}
}
/* check main status, clearing INTRQ */
- status = ata_chk_status(ap);
+ status = ap->ops->check_status(ap);
if (unlikely(status & ATA_BUSY))
goto err_hsm;
u32 tmp;
/* clear IRQ */
- ata_chk_status(ap);
+ ap->ops->check_status(ap);
ata_bmdma_irq_clear(ap);
/* turn on SATA IRQ if supported */