]> err.no Git - linux-2.6/commitdiff
[ARM] 5179/1: Replace obsolete IRQT_* and __IRQT_* values with IRQ_TYPE_*
authorDmitry Baryshkov <dbaryshkov@gmail.com>
Sun, 27 Jul 2008 03:23:31 +0000 (04:23 +0100)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Sun, 27 Jul 2008 08:46:18 +0000 (09:46 +0100)
IRQT_* and __IRQT_* were obsoleted long ago by patch [3692/1].
Remove them completely. Sed script for the reference:

s/__IRQT_RISEDGE/IRQ_TYPE_EDGE_RISING/g
s/__IRQT_FALEDGE/IRQ_TYPE_EDGE_FALLING/g
s/__IRQT_LOWLVL/IRQ_TYPE_LEVEL_LOW/g
s/__IRQT_HIGHLVL/IRQ_TYPE_LEVEL_HIGH/g
s/IRQT_RISING/IRQ_TYPE_EDGE_RISING/g
s/IRQT_FALLING/IRQ_TYPE_EDGE_FALLING/g
s/IRQT_BOTHEDGE/IRQ_TYPE_EDGE_BOTH/g
s/IRQT_LOW/IRQ_TYPE_LEVEL_LOW/g
s/IRQT_HIGH/IRQ_TYPE_LEVEL_HIGH/g
s/IRQT_PROBE/IRQ_TYPE_PROBE/g
s/IRQT_NOEDGE/IRQ_TYPE_NONE/g

Signed-off-by: Dmitry Baryshkov <dbaryshkov@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
61 files changed:
Documentation/arm/Interrupts
arch/arm/common/locomo.c
arch/arm/common/sa1111.c
arch/arm/mach-at91/board-cap9adk.c
arch/arm/mach-at91/irq.c
arch/arm/mach-ep93xx/core.c
arch/arm/mach-imx/irq.c
arch/arm/mach-ixp2000/core.c
arch/arm/mach-ixp23xx/core.c
arch/arm/mach-ixp23xx/roadrunner.c
arch/arm/mach-ixp4xx/avila-pci.c
arch/arm/mach-ixp4xx/common.c
arch/arm/mach-ixp4xx/coyote-pci.c
arch/arm/mach-ixp4xx/dsmg600-pci.c
arch/arm/mach-ixp4xx/fsg-pci.c
arch/arm/mach-ixp4xx/gateway7001-pci.c
arch/arm/mach-ixp4xx/gtwx5715-pci.c
arch/arm/mach-ixp4xx/ixdp425-pci.c
arch/arm/mach-ixp4xx/ixdpg425-pci.c
arch/arm/mach-ixp4xx/nas100d-pci.c
arch/arm/mach-ixp4xx/nslu2-pci.c
arch/arm/mach-ixp4xx/wg302v2-pci.c
arch/arm/mach-ks8695/irq.c
arch/arm/mach-netx/generic.c
arch/arm/mach-omap1/board-osk.c
arch/arm/mach-omap1/board-palmz71.c
arch/arm/mach-omap1/board-voiceblue.c
arch/arm/mach-omap1/fpga.c
arch/arm/mach-omap2/board-apollon.c
arch/arm/mach-orion5x/db88f5281-setup.c
arch/arm/mach-orion5x/irq.c
arch/arm/mach-orion5x/rd88f5182-setup.c
arch/arm/mach-orion5x/ts209-setup.c
arch/arm/mach-pnx4008/irq.c
arch/arm/mach-pxa/cm-x270-pci.c
arch/arm/mach-pxa/lpd270.c
arch/arm/mach-pxa/lubbock.c
arch/arm/mach-pxa/mainstone.c
arch/arm/mach-pxa/sharpsl_pm.c
arch/arm/mach-pxa/trizeps4.c
arch/arm/mach-sa1100/cerf.c
arch/arm/mach-sa1100/h3600.c
arch/arm/mach-sa1100/irq.c
arch/arm/mach-sa1100/neponset.c
arch/arm/mach-sa1100/pleb.c
arch/arm/plat-mxc/gpio.c
arch/arm/plat-omap/gpio.c
arch/arm/plat-s3c24xx/irq.c
drivers/ata/pata_ixp4xx_cf.c
drivers/input/touchscreen/corgi_ts.c
drivers/input/touchscreen/mainstone-wm97xx.c
drivers/mfd/asic3.c
drivers/mfd/tc6393xb.c
drivers/pcmcia/soc_common.c
drivers/video/am200epd.c
drivers/video/omap/sossi.c
include/asm-arm/arch-pnx4008/irqs.h
include/asm-arm/arch-pxa/idp.h
include/asm-arm/arch-pxa/pcm990_baseboard.h
include/asm-arm/arch-sa1100/ide.h
include/asm-arm/irq.h

index 0d3dbf1099bcc90cae1b364002ef32e15dcdc06a..c202ed35d7d610dd3c399b50fdb65796917f1544 100644 (file)
@@ -138,14 +138,8 @@ So, what's changed?
 
                 Set active the IRQ edge(s)/level.  This replaces the
                 SA1111 INTPOL manipulation, and the set_GPIO_IRQ_edge()
-                function.  Type should be one of the following:
-
-                #define IRQT_NOEDGE     (0)
-                #define IRQT_RISING     (__IRQT_RISEDGE)
-                #define IRQT_FALLING    (__IRQT_FALEDGE)
-                #define IRQT_BOTHEDGE   (__IRQT_RISEDGE|__IRQT_FALEDGE)
-                #define IRQT_LOW        (__IRQT_LOWLVL)
-                #define IRQT_HIGH       (__IRQT_HIGHLVL)
+                function.  Type should be one of IRQ_TYPE_xxx defined in
+               <linux/irq.h>
 
 3. set_GPIO_IRQ_edge() is obsolete, and should be replaced by set_irq_type.
 
index c3c3a333904995273e5f7af7c68890c8baee361d..85579654d3b778761e912ae22b7eaea14f8b4ca9 100644 (file)
@@ -331,17 +331,17 @@ static int locomo_gpio_type(unsigned int irq, unsigned int type)
 
        mask = 1 << (irq - LOCOMO_IRQ_GPIO_START);
 
-       if (type == IRQT_PROBE) {
+       if (type == IRQ_TYPE_PROBE) {
                if ((GPIO_IRQ_rising_edge | GPIO_IRQ_falling_edge) & mask)
                        return 0;
-               type = __IRQT_RISEDGE | __IRQT_FALEDGE;
+               type = IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING;
        }
 
-       if (type & __IRQT_RISEDGE)
+       if (type & IRQ_TYPE_EDGE_RISING)
                GPIO_IRQ_rising_edge |= mask;
        else
                GPIO_IRQ_rising_edge &= ~mask;
-       if (type & __IRQT_FALEDGE)
+       if (type & IRQ_TYPE_EDGE_FALLING)
                GPIO_IRQ_falling_edge |= mask;
        else
                GPIO_IRQ_falling_edge &= ~mask;
@@ -473,7 +473,7 @@ static void locomo_setup_irq(struct locomo *lchip)
        /*
         * Install handler for IRQ_LOCOMO_HW.
         */
-       set_irq_type(lchip->irq, IRQT_FALLING);
+       set_irq_type(lchip->irq, IRQ_TYPE_EDGE_FALLING);
        set_irq_chip_data(lchip->irq, irqbase);
        set_irq_chained_handler(lchip->irq, locomo_handler);
 
index 0a8e1ff2af8a99255b0f419d6b7b82f7fe5721a9..f6d3fdda7067caafff09011a6b587b1e982f6d4a 100644 (file)
@@ -241,14 +241,14 @@ static int sa1111_type_lowirq(unsigned int irq, unsigned int flags)
        void __iomem *mapbase = get_irq_chip_data(irq);
        unsigned long ip0;
 
-       if (flags == IRQT_PROBE)
+       if (flags == IRQ_TYPE_PROBE)
                return 0;
 
-       if ((!(flags & __IRQT_RISEDGE) ^ !(flags & __IRQT_FALEDGE)) == 0)
+       if ((!(flags & IRQ_TYPE_EDGE_RISING) ^ !(flags & IRQ_TYPE_EDGE_FALLING)) == 0)
                return -EINVAL;
 
        ip0 = sa1111_readl(mapbase + SA1111_INTPOL0);
-       if (flags & __IRQT_RISEDGE)
+       if (flags & IRQ_TYPE_EDGE_RISING)
                ip0 &= ~mask;
        else
                ip0 |= mask;
@@ -338,14 +338,14 @@ static int sa1111_type_highirq(unsigned int irq, unsigned int flags)
        void __iomem *mapbase = get_irq_chip_data(irq);
        unsigned long ip1;
 
-       if (flags == IRQT_PROBE)
+       if (flags == IRQ_TYPE_PROBE)
                return 0;
 
-       if ((!(flags & __IRQT_RISEDGE) ^ !(flags & __IRQT_FALEDGE)) == 0)
+       if ((!(flags & IRQ_TYPE_EDGE_RISING) ^ !(flags & IRQ_TYPE_EDGE_FALLING)) == 0)
                return -EINVAL;
 
        ip1 = sa1111_readl(mapbase + SA1111_INTPOL1);
-       if (flags & __IRQT_RISEDGE)
+       if (flags & IRQ_TYPE_EDGE_RISING)
                ip1 &= ~mask;
        else
                ip1 |= mask;
@@ -427,7 +427,7 @@ static void sa1111_setup_irq(struct sa1111 *sachip)
        /*
         * Register SA1111 interrupt
         */
-       set_irq_type(sachip->irq, IRQT_RISING);
+       set_irq_type(sachip->irq, IRQ_TYPE_EDGE_RISING);
        set_irq_data(sachip->irq, irqbase);
        set_irq_chained_handler(sachip->irq, sa1111_irq_handler);
 }
index 8a2a958639db5e9256188ae9de763b73de9f40af..b4b67eb1cbcb69dbb192d732f8c61380c6945b4a 100644 (file)
@@ -330,10 +330,10 @@ static void __init cap9adk_board_init(void)
        /* Serial */
        at91_add_device_serial();
        /* USB Host */
-       set_irq_type(AT91CAP9_ID_UHP, IRQT_HIGH);
+       set_irq_type(AT91CAP9_ID_UHP, IRQ_TYPE_LEVEL_HIGH);
        at91_add_device_usbh(&cap9adk_usbh_data);
        /* USB HS */
-       set_irq_type(AT91CAP9_ID_UDPHS, IRQT_HIGH);
+       set_irq_type(AT91CAP9_ID_UDPHS, IRQ_TYPE_LEVEL_HIGH);
        at91_add_device_usba(&cap9adk_usba_udc_data);
        /* SPI */
        at91_add_device_spi(cap9adk_spi_devices, ARRAY_SIZE(cap9adk_spi_devices));
@@ -350,7 +350,7 @@ static void __init cap9adk_board_init(void)
        /* I2C */
        at91_add_device_i2c(NULL, 0);
        /* LCD Controller */
-       set_irq_type(AT91CAP9_ID_LCDC, IRQT_HIGH);
+       set_irq_type(AT91CAP9_ID_LCDC, IRQ_TYPE_LEVEL_HIGH);
        at91_add_device_lcdc(&cap9adk_lcdc_data);
        /* AC97 */
        at91_add_device_ac97(&cap9adk_ac97_data);
index 78a5cdb746dc851170a7a583e1d6016575939be6..ca87587b2b4b0f28ef70ecfade042f30b4e26fde 100644 (file)
@@ -56,19 +56,19 @@ static int at91_aic_set_type(unsigned irq, unsigned type)
        unsigned int smr, srctype;
 
        switch (type) {
-       case IRQT_HIGH:
+       case IRQ_TYPE_LEVEL_HIGH:
                srctype = AT91_AIC_SRCTYPE_HIGH;
                break;
-       case IRQT_RISING:
+       case IRQ_TYPE_EDGE_RISING:
                srctype = AT91_AIC_SRCTYPE_RISING;
                break;
-       case IRQT_LOW:
+       case IRQ_TYPE_LEVEL_LOW:
                if ((irq == AT91_ID_FIQ) || is_extern_irq(irq))         /* only supported on external interrupts */
                        srctype = AT91_AIC_SRCTYPE_LOW;
                else
                        return -EINVAL;
                break;
-       case IRQT_FALLING:
+       case IRQ_TYPE_EDGE_FALLING:
                if ((irq == AT91_ID_FIQ) || is_extern_irq(irq))         /* only supported on external interrupts */
                        srctype = AT91_AIC_SRCTYPE_FALLING;
                else
index 1d7bca6aa441e3a092a87933a3d87e9c9a2f245f..5fed57608507f8647c8aad81675906e284d2adad 100644 (file)
@@ -226,7 +226,7 @@ static void ep93xx_gpio_irq_ack(unsigned int irq)
        int port = line >> 3;
        int port_mask = 1 << (line & 7);
 
-       if ((irq_desc[irq].status & IRQ_TYPE_SENSE_MASK) == IRQT_BOTHEDGE) {
+       if ((irq_desc[irq].status & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH) {
                gpio_int_type2[port] ^= port_mask; /* switch edge direction */
                ep93xx_gpio_update_int_params(port);
        }
@@ -240,7 +240,7 @@ static void ep93xx_gpio_irq_mask_ack(unsigned int irq)
        int port = line >> 3;
        int port_mask = 1 << (line & 7);
 
-       if ((irq_desc[irq].status & IRQ_TYPE_SENSE_MASK) == IRQT_BOTHEDGE)
+       if ((irq_desc[irq].status & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH)
                gpio_int_type2[port] ^= port_mask; /* switch edge direction */
 
        gpio_int_unmasked[port] &= ~port_mask;
@@ -283,27 +283,27 @@ static int ep93xx_gpio_irq_type(unsigned int irq, unsigned int type)
        gpio_direction_input(gpio);
 
        switch (type) {
-       case IRQT_RISING:
+       case IRQ_TYPE_EDGE_RISING:
                gpio_int_type1[port] |= port_mask;
                gpio_int_type2[port] |= port_mask;
                desc->handle_irq = handle_edge_irq;
                break;
-       case IRQT_FALLING:
+       case IRQ_TYPE_EDGE_FALLING:
                gpio_int_type1[port] |= port_mask;
                gpio_int_type2[port] &= ~port_mask;
                desc->handle_irq = handle_edge_irq;
                break;
-       case IRQT_HIGH:
+       case IRQ_TYPE_LEVEL_HIGH:
                gpio_int_type1[port] &= ~port_mask;
                gpio_int_type2[port] |= port_mask;
                desc->handle_irq = handle_level_irq;
                break;
-       case IRQT_LOW:
+       case IRQ_TYPE_LEVEL_LOW:
                gpio_int_type1[port] &= ~port_mask;
                gpio_int_type2[port] &= ~port_mask;
                desc->handle_irq = handle_level_irq;
                break;
-       case IRQT_BOTHEDGE:
+       case IRQ_TYPE_EDGE_BOTH:
                gpio_int_type1[port] |= port_mask;
                /* set initial polarity based on current input level */
                if (gpio_get_value(gpio))
index e6695c4e623b80facd70a60feb7244466a09cedc..e1b1f028b93061e1b34acf64ae580149fc16b991 100644 (file)
@@ -111,7 +111,7 @@ imx_gpio_irq_type(unsigned int _irq, unsigned int type)
        reg = irq >> 5;
        bit = 1 << (irq % 32);
 
-       if (type == IRQT_PROBE) {
+       if (type == IRQ_TYPE_PROBE) {
                /* Don't mess with enabled GPIOs using preconfigured edges or
                   GPIOs set to alternate function during probe */
                /* TODO: support probe */
@@ -120,7 +120,7 @@ imx_gpio_irq_type(unsigned int _irq, unsigned int type)
 //                      return 0;
 //              if (GAFR(gpio) & (0x3 << (((gpio) & 0xf)*2)))
 //                      return 0;
-//              type = __IRQT_RISEDGE | __IRQT_FALEDGE;
+//              type = IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING;
        }
 
        GIUS(reg) |= bit;
@@ -128,19 +128,19 @@ imx_gpio_irq_type(unsigned int _irq, unsigned int type)
 
        DEBUG_IRQ("setting type of irq %d to ", _irq);
 
-       if (type & __IRQT_RISEDGE) {
+       if (type & IRQ_TYPE_EDGE_RISING) {
                DEBUG_IRQ("rising edges\n");
                irq_type = 0x0;
        }
-       if (type & __IRQT_FALEDGE) {
+       if (type & IRQ_TYPE_EDGE_FALLING) {
                DEBUG_IRQ("falling edges\n");
                irq_type = 0x1;
        }
-       if (type & __IRQT_LOWLVL) {
+       if (type & IRQ_TYPE_LEVEL_LOW) {
                DEBUG_IRQ("low level\n");
                irq_type = 0x3;
        }
-       if (type & __IRQT_HIGHLVL) {
+       if (type & IRQ_TYPE_LEVEL_HIGH) {
                DEBUG_IRQ("high level\n");
                irq_type = 0x2;
        }
index 81cdc826720663722f574605d58cc9b99833cbd5..daf28074134b1391f716392f4effdd7934299559 100644 (file)
@@ -329,19 +329,19 @@ static int ixp2000_GPIO_irq_type(unsigned int irq, unsigned int type)
        /*
         * Then, set the proper trigger type.
         */
-       if (type & IRQT_FALLING)
+       if (type & IRQ_TYPE_EDGE_FALLING)
                GPIO_IRQ_falling_edge |= 1 << line;
        else
                GPIO_IRQ_falling_edge &= ~(1 << line);
-       if (type & IRQT_RISING)
+       if (type & IRQ_TYPE_EDGE_RISING)
                GPIO_IRQ_rising_edge |= 1 << line;
        else
                GPIO_IRQ_rising_edge &= ~(1 << line);
-       if (type & IRQT_LOW)
+       if (type & IRQ_TYPE_LEVEL_LOW)
                GPIO_IRQ_level_low |= 1 << line;
        else
                GPIO_IRQ_level_low &= ~(1 << line);
-       if (type & IRQT_HIGH)
+       if (type & IRQ_TYPE_LEVEL_HIGH)
                GPIO_IRQ_level_high |= 1 << line;
        else
                GPIO_IRQ_level_high &= ~(1 << line);
index 5fea5a132939abc1c608bec1a04940b7ae7612d6..df16a4eac4907ecb03862fbbe636750724da350a 100644 (file)
@@ -126,23 +126,23 @@ static int ixp23xx_irq_set_type(unsigned int irq, unsigned int type)
                return -EINVAL;
 
        switch (type) {
-       case IRQT_BOTHEDGE:
+       case IRQ_TYPE_EDGE_BOTH:
                int_style = IXP23XX_GPIO_STYLE_TRANSITIONAL;
                irq_type = IXP23XX_IRQ_EDGE;
                break;
-       case IRQT_RISING:
+       case IRQ_TYPE_EDGE_RISING:
                int_style = IXP23XX_GPIO_STYLE_RISING_EDGE;
                irq_type = IXP23XX_IRQ_EDGE;
                break;
-       case IRQT_FALLING:
+       case IRQ_TYPE_EDGE_FALLING:
                int_style = IXP23XX_GPIO_STYLE_FALLING_EDGE;
                irq_type = IXP23XX_IRQ_EDGE;
                break;
-       case IRQT_HIGH:
+       case IRQ_TYPE_LEVEL_HIGH:
                int_style = IXP23XX_GPIO_STYLE_ACTIVE_HIGH;
                irq_type = IXP23XX_IRQ_LEVEL;
                break;
-       case IRQT_LOW:
+       case IRQ_TYPE_LEVEL_LOW:
                int_style = IXP23XX_GPIO_STYLE_ACTIVE_LOW;
                irq_type = IXP23XX_IRQ_LEVEL;
                break;
index f0f70ba1e46d7c6a14d6b0ccb8ca10ede4777e5e..896ff9f840d9af4565291dc5aa295b6d16be5864 100644 (file)
@@ -110,8 +110,8 @@ static int __init roadrunner_map_irq(struct pci_dev *dev, u8 idsel, u8 pin)
 
 static void __init roadrunner_pci_preinit(void)
 {
-       set_irq_type(IRQ_ROADRUNNER_PCI_INTC, IRQT_LOW);
-       set_irq_type(IRQ_ROADRUNNER_PCI_INTD, IRQT_LOW);
+       set_irq_type(IRQ_ROADRUNNER_PCI_INTC, IRQ_TYPE_LEVEL_LOW);
+       set_irq_type(IRQ_ROADRUNNER_PCI_INTD, IRQ_TYPE_LEVEL_LOW);
 
        ixp23xx_pci_preinit();
 }
index 3f867691d9f2fd41fa6eab25aa415d0ac04754ef..c6e044befccb17a0cdf911fa7798039cb13e8b47 100644 (file)
 
 void __init avila_pci_preinit(void)
 {
-       set_irq_type(IRQ_AVILA_PCI_INTA, IRQT_LOW);
-       set_irq_type(IRQ_AVILA_PCI_INTB, IRQT_LOW);
-       set_irq_type(IRQ_AVILA_PCI_INTC, IRQT_LOW);
-       set_irq_type(IRQ_AVILA_PCI_INTD, IRQT_LOW);
+       set_irq_type(IRQ_AVILA_PCI_INTA, IRQ_TYPE_LEVEL_LOW);
+       set_irq_type(IRQ_AVILA_PCI_INTB, IRQ_TYPE_LEVEL_LOW);
+       set_irq_type(IRQ_AVILA_PCI_INTC, IRQ_TYPE_LEVEL_LOW);
+       set_irq_type(IRQ_AVILA_PCI_INTD, IRQ_TYPE_LEVEL_LOW);
 
        ixp4xx_pci_preinit();
 }
index 3781b3db9f497dc83aab3512ab350d44d9a3d07c..3947c506b4f30cf50b20b821cafb526b6c93187d 100644 (file)
@@ -142,23 +142,23 @@ static int ixp4xx_set_irq_type(unsigned int irq, unsigned int type)
                return -EINVAL;
 
        switch (type){
-       case IRQT_BOTHEDGE:
+       case IRQ_TYPE_EDGE_BOTH:
                int_style = IXP4XX_GPIO_STYLE_TRANSITIONAL;
                irq_type = IXP4XX_IRQ_EDGE;
                break;
-       case IRQT_RISING:
+       case IRQ_TYPE_EDGE_RISING:
                int_style = IXP4XX_GPIO_STYLE_RISING_EDGE;
                irq_type = IXP4XX_IRQ_EDGE;
                break;
-       case IRQT_FALLING:
+       case IRQ_TYPE_EDGE_FALLING:
                int_style = IXP4XX_GPIO_STYLE_FALLING_EDGE;
                irq_type = IXP4XX_IRQ_EDGE;
                break;
-       case IRQT_HIGH:
+       case IRQ_TYPE_LEVEL_HIGH:
                int_style = IXP4XX_GPIO_STYLE_ACTIVE_HIGH;
                irq_type = IXP4XX_IRQ_LEVEL;
                break;
-       case IRQT_LOW:
+       case IRQ_TYPE_LEVEL_LOW:
                int_style = IXP4XX_GPIO_STYLE_ACTIVE_LOW;
                irq_type = IXP4XX_IRQ_LEVEL;
                break;
index ad2e5b97966ecfbb221d6260489f320c5e64e087..be4f4a208b907c18641163bf474a4a11a5b78d27 100644 (file)
@@ -27,8 +27,8 @@
 
 void __init coyote_pci_preinit(void)
 {
-       set_irq_type(IRQ_COYOTE_PCI_SLOT0, IRQT_LOW);
-       set_irq_type(IRQ_COYOTE_PCI_SLOT1, IRQT_LOW);
+       set_irq_type(IRQ_COYOTE_PCI_SLOT0, IRQ_TYPE_LEVEL_LOW);
+       set_irq_type(IRQ_COYOTE_PCI_SLOT1, IRQ_TYPE_LEVEL_LOW);
 
        ixp4xx_pci_preinit();
 }
index 9db7e1f4201174af8969ed3e9d96b22e50a01f06..926d15f885fb7a77dedf3727c9dc96d747e81f29 100644 (file)
 
 void __init dsmg600_pci_preinit(void)
 {
-       set_irq_type(IRQ_DSMG600_PCI_INTA, IRQT_LOW);
-       set_irq_type(IRQ_DSMG600_PCI_INTB, IRQT_LOW);
-       set_irq_type(IRQ_DSMG600_PCI_INTC, IRQT_LOW);
-       set_irq_type(IRQ_DSMG600_PCI_INTD, IRQT_LOW);
-       set_irq_type(IRQ_DSMG600_PCI_INTE, IRQT_LOW);
-       set_irq_type(IRQ_DSMG600_PCI_INTF, IRQT_LOW);
+       set_irq_type(IRQ_DSMG600_PCI_INTA, IRQ_TYPE_LEVEL_LOW);
+       set_irq_type(IRQ_DSMG600_PCI_INTB, IRQ_TYPE_LEVEL_LOW);
+       set_irq_type(IRQ_DSMG600_PCI_INTC, IRQ_TYPE_LEVEL_LOW);
+       set_irq_type(IRQ_DSMG600_PCI_INTD, IRQ_TYPE_LEVEL_LOW);
+       set_irq_type(IRQ_DSMG600_PCI_INTE, IRQ_TYPE_LEVEL_LOW);
+       set_irq_type(IRQ_DSMG600_PCI_INTF, IRQ_TYPE_LEVEL_LOW);
 
        ixp4xx_pci_preinit();
 }
index f19f3f6feda11079cb1f1db2db2dd5ddb373fc35..ca12a9ca083045f479409d0a5172a88ab5eb529e 100644 (file)
@@ -25,9 +25,9 @@
 
 void __init fsg_pci_preinit(void)
 {
-       set_irq_type(IRQ_FSG_PCI_INTA, IRQT_LOW);
-       set_irq_type(IRQ_FSG_PCI_INTB, IRQT_LOW);
-       set_irq_type(IRQ_FSG_PCI_INTC, IRQT_LOW);
+       set_irq_type(IRQ_FSG_PCI_INTA, IRQ_TYPE_LEVEL_LOW);
+       set_irq_type(IRQ_FSG_PCI_INTB, IRQ_TYPE_LEVEL_LOW);
+       set_irq_type(IRQ_FSG_PCI_INTC, IRQ_TYPE_LEVEL_LOW);
 
        ixp4xx_pci_preinit();
 }
index 6abf568322d3dda0a7bc4e0dafc8ef5041442db8..afd1dc14e597db844c01827d7cb0ebe1e988203c 100644 (file)
@@ -29,8 +29,8 @@
 
 void __init gateway7001_pci_preinit(void)
 {
-       set_irq_type(IRQ_IXP4XX_GPIO10, IRQT_LOW);
-       set_irq_type(IRQ_IXP4XX_GPIO11, IRQT_LOW);
+       set_irq_type(IRQ_IXP4XX_GPIO10, IRQ_TYPE_LEVEL_LOW);
+       set_irq_type(IRQ_IXP4XX_GPIO11, IRQ_TYPE_LEVEL_LOW);
 
        ixp4xx_pci_preinit();
 }
index 49dec78688078f3bcc387af331b33ddb88be2895..20960704183be269ead5a5baf9ff17db5e76e344 100644 (file)
  */
 void __init gtwx5715_pci_preinit(void)
 {
-       set_irq_type(GTWX5715_PCI_SLOT0_INTA_IRQ, IRQT_LOW);
-       set_irq_type(GTWX5715_PCI_SLOT0_INTB_IRQ, IRQT_LOW);
-       set_irq_type(GTWX5715_PCI_SLOT1_INTA_IRQ, IRQT_LOW);
-       set_irq_type(GTWX5715_PCI_SLOT1_INTB_IRQ, IRQT_LOW);
+       set_irq_type(GTWX5715_PCI_SLOT0_INTA_IRQ, IRQ_TYPE_LEVEL_LOW);
+       set_irq_type(GTWX5715_PCI_SLOT0_INTB_IRQ, IRQ_TYPE_LEVEL_LOW);
+       set_irq_type(GTWX5715_PCI_SLOT1_INTA_IRQ, IRQ_TYPE_LEVEL_LOW);
+       set_irq_type(GTWX5715_PCI_SLOT1_INTB_IRQ, IRQ_TYPE_LEVEL_LOW);
 
        ixp4xx_pci_preinit();
 }
index 4087960048123541411cc472e3413f99f3100398..7d9bb4d2310441f12c3dac01140d524fe628ba35 100644 (file)
 
 void __init ixdp425_pci_preinit(void)
 {
-       set_irq_type(IRQ_IXDP425_PCI_INTA, IRQT_LOW);
-       set_irq_type(IRQ_IXDP425_PCI_INTB, IRQT_LOW);
-       set_irq_type(IRQ_IXDP425_PCI_INTC, IRQT_LOW);
-       set_irq_type(IRQ_IXDP425_PCI_INTD, IRQT_LOW);
+       set_irq_type(IRQ_IXDP425_PCI_INTA, IRQ_TYPE_LEVEL_LOW);
+       set_irq_type(IRQ_IXDP425_PCI_INTB, IRQ_TYPE_LEVEL_LOW);
+       set_irq_type(IRQ_IXDP425_PCI_INTC, IRQ_TYPE_LEVEL_LOW);
+       set_irq_type(IRQ_IXDP425_PCI_INTD, IRQ_TYPE_LEVEL_LOW);
 
        ixp4xx_pci_preinit();
 }
index d1e75b7dc3b1a1263ed545c3f3a43dace8037a60..37d9f2e8f602d825e076a171fc791953b7e8a351 100644 (file)
@@ -25,8 +25,8 @@
 
 void __init ixdpg425_pci_preinit(void)
 {
-       set_irq_type(IRQ_IXP4XX_GPIO6, IRQT_LOW);
-       set_irq_type(IRQ_IXP4XX_GPIO7, IRQT_LOW);
+       set_irq_type(IRQ_IXP4XX_GPIO6, IRQ_TYPE_LEVEL_LOW);
+       set_irq_type(IRQ_IXP4XX_GPIO7, IRQ_TYPE_LEVEL_LOW);
 
        ixp4xx_pci_preinit();
 }
index b8ebaf4a9c8e5db0dfba464bc70803aa7d04952c..1088426fdcee3054a1907fc6506573cff4adf687 100644 (file)
 
 void __init nas100d_pci_preinit(void)
 {
-       set_irq_type(IRQ_NAS100D_PCI_INTA, IRQT_LOW);
-       set_irq_type(IRQ_NAS100D_PCI_INTB, IRQT_LOW);
-       set_irq_type(IRQ_NAS100D_PCI_INTC, IRQT_LOW);
-       set_irq_type(IRQ_NAS100D_PCI_INTD, IRQT_LOW);
-       set_irq_type(IRQ_NAS100D_PCI_INTE, IRQT_LOW);
+       set_irq_type(IRQ_NAS100D_PCI_INTA, IRQ_TYPE_LEVEL_LOW);
+       set_irq_type(IRQ_NAS100D_PCI_INTB, IRQ_TYPE_LEVEL_LOW);
+       set_irq_type(IRQ_NAS100D_PCI_INTC, IRQ_TYPE_LEVEL_LOW);
+       set_irq_type(IRQ_NAS100D_PCI_INTD, IRQ_TYPE_LEVEL_LOW);
+       set_irq_type(IRQ_NAS100D_PCI_INTE, IRQ_TYPE_LEVEL_LOW);
 
        ixp4xx_pci_preinit();
 }
index 04661fef97f5a09a6116fde0ca6d58361b6454ab..4429b8448b61caa0d9a106738caa920f5f70c755 100644 (file)
@@ -24,9 +24,9 @@
 
 void __init nslu2_pci_preinit(void)
 {
-       set_irq_type(IRQ_NSLU2_PCI_INTA, IRQT_LOW);
-       set_irq_type(IRQ_NSLU2_PCI_INTB, IRQT_LOW);
-       set_irq_type(IRQ_NSLU2_PCI_INTC, IRQT_LOW);
+       set_irq_type(IRQ_NSLU2_PCI_INTA, IRQ_TYPE_LEVEL_LOW);
+       set_irq_type(IRQ_NSLU2_PCI_INTB, IRQ_TYPE_LEVEL_LOW);
+       set_irq_type(IRQ_NSLU2_PCI_INTC, IRQ_TYPE_LEVEL_LOW);
 
        ixp4xx_pci_preinit();
 }
index 6588f2c758e22c5dc01103ebb6e257a4f6862bb2..0f00feab67f8a3985cbecc03682d18d840520c44 100644 (file)
@@ -29,8 +29,8 @@
 
 void __init wg302v2_pci_preinit(void)
 {
-       set_irq_type(IRQ_IXP4XX_GPIO8, IRQT_LOW);
-       set_irq_type(IRQ_IXP4XX_GPIO9, IRQT_LOW);
+       set_irq_type(IRQ_IXP4XX_GPIO8, IRQ_TYPE_LEVEL_LOW);
+       set_irq_type(IRQ_IXP4XX_GPIO9, IRQ_TYPE_LEVEL_LOW);
 
        ixp4xx_pci_preinit();
 }
index 4c3ab43e1046b5f36ecd9c27447b31d33e05003a..0b06941a1eed2bdb0423afd269e7e9a5aac11801 100644 (file)
@@ -72,21 +72,21 @@ static int ks8695_irq_set_type(unsigned int irqno, unsigned int type)
        ctrl = __raw_readl(KS8695_GPIO_VA + KS8695_IOPC);
 
        switch (type) {
-               case IRQT_HIGH:
+               case IRQ_TYPE_LEVEL_HIGH:
                        mode = IOPC_TM_HIGH;
                        level_triggered = 1;
                        break;
-               case IRQT_LOW:
+               case IRQ_TYPE_LEVEL_LOW:
                        mode = IOPC_TM_LOW;
                        level_triggered = 1;
                        break;
-               case IRQT_RISING:
+               case IRQ_TYPE_EDGE_RISING:
                        mode = IOPC_TM_RISING;
                        break;
-               case IRQT_FALLING:
+               case IRQ_TYPE_EDGE_FALLING:
                        mode = IOPC_TM_FALLING;
                        break;
-               case IRQT_BOTHEDGE:
+               case IRQ_TYPE_EDGE_BOTH:
                        mode = IOPC_TM_EDGE;
                        break;
                default:
index fd7537f7d11e798c3257ba46a5b21211b45a5b1c..99d4fb19a08a4af010ffd1661204f72ac1ee538a 100644 (file)
@@ -99,19 +99,19 @@ netx_hif_irq_type(unsigned int _irq, unsigned int type)
 
        irq = _irq - NETX_IRQ_HIF_CHAINED(0);
 
-       if (type & __IRQT_RISEDGE) {
+       if (type & IRQ_TYPE_EDGE_RISING) {
                DEBUG_IRQ("rising edges\n");
                val |= (1 << 26) << irq;
        }
-       if (type & __IRQT_FALEDGE) {
+       if (type & IRQ_TYPE_EDGE_FALLING) {
                DEBUG_IRQ("falling edges\n");
                val &= ~((1 << 26) << irq);
        }
-       if (type & __IRQT_LOWLVL) {
+       if (type & IRQ_TYPE_LEVEL_LOW) {
                DEBUG_IRQ("low level\n");
                val &= ~((1 << 26) << irq);
        }
-       if (type & __IRQT_HIGHLVL) {
+       if (type & IRQ_TYPE_LEVEL_HIGH) {
                DEBUG_IRQ("high level\n");
                val |= (1 << 26) << irq;
        }
index 845c66371ca3a7eee5f47757fec16401d219896b..41f94f6fc15c4c7119536accffbb3a540b41558c 100644 (file)
@@ -288,7 +288,7 @@ static void __init osk_init_cf(void)
                return;
        }
        /* the CF I/O IRQ is really active-low */
-       set_irq_type(OMAP_GPIO_IRQ(62), IRQT_FALLING);
+       set_irq_type(OMAP_GPIO_IRQ(62), IRQ_TYPE_EDGE_FALLING);
 }
 
 static void __init osk_init_irq(void)
@@ -483,7 +483,7 @@ static void __init osk_mistral_init(void)
        omap_cfg_reg(P20_1610_GPIO4);   /* PENIRQ */
        gpio_request(4, "ts_int");
        gpio_direction_input(4);
-       set_irq_type(OMAP_GPIO_IRQ(4), IRQT_FALLING);
+       set_irq_type(OMAP_GPIO_IRQ(4), IRQ_TYPE_EDGE_FALLING);
 
        spi_register_board_info(mistral_boardinfo,
                        ARRAY_SIZE(mistral_boardinfo));
@@ -494,7 +494,7 @@ static void __init osk_mistral_init(void)
                int ret = 0;
 
                gpio_direction_input(OMAP_MPUIO(2));
-               set_irq_type(OMAP_GPIO_IRQ(OMAP_MPUIO(2)), IRQT_RISING);
+               set_irq_type(OMAP_GPIO_IRQ(OMAP_MPUIO(2)), IRQ_TYPE_EDGE_RISING);
 #ifdef CONFIG_PM
                /* share the IRQ in case someone wants to use the
                 * button for more than wakeup from system sleep.
index e020c2774606884e1dfcfa8f5dbd76f94887ca6e..34389b63b0ecc9f1c61a4cf931e8759aaed9021a 100644 (file)
@@ -298,11 +298,11 @@ palmz71_powercable(int irq, void *dev_id)
        if (omap_get_gpio_datain(PALMZ71_USBDETECT_GPIO)) {
                printk(KERN_INFO "PM: Power cable connected\n");
                set_irq_type(OMAP_GPIO_IRQ(PALMZ71_USBDETECT_GPIO),
-                               IRQT_FALLING);
+                               IRQ_TYPE_EDGE_FALLING);
        } else {
                printk(KERN_INFO "PM: Power cable disconnected\n");
                set_irq_type(OMAP_GPIO_IRQ(PALMZ71_USBDETECT_GPIO),
-                               IRQT_RISING);
+                               IRQ_TYPE_EDGE_RISING);
        }
        return IRQ_HANDLED;
 }
index 5c00b3f39cdd5d44cc1d75b9060d7fe78addb6f5..8948d45a27695c64db1e228ed2f1e7be7518880f 100644 (file)
@@ -186,10 +186,10 @@ static void __init voiceblue_init(void)
        omap_request_gpio(13);
        omap_request_gpio(14);
        omap_request_gpio(15);
-       set_irq_type(OMAP_GPIO_IRQ(12), IRQT_RISING);
-       set_irq_type(OMAP_GPIO_IRQ(13), IRQT_RISING);
-       set_irq_type(OMAP_GPIO_IRQ(14), IRQT_RISING);
-       set_irq_type(OMAP_GPIO_IRQ(15), IRQT_RISING);
+       set_irq_type(OMAP_GPIO_IRQ(12), IRQ_TYPE_EDGE_RISING);
+       set_irq_type(OMAP_GPIO_IRQ(13), IRQ_TYPE_EDGE_RISING);
+       set_irq_type(OMAP_GPIO_IRQ(14), IRQ_TYPE_EDGE_RISING);
+       set_irq_type(OMAP_GPIO_IRQ(15), IRQ_TYPE_EDGE_RISING);
 
        platform_add_devices(voiceblue_devices, ARRAY_SIZE(voiceblue_devices));
        omap_board_config = voiceblue_config;
index 0cf62ef5ecb7dea02740f7c5746cc280410df897..d963125ed755815345e08c0c781a95e277923729 100644 (file)
@@ -181,7 +181,7 @@ void omap1510_fpga_init_irq(void)
         */
        omap_request_gpio(13);
        omap_set_gpio_direction(13, 1);
-       set_irq_type(OMAP_GPIO_IRQ(13), IRQT_RISING);
+       set_irq_type(OMAP_GPIO_IRQ(13), IRQ_TYPE_EDGE_RISING);
        set_irq_chained_handler(OMAP1510_INT_FPGA, innovator_fpga_IRQ_demux);
 }
 
index 620fa0f120ee8a67df40fe95b5f5e2b569127f11..870b34972d3b15a7bdee22222dfe801bf9d1bbfd 100644 (file)
@@ -337,17 +337,17 @@ static void __init apollon_sw_init(void)
        omap_request_gpio(SW_DOWN_GPIO58);
        omap_set_gpio_direction(SW_DOWN_GPIO58, 1);
 
-       set_irq_type(OMAP_GPIO_IRQ(SW_ENTER_GPIO16), IRQT_RISING);
+       set_irq_type(OMAP_GPIO_IRQ(SW_ENTER_GPIO16), IRQ_TYPE_EDGE_RISING);
        if (request_irq(OMAP_GPIO_IRQ(SW_ENTER_GPIO16), &apollon_sw_interrupt,
                                IRQF_SHARED, "enter sw",
                                &apollon_sw_interrupt))
                return;
-       set_irq_type(OMAP_GPIO_IRQ(SW_UP_GPIO17), IRQT_RISING);
+       set_irq_type(OMAP_GPIO_IRQ(SW_UP_GPIO17), IRQ_TYPE_EDGE_RISING);
        if (request_irq(OMAP_GPIO_IRQ(SW_UP_GPIO17), &apollon_sw_interrupt,
                                IRQF_SHARED, "up sw",
                                &apollon_sw_interrupt))
                return;
-       set_irq_type(OMAP_GPIO_IRQ(SW_DOWN_GPIO58), IRQT_RISING);
+       set_irq_type(OMAP_GPIO_IRQ(SW_DOWN_GPIO58), IRQ_TYPE_EDGE_RISING);
        if (request_irq(OMAP_GPIO_IRQ(SW_DOWN_GPIO58), &apollon_sw_interrupt,
                                IRQF_SHARED, "down sw",
                                &apollon_sw_interrupt))
index 88405e74e5e306a4a6384151c5827d908c80d303..40a0bee4fbb3da6159625ff5c34e7b4236710b30 100644 (file)
@@ -213,7 +213,7 @@ void __init db88f5281_pci_preinit(void)
        pin = DB88F5281_PCI_SLOT0_IRQ_PIN;
        if (gpio_request(pin, "PCI Int1") == 0) {
                if (gpio_direction_input(pin) == 0) {
-                       set_irq_type(gpio_to_irq(pin), IRQT_LOW);
+                       set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
                } else {
                        printk(KERN_ERR "db88f5281_pci_preinit faield to "
                                        "set_irq_type pin %d\n", pin);
@@ -226,7 +226,7 @@ void __init db88f5281_pci_preinit(void)
        pin = DB88F5281_PCI_SLOT1_SLOT2_IRQ_PIN;
        if (gpio_request(pin, "PCI Int2") == 0) {
                if (gpio_direction_input(pin) == 0) {
-                       set_irq_type(gpio_to_irq(pin), IRQT_LOW);
+                       set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
                } else {
                        printk(KERN_ERR "db88f5281_pci_preinit faield "
                                        "to set_irq_type pin %d\n", pin);
index e2a0084ab4a3845d72ea5e98b802641ded09d600..9ae3f6dc7839cb9f1285f5990dbd133e97b73f68 100644 (file)
@@ -91,27 +91,27 @@ static int orion5x_gpio_set_irq_type(u32 irq, u32 type)
        desc = irq_desc + irq;
 
        switch (type) {
-       case IRQT_HIGH:
+       case IRQ_TYPE_LEVEL_HIGH:
                desc->handle_irq = handle_level_irq;
                desc->status |= IRQ_LEVEL;
                orion5x_clrbits(GPIO_IN_POL, (1 << pin));
                break;
-       case IRQT_LOW:
+       case IRQ_TYPE_LEVEL_LOW:
                desc->handle_irq = handle_level_irq;
                desc->status |= IRQ_LEVEL;
                orion5x_setbits(GPIO_IN_POL, (1 << pin));
                break;
-       case IRQT_RISING:
+       case IRQ_TYPE_EDGE_RISING:
                desc->handle_irq = handle_edge_irq;
                desc->status &= ~IRQ_LEVEL;
                orion5x_clrbits(GPIO_IN_POL, (1 << pin));
                break;
-       case IRQT_FALLING:
+       case IRQ_TYPE_EDGE_FALLING:
                desc->handle_irq = handle_edge_irq;
                desc->status &= ~IRQ_LEVEL;
                orion5x_setbits(GPIO_IN_POL, (1 << pin));
                break;
-       case IRQT_BOTHEDGE:
+       case IRQ_TYPE_EDGE_BOTH:
                desc->handle_irq = handle_edge_irq;
                desc->status &= ~IRQ_LEVEL;
                /*
@@ -156,7 +156,7 @@ static void orion5x_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
                if (cause & (1 << pin)) {
                        irq = gpio_to_irq(pin);
                        desc = irq_desc + irq;
-                       if ((desc->status & IRQ_TYPE_SENSE_MASK) == IRQT_BOTHEDGE) {
+                       if ((desc->status & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH) {
                                /* Swap polarity (race with GPIO line) */
                                u32 polarity = readl(GPIO_IN_POL);
                                polarity ^= 1 << pin;
index 10ae62864269371af277850bcbed7048612e0319..2a46d27209c198ad472a62c2aafb220bfbaa97d1 100644 (file)
@@ -148,7 +148,7 @@ void __init rd88f5182_pci_preinit(void)
        pin = RD88F5182_PCI_SLOT0_IRQ_A_PIN;
        if (gpio_request(pin, "PCI IntA") == 0) {
                if (gpio_direction_input(pin) == 0) {
-                       set_irq_type(gpio_to_irq(pin), IRQT_LOW);
+                       set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
                } else {
                        printk(KERN_ERR "rd88f5182_pci_preinit faield to "
                                        "set_irq_type pin %d\n", pin);
@@ -161,7 +161,7 @@ void __init rd88f5182_pci_preinit(void)
        pin = RD88F5182_PCI_SLOT0_IRQ_B_PIN;
        if (gpio_request(pin, "PCI IntB") == 0) {
                if (gpio_direction_input(pin) == 0) {
-                       set_irq_type(gpio_to_irq(pin), IRQT_LOW);
+                       set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
                } else {
                        printk(KERN_ERR "rd88f5182_pci_preinit faield to "
                                        "set_irq_type pin %d\n", pin);
index a9cef9703d5b37bdd4e38b56974875b32caec9cc..f270ada2def93b1b4ad5e308c4c641a534986b39 100644 (file)
@@ -117,7 +117,7 @@ void __init qnap_ts209_pci_preinit(void)
        pin = QNAP_TS209_PCI_SLOT0_IRQ_PIN;
        if (gpio_request(pin, "PCI Int1") == 0) {
                if (gpio_direction_input(pin) == 0) {
-                       set_irq_type(gpio_to_irq(pin), IRQT_LOW);
+                       set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
                } else {
                        printk(KERN_ERR "qnap_ts209_pci_preinit failed to "
                                        "set_irq_type pin %d\n", pin);
@@ -131,7 +131,7 @@ void __init qnap_ts209_pci_preinit(void)
        pin = QNAP_TS209_PCI_SLOT1_IRQ_PIN;
        if (gpio_request(pin, "PCI Int2") == 0) {
                if (gpio_direction_input(pin) == 0) {
-                       set_irq_type(gpio_to_irq(pin), IRQT_LOW);
+                       set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
                } else {
                        printk(KERN_ERR "qnap_ts209_pci_preinit failed "
                                        "to set_irq_type pin %d\n", pin);
index 968d0b027597399fa88d3d627756dddb1abc7316..5ed67e1947a8bda3ca268b10af7617cb32d66677 100644 (file)
@@ -56,28 +56,28 @@ static void pnx4008_mask_ack_irq(unsigned int irq)
 static int pnx4008_set_irq_type(unsigned int irq, unsigned int type)
 {
        switch (type) {
-       case IRQT_RISING:
+       case IRQ_TYPE_EDGE_RISING:
                __raw_writel(__raw_readl(INTC_ATR(irq)) | INTC_BIT(irq), INTC_ATR(irq));        /*edge sensitive */
                __raw_writel(__raw_readl(INTC_APR(irq)) | INTC_BIT(irq), INTC_APR(irq));        /*rising edge */
                set_irq_handler(irq, handle_edge_irq);
                break;
-       case IRQT_FALLING:
+       case IRQ_TYPE_EDGE_FALLING:
                __raw_writel(__raw_readl(INTC_ATR(irq)) | INTC_BIT(irq), INTC_ATR(irq));        /*edge sensitive */
                __raw_writel(__raw_readl(INTC_APR(irq)) & ~INTC_BIT(irq), INTC_APR(irq));       /*falling edge */
                set_irq_handler(irq, handle_edge_irq);
                break;
-       case IRQT_LOW:
+       case IRQ_TYPE_LEVEL_LOW:
                __raw_writel(__raw_readl(INTC_ATR(irq)) & ~INTC_BIT(irq), INTC_ATR(irq));       /*level sensitive */
                __raw_writel(__raw_readl(INTC_APR(irq)) & ~INTC_BIT(irq), INTC_APR(irq));       /*low level */
                set_irq_handler(irq, handle_level_irq);
                break;
-       case IRQT_HIGH:
+       case IRQ_TYPE_LEVEL_HIGH:
                __raw_writel(__raw_readl(INTC_ATR(irq)) & ~INTC_BIT(irq), INTC_ATR(irq));       /*level sensitive */
                __raw_writel(__raw_readl(INTC_APR(irq)) | INTC_BIT(irq), INTC_APR(irq));        /* high level */
                set_irq_handler(irq, handle_level_irq);
                break;
 
-       /* IRQT_BOTHEDGE is not supported */
+       /* IRQ_TYPE_EDGE_BOTH is not supported */
        default:
                printk(KERN_ERR "PNX4008 IRQ: Unsupported irq type %d\n", type);
                return -1;
index bcf0cde6ccc965ce2a3ba925ff868596f0d8c185..31f5bd411cedd89aa554b9899f2de336064c0a96 100644 (file)
@@ -71,7 +71,7 @@ void __cmx270_pci_init_irq(int irq_gpio)
 
        cmx270_it8152_irq_gpio = irq_gpio;
 
-       set_irq_type(gpio_to_irq(irq_gpio), IRQT_RISING);
+       set_irq_type(gpio_to_irq(irq_gpio), IRQ_TYPE_EDGE_RISING);
 
        set_irq_chained_handler(gpio_to_irq(irq_gpio), cmx270_it8152_irq_demux);
 }
index cc1c4fa061451cc26e15c9250b545773adf9072a..8d1ab54e7b20e5d3eed4a3fa403e6a4f4a32af77 100644 (file)
@@ -113,7 +113,7 @@ static void __init lpd270_init_irq(void)
                set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
        }
        set_irq_chained_handler(IRQ_GPIO(0), lpd270_irq_handler);
-       set_irq_type(IRQ_GPIO(0), IRQT_FALLING);
+       set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING);
 }
 
 
index ac26423cd20cbda2ce8db0667887625c4ef466da..af7375bb46a47f0556d6e502d270e0c6684ee870 100644 (file)
@@ -152,7 +152,7 @@ static void __init lubbock_init_irq(void)
        }
 
        set_irq_chained_handler(IRQ_GPIO(0), lubbock_irq_handler);
-       set_irq_type(IRQ_GPIO(0), IRQT_FALLING);
+       set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING);
 }
 
 #ifdef CONFIG_PM
index 851ec2d9b699c178fe36aa723269150d67f409f4..c8e38b5ff1c4a2a50fe92afc645df9da680f2dff 100644 (file)
@@ -191,7 +191,7 @@ static void __init mainstone_init_irq(void)
        MST_INTSETCLR = 0;
 
        set_irq_chained_handler(IRQ_GPIO(0), mainstone_irq_handler);
-       set_irq_type(IRQ_GPIO(0), IRQT_FALLING);
+       set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING);
 }
 
 #ifdef CONFIG_PM
index 34cd585075b076c76e517558d45f226588c9fa20..23e9b9283301d1ce7f59b9ea10f91eda989b1f89 100644 (file)
@@ -146,18 +146,18 @@ void sharpsl_pm_pxa_init(void)
        if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_acin), sharpsl_ac_isr, IRQF_DISABLED, "AC Input Detect", sharpsl_ac_isr)) {
                dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", IRQ_GPIO(sharpsl_pm.machinfo->gpio_acin));
        }
-       else set_irq_type(IRQ_GPIO(sharpsl_pm.machinfo->gpio_acin),IRQT_BOTHEDGE);
+       else set_irq_type(IRQ_GPIO(sharpsl_pm.machinfo->gpio_acin),IRQ_TYPE_EDGE_BOTH);
 
        if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batlock), sharpsl_fatal_isr, IRQF_DISABLED, "Battery Cover", sharpsl_fatal_isr)) {
                dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", IRQ_GPIO(sharpsl_pm.machinfo->gpio_batlock));
        }
-       else set_irq_type(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batlock),IRQT_FALLING);
+       else set_irq_type(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batlock),IRQ_TYPE_EDGE_FALLING);
 
        if (sharpsl_pm.machinfo->gpio_fatal) {
                if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_fatal), sharpsl_fatal_isr, IRQF_DISABLED, "Fatal Battery", sharpsl_fatal_isr)) {
                        dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", IRQ_GPIO(sharpsl_pm.machinfo->gpio_fatal));
                }
-               else set_irq_type(IRQ_GPIO(sharpsl_pm.machinfo->gpio_fatal),IRQT_FALLING);
+               else set_irq_type(IRQ_GPIO(sharpsl_pm.machinfo->gpio_fatal),IRQ_TYPE_EDGE_FALLING);
        }
 
        if (sharpsl_pm.machinfo->batfull_irq)
@@ -166,7 +166,7 @@ void sharpsl_pm_pxa_init(void)
                if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batfull), sharpsl_chrg_full_isr, IRQF_DISABLED, "CO", sharpsl_chrg_full_isr)) {
                        dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", IRQ_GPIO(sharpsl_pm.machinfo->gpio_batfull));
                }
-               else set_irq_type(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batfull),IRQT_RISING);
+               else set_irq_type(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batfull),IRQ_TYPE_EDGE_RISING);
        }
 }
 
index dee7bf36f013f76af3950eed48ecf299ec010fac..12811b7aea0706347b032b6686dc43b7c5a0f33f 100644 (file)
@@ -122,7 +122,7 @@ static struct resource dm9000_resources[] = {
        [2] = {
                .start  = TRIZEPS4_ETH_IRQ,
                .end    = TRIZEPS4_ETH_IRQ,
-               .flags  = (IORESOURCE_IRQ | IRQT_RISING),
+               .flags  = (IORESOURCE_IRQ | IRQ_TYPE_EDGE_RISING),
        },
 };
 
index 31afe50d7cd59746360d0dbbb642c7f87197bdcb..56d3ee01baae09298a9006bd9e773373d29c9a14 100644 (file)
@@ -96,7 +96,7 @@ static struct resource cerf_flash_resource = {
 static void __init cerf_init_irq(void)
 {
        sa1100_init_irq();
-       set_irq_type(CERF_ETH_IRQ, IRQT_RISING);
+       set_irq_type(CERF_ETH_IRQ, IRQ_TYPE_EDGE_RISING);
 }
 
 static struct map_desc cerf_io_desc[] __initdata = {
index 8473c37b77d6e1bf4f5c7d6ce06109793c4275c4..b34ff42bbd75a137aeea778f6d1c4f4ff6d77a6e 100644 (file)
@@ -834,7 +834,7 @@ static void __init h3800_init_irq(void)
                set_irq_chip(irq, &h3800_gpio_irqchip);
        }
 #endif
-       set_irq_type(IRQ_GPIO_H3800_ASIC, IRQT_RISING);
+       set_irq_type(IRQ_GPIO_H3800_ASIC, IRQ_TYPE_EDGE_RISING);
        set_irq_chained_handler(IRQ_GPIO_H3800_ASIC, h3800_IRQ_demux);
 }
 
index fa0403af7eecf3f078a18225f6f8ab485bcf8811..c5e438b12ec75ae3a5588e16e3ee22a70df5579f 100644 (file)
@@ -46,17 +46,17 @@ static int sa1100_gpio_type(unsigned int irq, unsigned int type)
        else
                mask = GPIO11_27_MASK(irq);
 
-       if (type == IRQT_PROBE) {
+       if (type == IRQ_TYPE_PROBE) {
                if ((GPIO_IRQ_rising_edge | GPIO_IRQ_falling_edge) & mask)
                        return 0;
-               type = __IRQT_RISEDGE | __IRQT_FALEDGE;
+               type = IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING;
        }
 
-       if (type & __IRQT_RISEDGE) {
+       if (type & IRQ_TYPE_EDGE_RISING) {
                GPIO_IRQ_rising_edge |= mask;
        } else
                GPIO_IRQ_rising_edge &= ~mask;
-       if (type & __IRQT_FALEDGE) {
+       if (type & IRQ_TYPE_EDGE_FALLING) {
                GPIO_IRQ_falling_edge |= mask;
        } else
                GPIO_IRQ_falling_edge &= ~mask;
index 9f1ed15093016b3ebd88a204795efca7d026946b..967a48454f6bd34e33507de11aa4fabd30065214 100644 (file)
@@ -151,7 +151,7 @@ static int __devinit neponset_probe(struct platform_device *dev)
        /*
         * Install handler for GPIO25.
         */
-       set_irq_type(IRQ_GPIO25, IRQT_RISING);
+       set_irq_type(IRQ_GPIO25, IRQ_TYPE_EDGE_RISING);
        set_irq_chained_handler(IRQ_GPIO25, neponset_irq_handler);
 
        /*
index c7bf7e0038f07922bb294860ed75c284fbb1a811..69a71f11625eb74c01ceea24c9b0b5a6f808af06 100644 (file)
@@ -143,7 +143,7 @@ static void __init pleb_map_io(void)
 
        GPDR &= ~GPIO_ETH0_IRQ;
 
-       set_irq_type(GPIO_ETH0_IRQ, IRQT_FALLING);
+       set_irq_type(GPIO_ETH0_IRQ, IRQ_TYPE_EDGE_FALLING);
 }
 
 MACHINE_START(PLEB, "PLEB")
index 4a7736717d860b7f32422993960cf00aca61a695..318b268f938e524dbd342f258a2b26699bfa89b9 100644 (file)
@@ -73,19 +73,19 @@ static int gpio_set_irq_type(u32 irq, u32 type)
        void __iomem *reg = port->base;
 
        switch (type) {
-       case IRQT_RISING:
+       case IRQ_TYPE_EDGE_RISING:
                edge = GPIO_INT_RISE_EDGE;
                break;
-       case IRQT_FALLING:
+       case IRQ_TYPE_EDGE_FALLING:
                edge = GPIO_INT_FALL_EDGE;
                break;
-       case IRQT_LOW:
+       case IRQ_TYPE_LEVEL_LOW:
                edge = GPIO_INT_LOW_LEV;
                break;
-       case IRQT_HIGH:
+       case IRQ_TYPE_LEVEL_HIGH:
                edge = GPIO_INT_HIGH_LEV;
                break;
-       default:        /* this includes IRQT_BOTHEDGE */
+       default:        /* this includes IRQ_TYPE_EDGE_BOTH */
                return -EINVAL;
        }
 
index d8e9c2c3f0f684ad8d9375744a36579363497d37..63e094342ef6b7e38ddba9df5c2585b21aaad22d 100644 (file)
@@ -517,13 +517,13 @@ static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio,
        u32 gpio_bit = 1 << gpio;
 
        MOD_REG_BIT(OMAP24XX_GPIO_LEVELDETECT0, gpio_bit,
-               trigger & __IRQT_LOWLVL);
+               trigger & IRQ_TYPE_LEVEL_LOW);
        MOD_REG_BIT(OMAP24XX_GPIO_LEVELDETECT1, gpio_bit,
-               trigger & __IRQT_HIGHLVL);
+               trigger & IRQ_TYPE_LEVEL_HIGH);
        MOD_REG_BIT(OMAP24XX_GPIO_RISINGDETECT, gpio_bit,
-               trigger & __IRQT_RISEDGE);
+               trigger & IRQ_TYPE_EDGE_RISING);
        MOD_REG_BIT(OMAP24XX_GPIO_FALLINGDETECT, gpio_bit,
-               trigger & __IRQT_FALEDGE);
+               trigger & IRQ_TYPE_EDGE_FALLING);
 
        if (likely(!(bank->non_wakeup_gpios & gpio_bit))) {
                if (trigger != 0)
@@ -555,9 +555,9 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger)
        case METHOD_MPUIO:
                reg += OMAP_MPUIO_GPIO_INT_EDGE;
                l = __raw_readl(reg);
-               if (trigger & __IRQT_RISEDGE)
+               if (trigger & IRQ_TYPE_EDGE_RISING)
                        l |= 1 << gpio;
-               else if (trigger & __IRQT_FALEDGE)
+               else if (trigger & IRQ_TYPE_EDGE_FALLING)
                        l &= ~(1 << gpio);
                else
                        goto bad;
@@ -567,9 +567,9 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger)
        case METHOD_GPIO_1510:
                reg += OMAP1510_GPIO_INT_CONTROL;
                l = __raw_readl(reg);
-               if (trigger & __IRQT_RISEDGE)
+               if (trigger & IRQ_TYPE_EDGE_RISING)
                        l |= 1 << gpio;
-               else if (trigger & __IRQT_FALEDGE)
+               else if (trigger & IRQ_TYPE_EDGE_FALLING)
                        l &= ~(1 << gpio);
                else
                        goto bad;
@@ -584,9 +584,9 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger)
                gpio &= 0x07;
                l = __raw_readl(reg);
                l &= ~(3 << (gpio << 1));
-               if (trigger & __IRQT_RISEDGE)
+               if (trigger & IRQ_TYPE_EDGE_RISING)
                        l |= 2 << (gpio << 1);
-               if (trigger & __IRQT_FALEDGE)
+               if (trigger & IRQ_TYPE_EDGE_FALLING)
                        l |= 1 << (gpio << 1);
                if (trigger)
                        /* Enable wake-up during idle for dynamic tick */
@@ -599,9 +599,9 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger)
        case METHOD_GPIO_730:
                reg += OMAP730_GPIO_INT_CONTROL;
                l = __raw_readl(reg);
-               if (trigger & __IRQT_RISEDGE)
+               if (trigger & IRQ_TYPE_EDGE_RISING)
                        l |= 1 << gpio;
-               else if (trigger & __IRQT_FALEDGE)
+               else if (trigger & IRQ_TYPE_EDGE_FALLING)
                        l &= ~(1 << gpio);
                else
                        goto bad;
@@ -887,7 +887,7 @@ static void _reset_gpio(struct gpio_bank *bank, int gpio)
        _set_gpio_direction(bank, get_gpio_index(gpio), 1);
        _set_gpio_irqenable(bank, gpio, 0);
        _clear_gpio_irqstatus(bank, gpio);
-       _set_gpio_triggering(bank, get_gpio_index(gpio), IRQT_NOEDGE);
+       _set_gpio_triggering(bank, get_gpio_index(gpio), IRQ_TYPE_NONE);
 }
 
 /* Use disable_irq_wake() and enable_irq_wake() functions from drivers */
@@ -924,7 +924,7 @@ int omap_request_gpio(int gpio)
        /* Set trigger to none. You need to enable the desired trigger with
         * request_irq() or set_irq_type().
         */
-       _set_gpio_triggering(bank, get_gpio_index(gpio), IRQT_NOEDGE);
+       _set_gpio_triggering(bank, get_gpio_index(gpio), IRQ_TYPE_NONE);
 
 #ifdef CONFIG_ARCH_OMAP15XX
        if (bank->method == METHOD_GPIO_1510) {
index ae2c5d7efc9dc411cc1488840bee40d8b648a456..001436c04b13b53e697c328929467667acf19dc2 100644 (file)
@@ -292,27 +292,27 @@ s3c_irqext_type(unsigned int irq, unsigned int type)
        /* Set the external interrupt to pointed trigger type */
        switch (type)
        {
-               case IRQT_NOEDGE:
+               case IRQ_TYPE_NONE:
                        printk(KERN_WARNING "No edge setting!\n");
                        break;
 
-               case IRQT_RISING:
+               case IRQ_TYPE_EDGE_RISING:
                        newvalue = S3C2410_EXTINT_RISEEDGE;
                        break;
 
-               case IRQT_FALLING:
+               case IRQ_TYPE_EDGE_FALLING:
                        newvalue = S3C2410_EXTINT_FALLEDGE;
                        break;
 
-               case IRQT_BOTHEDGE:
+               case IRQ_TYPE_EDGE_BOTH:
                        newvalue = S3C2410_EXTINT_BOTHEDGE;
                        break;
 
-               case IRQT_LOW:
+               case IRQ_TYPE_LEVEL_LOW:
                        newvalue = S3C2410_EXTINT_LOWLEV;
                        break;
 
-               case IRQT_HIGH:
+               case IRQ_TYPE_LEVEL_HIGH:
                        newvalue = S3C2410_EXTINT_HILEV;
                        break;
 
index de8d186f5abf01ba6c2e6dccfd0477e0e9fb4619..2014253f6c8842981b6d6b2f34ca8a52144ccbe4 100644 (file)
@@ -169,7 +169,7 @@ static __devinit int ixp4xx_pata_probe(struct platform_device *pdev)
 
        irq = platform_get_irq(pdev, 0);
        if (irq)
-               set_irq_type(irq, IRQT_RISING);
+               set_irq_type(irq, IRQ_TYPE_EDGE_RISING);
 
        /* Setup expansion bus chip selects */
        *data->cs0_cfg = data->cs0_bits;
index 4e9d8eece2e003f8674d90a8f6ac0caaa447934f..d0e13fc4a88c0391976859d7561a69f381c17eac 100644 (file)
@@ -195,7 +195,7 @@ static void ts_interrupt_main(struct corgi_ts *corgi_ts, int isTimer)
 {
        if ((GPLR(IRQ_TO_GPIO(corgi_ts->irq_gpio)) & GPIO_bit(IRQ_TO_GPIO(corgi_ts->irq_gpio))) == 0) {
                /* Disable Interrupt */
-               set_irq_type(corgi_ts->irq_gpio, IRQT_NOEDGE);
+               set_irq_type(corgi_ts->irq_gpio, IRQ_TYPE_NONE);
                if (read_xydata(corgi_ts)) {
                        corgi_ts->pendown = 1;
                        new_data(corgi_ts);
@@ -214,7 +214,7 @@ static void ts_interrupt_main(struct corgi_ts *corgi_ts, int isTimer)
                }
 
                /* Enable Falling Edge */
-               set_irq_type(corgi_ts->irq_gpio, IRQT_FALLING);
+               set_irq_type(corgi_ts->irq_gpio, IRQ_TYPE_EDGE_FALLING);
                corgi_ts->pendown = 0;
        }
 }
@@ -258,7 +258,7 @@ static int corgits_resume(struct platform_device *dev)
 
        corgi_ssp_ads7846_putget((4u << ADSCTRL_ADR_SH) | ADSCTRL_STS);
        /* Enable Falling Edge */
-       set_irq_type(corgi_ts->irq_gpio, IRQT_FALLING);
+       set_irq_type(corgi_ts->irq_gpio, IRQ_TYPE_EDGE_FALLING);
        corgi_ts->power_mode = PWR_MODE_ACTIVE;
 
        return 0;
@@ -333,7 +333,7 @@ static int __init corgits_probe(struct platform_device *pdev)
        corgi_ts->power_mode = PWR_MODE_ACTIVE;
 
        /* Enable Falling Edge */
-       set_irq_type(corgi_ts->irq_gpio, IRQT_FALLING);
+       set_irq_type(corgi_ts->irq_gpio, IRQ_TYPE_EDGE_FALLING);
 
        return 0;
 
index a79f029b91c04ff0b8e15f5da3fac88d9d8558af..590a1379aa321b3b0c59d80504818e897314f7fb 100644 (file)
@@ -198,7 +198,7 @@ static int wm97xx_acc_startup(struct wm97xx *wm)
                switch (wm->id) {
                case WM9705_ID2:
                        wm->pen_irq = IRQ_GPIO(4);
-                       set_irq_type(IRQ_GPIO(4), IRQT_BOTHEDGE);
+                       set_irq_type(IRQ_GPIO(4), IRQ_TYPE_EDGE_BOTH);
                        break;
                case WM9712_ID2:
                case WM9713_ID2:
index eabf0bfccab4a0ca052ac290c26b0b193082df86..c6408a62d95e3ab791bb3a303ba717ec1563b591 100644 (file)
@@ -256,28 +256,28 @@ static int asic3_gpio_irq_type(unsigned int irq, unsigned int type)
                                      bank + ASIC3_GPIO_TRIGGER_TYPE);
        asic->irq_bothedge[(irq - asic->irq_base) >> 4] &= ~bit;
 
-       if (type == IRQT_RISING) {
+       if (type == IRQ_TYPE_EDGE_RISING) {
                trigger |= bit;
                edge |= bit;
-       } else if (type == IRQT_FALLING) {
+       } else if (type == IRQ_TYPE_EDGE_FALLING) {
                trigger |= bit;
                edge &= ~bit;
-       } else if (type == IRQT_BOTHEDGE) {
+       } else if (type == IRQ_TYPE_EDGE_BOTH) {
                trigger |= bit;
                if (asic3_gpio_get(&asic->gpio, irq - asic->irq_base))
                        edge &= ~bit;
                else
                        edge |= bit;
                asic->irq_bothedge[(irq - asic->irq_base) >> 4] |= bit;
-       } else if (type == IRQT_LOW) {
+       } else if (type == IRQ_TYPE_LEVEL_LOW) {
                trigger &= ~bit;
                level &= ~bit;
-       } else if (type == IRQT_HIGH) {
+       } else if (type == IRQ_TYPE_LEVEL_HIGH) {
                trigger &= ~bit;
                level |= bit;
        } else {
                /*
-                * if type == IRQT_NOEDGE, we should mask interrupts, but
+                * if type == IRQ_TYPE_NONE, we should mask interrupts, but
                 * be careful to not unmask them if mask was also called.
                 * Probably need internal state for mask.
                 */
@@ -343,7 +343,7 @@ static int __init asic3_irq_probe(struct platform_device *pdev)
                             ASIC3_INTMASK_GINTMASK);
 
        set_irq_chained_handler(asic->irq_nr, asic3_irq_demux);
-       set_irq_type(asic->irq_nr, IRQT_RISING);
+       set_irq_type(asic->irq_nr, IRQ_TYPE_EDGE_RISING);
        set_irq_data(asic->irq_nr, asic);
 
        return 0;
index 2d87501b6fd49da6c258314950ab8734a2f6b3e3..94e55e8e7ce62345614eda7344ff9a45b04d1c8d 100644 (file)
@@ -324,7 +324,7 @@ static void tc6393xb_attach_irq(struct platform_device *dev)
                set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
        }
 
-       set_irq_type(tc6393xb->irq, IRQT_FALLING);
+       set_irq_type(tc6393xb->irq, IRQ_TYPE_EDGE_FALLING);
        set_irq_data(tc6393xb->irq, tc6393xb);
        set_irq_chained_handler(tc6393xb->irq, tc6393xb_irq);
 }
index 420a77540f412758979e72b300d7aeac1801b145..8c21446996f2190632d59d55b2c173dad6e0273e 100644 (file)
@@ -149,10 +149,10 @@ soc_common_pcmcia_config_skt(struct soc_pcmcia_socket *skt, socket_state_t *stat
                 */
                if (skt->irq_state != 1 && state->io_irq) {
                        skt->irq_state = 1;
-                       set_irq_type(skt->irq, IRQT_FALLING);
+                       set_irq_type(skt->irq, IRQ_TYPE_EDGE_FALLING);
                } else if (skt->irq_state == 1 && state->io_irq == 0) {
                        skt->irq_state = 0;
-                       set_irq_type(skt->irq, IRQT_NOEDGE);
+                       set_irq_type(skt->irq, IRQ_TYPE_NONE);
                }
 
                skt->cs_state = *state;
@@ -527,7 +527,7 @@ int soc_pcmcia_request_irqs(struct soc_pcmcia_socket *skt,
                                  IRQF_DISABLED, irqs[i].str, skt);
                if (res)
                        break;
-               set_irq_type(irqs[i].irq, IRQT_NOEDGE);
+               set_irq_type(irqs[i].irq, IRQ_TYPE_NONE);
        }
 
        if (res) {
@@ -560,7 +560,7 @@ void soc_pcmcia_disable_irqs(struct soc_pcmcia_socket *skt,
 
        for (i = 0; i < nr; i++)
                if (irqs[i].sock == skt->nr)
-                       set_irq_type(irqs[i].irq, IRQT_NOEDGE);
+                       set_irq_type(irqs[i].irq, IRQ_TYPE_NONE);
 }
 EXPORT_SYMBOL(soc_pcmcia_disable_irqs);
 
@@ -571,8 +571,8 @@ void soc_pcmcia_enable_irqs(struct soc_pcmcia_socket *skt,
 
        for (i = 0; i < nr; i++)
                if (irqs[i].sock == skt->nr) {
-                       set_irq_type(irqs[i].irq, IRQT_RISING);
-                       set_irq_type(irqs[i].irq, IRQT_BOTHEDGE);
+                       set_irq_type(irqs[i].irq, IRQ_TYPE_EDGE_RISING);
+                       set_irq_type(irqs[i].irq, IRQ_TYPE_EDGE_BOTH);
                }
 }
 EXPORT_SYMBOL(soc_pcmcia_enable_irqs);
index 51e26c1f5e8b747310cc5b6e2aff47c5661336a9..32dd85126931479f16d79685721e4c2e038a4daf 100644 (file)
@@ -221,7 +221,7 @@ static int am200_setup_irq(struct fb_info *info)
                return retval;
        }
 
-       return set_irq_type(IRQ_GPIO(RDY_GPIO_PIN), IRQT_FALLING);
+       return set_irq_type(IRQ_GPIO(RDY_GPIO_PIN), IRQ_TYPE_EDGE_FALLING);
 }
 
 static void am200_set_rst(struct metronomefb_par *par, int state)
index 81dbcf53cf0e50536fc8ebc76b87f38c62ba4fcc..fafd0f26b90f78028afff02d220673a588f6252b 100644 (file)
@@ -646,7 +646,7 @@ static int sossi_init(struct omapfb_device *fbdev)
        sossi_write_reg(SOSSI_INIT1_REG, l);
 
        if ((r = request_irq(INT_1610_SoSSI_MATCH, sossi_match_irq,
-                            IRQT_FALLING,
+                            IRQ_TYPE_EDGE_FALLING,
             "sossi_match", sossi.fbdev->dev)) < 0) {
                dev_err(sossi.fbdev->dev, "can't get SoSSI match IRQ\n");
                goto err;
index 13ec7ed0f501a00e222089efe07a6e9ccd2fbebb..a25d18f2d87a7ba2d4d583c0cc048fd352a6d0d5 100644 (file)
 
 #define PNX4008_IRQ_TYPES \
 {                                           /*IRQ #'s: */         \
-IRQT_LOW,  IRQT_LOW,  IRQT_LOW,  IRQT_HIGH, /*  0, 1, 2, 3 */     \
-IRQT_LOW,  IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /*  4, 5, 6, 7 */     \
-IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /*  8, 9,10,11 */     \
-IRQT_LOW,  IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 12,13,14,15 */     \
-IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 16,17,18,19 */     \
-IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 20,21,22,23 */     \
-IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 24,25,26,27 */     \
-IRQT_HIGH, IRQT_HIGH, IRQT_LOW,  IRQT_LOW,  /* 28,29,30,31 */     \
-IRQT_HIGH, IRQT_LOW,  IRQT_HIGH, IRQT_HIGH, /* 32,33,34,35 */     \
-IRQT_HIGH, IRQT_HIGH, IRQT_FALLING, IRQT_HIGH, /* 36,37,38,39 */  \
-IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 40,41,42,43 */     \
-IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 44,45,46,47 */     \
-IRQT_HIGH, IRQT_HIGH, IRQT_LOW,  IRQT_LOW,  /* 48,49,50,51 */     \
-IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 52,53,54,55 */     \
-IRQT_HIGH, IRQT_HIGH, IRQT_LOW,  IRQT_HIGH, /* 56,57,58,59 */     \
-IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 60,61,62,63 */     \
-IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 64,65,66,67 */     \
-IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 68,69,70,71 */     \
-IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 72,73,74,75 */     \
-IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 76,77,78,79 */     \
-IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 80,81,82,83 */     \
-IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 84,85,86,87 */     \
-IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 88,89,90,91 */     \
-IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 92,93,94,95 */     \
+IRQ_TYPE_LEVEL_LOW,  IRQ_TYPE_LEVEL_LOW,  IRQ_TYPE_LEVEL_LOW,  IRQ_TYPE_LEVEL_HIGH, /*  0, 1, 2, 3 */     \
+IRQ_TYPE_LEVEL_LOW,  IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /*  4, 5, 6, 7 */     \
+IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /*  8, 9,10,11 */     \
+IRQ_TYPE_LEVEL_LOW,  IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 12,13,14,15 */     \
+IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 16,17,18,19 */     \
+IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 20,21,22,23 */     \
+IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 24,25,26,27 */     \
+IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_LOW,  IRQ_TYPE_LEVEL_LOW,  /* 28,29,30,31 */     \
+IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_LOW,  IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 32,33,34,35 */     \
+IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_EDGE_FALLING, IRQ_TYPE_LEVEL_HIGH, /* 36,37,38,39 */  \
+IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 40,41,42,43 */     \
+IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 44,45,46,47 */     \
+IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_LOW,  IRQ_TYPE_LEVEL_LOW,  /* 48,49,50,51 */     \
+IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 52,53,54,55 */     \
+IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_LOW,  IRQ_TYPE_LEVEL_HIGH, /* 56,57,58,59 */     \
+IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 60,61,62,63 */     \
+IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 64,65,66,67 */     \
+IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 68,69,70,71 */     \
+IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 72,73,74,75 */     \
+IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 76,77,78,79 */     \
+IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 80,81,82,83 */     \
+IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 84,85,86,87 */     \
+IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 88,89,90,91 */     \
+IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 92,93,94,95 */     \
 }
 
 /* Start Enable Pin Interrupts - table 58 page 66 */
index b6952534a4e16039775ee1ba60399e548c8e480c..21aa8ac35c1c30df8fe635b9c851ea447afe09ae 100644 (file)
 #define TOUCH_PANEL_IRQ                        IRQ_GPIO(5)
 #define IDE_IRQ                                IRQ_GPIO(21)
 
-#define TOUCH_PANEL_IRQ_EDGE           IRQT_FALLING
+#define TOUCH_PANEL_IRQ_EDGE           IRQ_TYPE_EDGE_FALLING
 
 #define ETHERNET_IRQ                   IRQ_GPIO(4)
-#define ETHERNET_IRQ_EDGE              IRQT_RISING
+#define ETHERNET_IRQ_EDGE              IRQ_TYPE_EDGE_RISING
 
-#define IDE_IRQ_EDGE                   IRQT_RISING
+#define IDE_IRQ_EDGE                   IRQ_TYPE_EDGE_RISING
 
 #define PCMCIA_S0_CD_VALID             IRQ_GPIO(7)
-#define PCMCIA_S0_CD_VALID_EDGE                IRQT_BOTHEDGE
+#define PCMCIA_S0_CD_VALID_EDGE                IRQ_TYPE_EDGE_BOTH
 
 #define PCMCIA_S1_CD_VALID             IRQ_GPIO(8)
-#define PCMCIA_S1_CD_VALID_EDGE                IRQT_BOTHEDGE
+#define PCMCIA_S1_CD_VALID_EDGE                IRQ_TYPE_EDGE_BOTH
 
 #define PCMCIA_S0_RDYINT               IRQ_GPIO(19)
 #define PCMCIA_S1_RDYINT               IRQ_GPIO(22)
index b699d0d7bdb29dd2e01348420f1b8c6b11050554..2e20131790632da57dbe43a1124c82347230a15b 100644 (file)
 /* CPLD's interrupt controller is connected to PCM-027 GPIO 9 */
 #define PCM990_CTRL_INT_IRQ_GPIO       9
 #define PCM990_CTRL_INT_IRQ            IRQ_GPIO(PCM990_CTRL_INT_IRQ_GPIO)
-#define PCM990_CTRL_INT_IRQ_EDGE       IRQT_RISING
+#define PCM990_CTRL_INT_IRQ_EDGE       IRQ_TYPE_EDGE_RISING
 #define PCM990_CTRL_PHYS               PXA_CS1_PHYS    /* 16-Bit */
 #define PCM990_CTRL_BASE               0xea000000
 #define PCM990_CTRL_SIZE               (1*1024*1024)
 
 #define PCM990_CTRL_PWR_IRQ_GPIO       14
 #define PCM990_CTRL_PWR_IRQ            IRQ_GPIO(PCM990_CTRL_PWR_IRQ_GPIO)
-#define PCM990_CTRL_PWR_IRQ_EDGE       IRQT_RISING
+#define PCM990_CTRL_PWR_IRQ_EDGE       IRQ_TYPE_EDGE_RISING
 
 /* visible CPLD (U7) registers */
 #define PCM990_CTRL_REG0       0x0000  /* RESET REGISTER */
  */
 #define PCM990_IDE_IRQ_GPIO    13
 #define PCM990_IDE_IRQ         IRQ_GPIO(PCM990_IDE_IRQ_GPIO)
-#define PCM990_IDE_IRQ_EDGE    IRQT_RISING
+#define PCM990_IDE_IRQ_EDGE    IRQ_TYPE_EDGE_RISING
 #define PCM990_IDE_PLD_PHYS    0x20000000      /* 16 bit wide */
 #define PCM990_IDE_PLD_BASE    0xee000000
 #define PCM990_IDE_PLD_SIZE    (1*1024*1024)
  */
 #define PCM990_CF_IRQ_GPIO     11
 #define PCM990_CF_IRQ          IRQ_GPIO(PCM990_CF_IRQ_GPIO)
-#define PCM990_CF_IRQ_EDGE     IRQT_RISING
+#define PCM990_CF_IRQ_EDGE     IRQ_TYPE_EDGE_RISING
 
 #define PCM990_CF_CD_GPIO      12
 #define PCM990_CF_CD           IRQ_GPIO(PCM990_CF_CD_GPIO)
-#define PCM990_CF_CD_EDGE      IRQT_RISING
+#define PCM990_CF_CD_EDGE      IRQ_TYPE_EDGE_RISING
 
 #define PCM990_CF_PLD_PHYS     0x30000000      /* 16 bit wide */
 #define PCM990_CF_PLD_BASE     0xef000000
  */
 #define PCM990_AC97_IRQ_GPIO   10
 #define PCM990_AC97_IRQ                IRQ_GPIO(PCM990_AC97_IRQ_GPIO)
-#define PCM990_AC97_IRQ_EDGE   IRQT_RISING
+#define PCM990_AC97_IRQ_EDGE   IRQ_TYPE_EDGE_RISING
 
 /*
  * MMC phyCORE
  */
 #define PCM990_MMC0_IRQ_GPIO   9
 #define PCM990_MMC0_IRQ                IRQ_GPIO(PCM990_MMC0_IRQ_GPIO)
-#define PCM990_MMC0_IRQ_EDGE   IRQT_FALLING
+#define PCM990_MMC0_IRQ_EDGE   IRQ_TYPE_EDGE_FALLING
 
 /*
  * USB phyCore
index b14cbda01dc3cce14c715ffef836dde3d1fbabe9..193f6c15f4ddae567dc0b20184b96334e11a71d3 100644 (file)
@@ -61,7 +61,7 @@ ide_init_default_hwifs(void)
 
         /* Enable GPIO as interrupt line */
         GPDR &= ~LART_GPIO_IDE;
-       set_irq_type(LART_IRQ_IDE, IRQT_RISING);
+       set_irq_type(LART_IRQ_IDE, IRQ_TYPE_EDGE_RISING);
 
         /* set PCMCIA interface timing */
         MECR = 0x00060006;
index 1b882a255e3515861f9fe58a6112ca747ad54ec3..9cb01907e43bc1eb0ea2c4fce870f853ac221fd2 100644 (file)
 #define NO_IRQ ((unsigned int)(-1))
 #endif
 
-
-/*
- * Migration helpers
- */
-#define __IRQT_FALEDGE IRQ_TYPE_EDGE_FALLING
-#define __IRQT_RISEDGE IRQ_TYPE_EDGE_RISING
-#define __IRQT_LOWLVL  IRQ_TYPE_LEVEL_LOW
-#define __IRQT_HIGHLVL IRQ_TYPE_LEVEL_HIGH
-
-#define IRQT_NOEDGE    (0)
-#define IRQT_RISING    (__IRQT_RISEDGE)
-#define IRQT_FALLING   (__IRQT_FALEDGE)
-#define IRQT_BOTHEDGE  (__IRQT_RISEDGE|__IRQT_FALEDGE)
-#define IRQT_LOW       (__IRQT_LOWLVL)
-#define IRQT_HIGH      (__IRQT_HIGHLVL)
-#define IRQT_PROBE     IRQ_TYPE_PROBE
-
 #ifndef __ASSEMBLY__
 struct irqaction;
 extern void migrate_irqs(void);