[PATCH] Replace check_bridge_mode() with (bridge->mode & AGSTAT_MODE_3_0).

[AGPGART] Replace check_bridge_mode() with (bridge->mode & AGSTAT_MODE_3_0).

As mentioned earlier, the current check_bridge_mode() code assumes
that AGP bridges are PCI devices.  This isn't always true.  Definitely
not for HP zx1 chipset and the same seems to be the case for SGI's AGP
bridge.

The patch below fixes the problem by picking up the AGP_MODE_3_0 bit
from bridge->mode.  I feel like I may be missing something, since I
can't see any reason why check_bridge_mode() wasn't doing that in the
first place.  According to the AGP 3.0 specs, the AGP_MODE_3_0 bit is
determined during the hardware reset and cannot be changed, so it
seems to me it should be safe to pick it up from bridge->mode.

With the patch applied, I can definitely use AGP acceleration both
with AGP 2.0 and AGP 3.0 (one with an Nvidia card, the other with an
ATI FireGL card).

Unless someone spots a problem, please apply this patch so 3d
acceleration can work on zx1 boxes again.

This makes AGP work again on machines with an AGP bridge that isn't a
PCI device.

Signed-off-by: David Mosberger-Tang <davidm@hpl.hp.com>
Signed-off-by: Dave Jones <davej@redhat.com>

diff --git a/drivers/char/agp/generic.c b/drivers/char/agp/generic.c
index d62505b5d25ab2153365c0a55fcfd5952dba5bec..f0079e991bdc4ffaf95c787e50bd9618a848e225 100644 (file)
--- a/drivers/char/agp/generic.c
+++ b/drivers/char/agp/generic.c
@@ -295,19 +295,6 @@ int agp_num_entries(void)
 EXPORT_SYMBOL_GPL(agp_num_entries);
 
 
-static int check_bridge_mode(struct pci_dev *dev)
-{
-       u32 agp3;
-       u8 cap_ptr;
-
-       cap_ptr = pci_find_capability(dev, PCI_CAP_ID_AGP);
-       pci_read_config_dword(dev, cap_ptr+AGPSTAT, &agp3);
-       if (agp3 & AGPSTAT_MODE_3_0)
-               return 1;
-       return 0;
-}
-
-
 /**
  *     agp_copy_info  -  copy bridge state information
  *
@@ -328,7 +315,7 @@ int agp_copy_info(struct agp_bridge_data *bridge, struct agp_kern_info *info)
        info->version.minor = bridge->version->minor;
        info->chipset = SUPPORTED;
        info->device = bridge->dev;
-       if (check_bridge_mode(bridge->dev))
+       if (bridge->mode & AGPSTAT_MODE_3_0)
                info->mode = bridge->mode & ~AGP3_RESERVED_MASK;
        else
                info->mode = bridge->mode & ~AGP2_RESERVED_MASK;
@@ -661,7 +648,7 @@ u32 agp_collect_device_status(struct agp_bridge_data *bridge, u32 requested_mode
                bridge_agpstat &= ~AGPSTAT_FW;
 
        /* Check to see if we are operating in 3.0 mode */
-       if (check_bridge_mode(agp_bridge->dev))
+       if (agp_bridge->mode & AGPSTAT_MODE_3_0)
                agp_v3_parse_one(&requested_mode, &bridge_agpstat, &vga_agpstat);
        else
                agp_v2_parse_one(&requested_mode, &bridge_agpstat, &vga_agpstat);
@@ -732,7 +719,7 @@ void agp_generic_enable(struct agp_bridge_data *bridge, u32 requested_mode)
 
        /* Do AGP version specific frobbing. */
        if (bridge->major_version >= 3) {
-               if (check_bridge_mode(bridge->dev)) {
+               if (bridge->mode & AGPSTAT_MODE_3_0) {
                        /* If we have 3.5, we can do the isoch stuff. */
                        if (bridge->minor_version >= 5)
                                agp_3_5_enable(bridge);