This patch lengthens the delay between DET setting and clearing for
COMMRESET from 400us to 1ms. I couldn't find any requiremen regarding
the duration of COMMRESET in SATA I/II specs but AHCI-1.1 10.4.2
states that it should be at least 1ms.
Signed-off-by: Tejun Heo <htejun@gmail.com>
if (ap->flags & ATA_FLAG_SATA_RESET) {
/* issue phy wake/reset */
scr_write_flush(ap, SCR_CONTROL, 0x301);
- udelay(400); /* FIXME: a guess */
+ /* Couldn't find anything in SATA I/II specs, but
+ * AHCI-1.1 10.4.2 says at least 1 ms. */
+ mdelay(1);
}
scr_write_flush(ap, SCR_CONTROL, 0x300); /* phy wake/clear reset */